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17 lines
199 B
Makefile
17 lines
199 B
Makefile
16 years ago
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OBJECTS = elftool.o
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INCLUDES = -I../include/
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CFLAGS = $(INCLUDES)
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PROG = elftool
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all: elftool
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elftool: $(OBJECTS)
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gcc $(OBJECTS) -o $(PROG)
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.c.o:
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gcc $(CFLAGS) -c $<
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clean:
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rm *.o
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rm $(PROG)
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