Added ICP - HSSP Registers.
git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@23 b68d4a1b-bc3d-0410-92ed-d4ac073336b7master
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/*
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* $Id$
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*
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* StrongARM SA-1110 ICP - HSSP Registers
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* Copyright (C) 2002 ETC s.r.o.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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* 02111-1307, USA.
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*
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* Written by Marcel Telka <marcel@telka.sk>, 2002.
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*
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* Documentation:
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* [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
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* Developer's Manual", October 2001, Order Number: 278240-004
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* [2] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
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* Specification Update", December 2001, Order Number: 278259-023
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*
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*/
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#ifndef SA11X0_HSSP_H
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#define SA11X0_HSSP_H
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#ifndef uint32_t
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typedef unsigned int uint32_t;
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#endif
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/* ICP - HSSP Registers (Serial Port 2) */
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#define HSSP_BASE 0x80040060
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typedef volatile struct HSSP_registers {
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uint32_t hscr0;
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uint32_t hscr1;
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uint32_t __reserved1;
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uint32_t hsdr;
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uint32_t __reserved2;
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uint32_t hssr0;
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uint32_t hssr1;
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} HSSP_registers;
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#ifndef HSSP_pointer
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#define HSSP_pointer ((HSSP_registers*) HSSP_BASE)
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#endif
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#define HSCR0 HSSP_pointer->hscr0
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#define HSCR1 HSSP_pointer->hscr1
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#define HSDR HSSP_pointer->hsdr
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#define HSSR0 HSSP_pointer->hssr0
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#define HSSR1 HSSP_pointer->hssr1
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#endif /* SA11X0_HSSP_H */
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