Initial JTAG declarations for XCR3128XL-CS144.
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#
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# $Id$
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#
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# Copyright (C) 2002 ETC s.r.o.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; either version 2
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# of the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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# 02111-1307, USA.
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#
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# Written by Marcel Telka <marcel@telka.sk>, 2002.
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#
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# bits 31-28 of the Device Identification Register
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0000 xcr3128xl-cs144 0
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#
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# $Id$
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#
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# JTAG declarations for XCR3128XL-CS144
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# Copyright (C) 2002 ETC s.r.o.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; either version 2
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# of the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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# 02111-1307, USA.
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#
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# Written by Marcel Telka <marcel@telka.sk>, 2002.
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#
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# Documentation:
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# [1] Xilinx Inc., "CoolRunner XPLA3 CPLD Advance Product Specification",
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# DS012 (v1.5) January 7, 2002
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# [2] Xilinx Inc., "BSDL file for device xcr3128xl, package cs144
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# Revision 1.3", 2002-01-03
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#
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# mandatory data registers
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register BSR 444 # see [2]
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register BR 1
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# optional data registers
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register DIR 32
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# user-defined registers (TODO)
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# instructions - see [2]
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instruction length 5
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# mandatory instructions - see Table 3 in [1]
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instruction EXTEST 00000 BSR
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instruction SAMPLE/PRELOAD 00010 BSR
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instruction BYPASS 11111 BR
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# optional instructions - see Table 3 in [1]
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instruction IDCODE 00001 DIR
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instruction HIGHZ 00101 BR
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instruction INTEST 00011 BSR
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# user-defined instructions - see Table 5 in [1] (TODO)
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