diff --git a/jtag/ChangeLog b/jtag/ChangeLog index 0dbc0003..0f17307d 100644 --- a/jtag/ChangeLog +++ b/jtag/ChangeLog @@ -1,3 +1,27 @@ +008-02-14 Jie Zhang + + * src/bus/bf537_stamp.c: New. + * src/bus/bf548_ezkit.c: New. + * src/bus/bf561_ezkit.c: New. + * src/bus/buses.c (bus_drivers): Add bf537_stamp_bus, + bf537_ezkit_bus, and bf561_ezkit_bus. + * src/bus/buses.h: Declare bf537_stamp_bus, bf537_ezkit_bus, + and bf561_ezkit_bus. + * src/bus/Makefile.am (libbus_a_SOURCES): Add bf537_stamp.c, + bf548_ezkit.c, and bf561_ezkit.c. + * data/analog/bf533/STEPPINGS: Add stepping 4. + * data/analog/bf537/bf537: New. + * data/analog/bf537/STEPPINGS: New. + * data/analog/bf549/bf549: New. + * data/analog/bf549/STEPPINGS: New. + * data/analog/bf561/bf561: New. + * data/analog/bf561/STEPPINGS: New. + * data/analog/PARTS: Add bf537, bf549, and bf561. + * data/Makefile.am (nobase_dist_pkgdata_DATA): Add + analog/bf537/STEPPINGS, analog/bf537/bf537, + analog/bf549/STEPPINGS, analog/bf549/bf549, + and analog/bf561/STEPPINGS, analog/bf561/bf561. + 2008-02-13 Arnim Laeuger * src/tap/cable/ft2232.c: implemented control of TRST diff --git a/jtag/data/Makefile.am b/jtag/data/Makefile.am index d99ff9c1..9b823876 100644 --- a/jtag/data/Makefile.am +++ b/jtag/data/Makefile.am @@ -57,6 +57,12 @@ nobase_dist_pkgdata_DATA = \ analog/PARTS \ analog/bf533/STEPPINGS \ analog/bf533/bf533 \ + analog/bf537/STEPPINGS \ + analog/bf537/bf537 \ + analog/bf549/STEPPINGS \ + analog/bf549/bf549 \ + analog/bf561/STEPPINGS \ + analog/bf561/bf561 \ analog/PARTS \ analog/sharc21065l/STEPPINGS \ analog/sharc21065l/sharc21065l \ diff --git a/jtag/data/analog/PARTS b/jtag/data/analog/PARTS index 8821c734..5c22505a 100644 --- a/jtag/data/analog/PARTS +++ b/jtag/data/analog/PARTS @@ -20,5 +20,8 @@ # # bits 27-12 of the Device Identification Register -0010011110100111 sharc21065l SHARC +0010011110100111 sharc21065l SHARC 0010011110100101 bf533 BF533 +0010011111001000 bf537 BF537 +0010011111011110 bf549 BF549 +0010011110111011 bf561 BF561 diff --git a/jtag/data/analog/bf533/STEPPINGS b/jtag/data/analog/bf533/STEPPINGS index 440a6379..152b3af2 100644 --- a/jtag/data/analog/bf533/STEPPINGS +++ b/jtag/data/analog/bf533/STEPPINGS @@ -24,3 +24,4 @@ 0001 bf533 1 0010 bf533 2 0011 bf533 3 +0100 bf533 4 diff --git a/jtag/data/analog/bf537/STEPPINGS b/jtag/data/analog/bf537/STEPPINGS new file mode 100644 index 00000000..776fb9fe --- /dev/null +++ b/jtag/data/analog/bf537/STEPPINGS @@ -0,0 +1,25 @@ +# +# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Richard Klingler +# + +# bits 31-28 of the Device Identification Register +0000 bf537 0 +0001 bf537 1 +0010 bf537 2 diff --git a/jtag/data/analog/bf537/bf537 b/jtag/data/analog/bf537/bf537 new file mode 100644 index 00000000..e67db34f --- /dev/null +++ b/jtag/data/analog/bf537/bf537 @@ -0,0 +1,454 @@ +signal ADDR1 +signal ADDR2 +signal ADDR3 +signal ADDR4 +signal ADDR5 +signal ADDR6 +signal ADDR7 +signal ADDR8 +signal ADDR9 +signal ADDR10 +signal ADDR11 +signal ADDR12 +signal ADDR13 +signal ADDR14 +signal ADDR15 +signal ADDR16 +signal ADDR17 +signal ADDR18 +signal ADDR19 +signal AMS_B0 +signal AMS_B1 +signal AMS_B2 +signal AMS_B3 +signal AOE_B +signal ARDY +signal ARE_B +signal AWE_B +signal ABE_B0 +signal ABE_B1 +signal BG_B +signal BGH_B +signal BMODE0 +signal BMODE1 +signal BMODE2 +signal BR_B +signal DATA0 +signal DATA1 +signal DATA2 +signal DATA3 +signal DATA4 +signal DATA5 +signal DATA6 +signal DATA7 +signal DATA8 +signal DATA9 +signal DATA10 +signal DATA11 +signal DATA12 +signal DATA13 +signal DATA14 +signal DATA15 +signal NMI +signal PF0 +signal PF1 +signal PF2 +signal PF3 +signal PF4 +signal PF5 +signal PF6 +signal PF7 +signal PF8 +signal PF9 +signal PF10 +signal PF11 +signal PF12 +signal PF13 +signal PF14 +signal PF15 +signal PG0 +signal PG1 +signal PG2 +signal PG3 +signal PG4 +signal PG5 +signal PG6 +signal PG7 +signal PG8 +signal PG9 +signal PG10 +signal PG11 +signal PG12 +signal PG13 +signal PG14 +signal PG15 +signal PH0 +signal PH1 +signal PH2 +signal PH3 +signal PH4 +signal PH5 +signal PH6 +signal PH7 +signal PH8 +signal PH9 +signal PH10 +signal PH11 +signal PH12 +signal PH13 +signal PH14 +signal PH15 +signal PJ0 +signal PJ1 +signal PJ2 +signal PJ3 +signal PJ4 +signal PJ5 +signal PJ6 +signal PJ7 +signal PJ8 +signal PJ9 +signal PJ10 +signal PJ11 +signal RESET_B +signal CLKOUT +signal SA10 +signal SCAS_B +signal SCKE +signal SMS_B +signal SRAS_B +signal SWE_B +signal TDI +signal TDO +signal TCK +signal TMS +signal TRST_B +signal TEST +signal EMU_B +signal RTXI +signal RTXO +signal VDD_INT0 +signal VDD_INT1 +signal VDD_INT2 +signal VDD_INT3 +signal VDD_INT4 +signal VDD_INT5 +signal VDD_INT6 +signal VDD_EXT0 +signal VDD_EXT1 +signal VDD_EXT2 +signal VDD_EXT3 +signal VDD_EXT4 +signal VDD_EXT5 +signal VDD_EXT6 +signal VDD_EXT7 +signal VDD_EXT8 +signal VDD_EXT9 +signal VDD_EXT10 +signal VDD_EXT11 +signal VDD_EXT12 +signal VDD_EXT13 +signal VDD_EXT14 +signal VDD_EXT15 +signal GND0 +signal GND1 +signal GND2 +signal GND3 +signal GND4 +signal GND5 +signal GND6 +signal GND7 +signal GND8 +signal GND9 +signal GND10 +signal GND11 +signal GND12 +signal GND13 +signal GND14 +signal GND15 +signal GND16 +signal GND17 +signal GND18 +signal GND19 +signal GND20 +signal GND21 +signal GND22 +signal GND23 +signal VDD_RTC +signal CLKIN +signal XTAL +signal CLKBUF +signal VROUT0 + +register BSR 261 +register BR 1 +register DIR 32 + +instruction length 5 + +instruction BYPASS 11111 BR +instruction EXTEST 00000 BSR +instruction SAMPLE/PRELOAD 10000 BSR +instruction IDCODE 00010 DIR + +bit 260 C 0 * +bit 259 O 1 DATA0 260 0 Z +bit 258 I 1 DATA0 +bit 257 O 1 DATA1 260 0 Z +bit 256 I 1 DATA1 +bit 255 O 1 DATA2 260 0 Z +bit 254 I 1 DATA2 +bit 253 O 1 DATA3 260 0 Z +bit 252 I 1 DATA3 +bit 251 O 1 DATA4 260 0 Z +bit 250 I 1 DATA4 +bit 249 O 1 DATA5 260 0 Z +bit 248 I 1 DATA5 +bit 247 O 1 DATA6 260 0 Z +bit 246 I 1 DATA6 +bit 245 O 1 DATA7 260 0 Z +bit 244 I 1 DATA7 +bit 243 O 1 DATA8 260 0 Z +bit 242 I 1 DATA8 +bit 241 O 1 DATA9 260 0 Z +bit 240 I 1 DATA9 +bit 239 O 1 DATA10 260 0 Z +bit 238 I 1 DATA10 +bit 237 O 1 DATA11 260 0 Z +bit 236 I 1 DATA11 +bit 235 O 1 DATA12 260 0 Z +bit 234 I 1 DATA12 +bit 233 O 1 DATA13 260 0 Z +bit 232 I 1 DATA13 +bit 231 O 1 DATA14 260 0 Z +bit 230 I 1 DATA14 +bit 229 O 1 DATA15 260 0 Z +bit 228 I 1 DATA15 +bit 227 I 1 TEST +bit 226 I 1 BMODE0 +bit 225 I 1 BMODE1 +bit 224 I 1 BMODE2 +bit 223 C 0 * +bit 222 O 1 PF0 223 0 Z +bit 221 I 1 PF0 +bit 220 C 0 * +bit 219 O 1 PF1 220 0 Z +bit 218 I 1 PF1 +bit 217 C 0 * +bit 216 O 1 PF2 217 0 Z +bit 215 I 1 PF2 +bit 214 C 0 * +bit 213 O 1 PF3 214 0 Z +bit 212 I 1 PF3 +bit 211 C 0 * +bit 210 O 1 PF4 211 0 Z +bit 209 I 1 PF4 +bit 208 C 0 * +bit 207 O 1 PF5 208 0 Z +bit 206 I 1 PF5 +bit 205 C 0 * +bit 204 O 1 PF6 205 0 Z +bit 203 I 1 PF6 +bit 202 C 0 * +bit 201 O 1 PF7 202 0 Z +bit 200 I 1 PF7 +bit 199 C 0 * +bit 198 O 1 PF8 199 0 Z +bit 197 I 1 PF8 +bit 196 C 0 * +bit 195 O 1 PF9 196 0 Z +bit 194 I 1 PF9 +bit 193 C 0 * +bit 192 O 1 PF10 193 0 Z +bit 191 I 1 PF10 +bit 190 C 0 * +bit 189 O 1 PF11 190 0 Z +bit 188 I 1 PF11 +bit 187 C 0 * +bit 186 O 1 PF12 187 0 Z +bit 185 I 1 PF12 +bit 184 C 0 * +bit 183 O 1 PF13 184 0 Z +bit 182 I 1 PF13 +bit 181 C 0 * +bit 180 O 1 PF14 181 0 Z +bit 179 I 1 PF14 +bit 178 C 0 * +bit 177 O 1 PF15 178 0 Z +bit 176 I 1 PF15 +bit 175 C 0 * +bit 174 O 1 PG0 175 0 Z +bit 173 I 1 PG0 +bit 172 C 0 * +bit 171 O 1 PG1 172 0 Z +bit 170 I 1 PG1 +bit 169 C 0 * +bit 168 O 1 PG2 169 0 Z +bit 167 I 1 PG2 +bit 166 C 0 * +bit 165 O 1 PG3 166 0 Z +bit 164 I 1 PG3 +bit 163 C 0 * +bit 162 O 1 PG4 163 0 Z +bit 161 I 1 PG4 +bit 160 C 0 * +bit 159 O 1 PG5 160 0 Z +bit 158 I 1 PG5 +bit 157 C 0 * +bit 156 O 1 PG6 157 0 Z +bit 155 I 1 PG6 +bit 154 C 0 * +bit 153 O 1 PG7 154 0 Z +bit 152 I 1 PG7 +bit 151 C 0 * +bit 150 O 1 PG10 151 0 Z +bit 149 I 1 PG10 +bit 148 C 0 * +bit 147 O 1 PG11 148 0 Z +bit 146 I 1 PG11 +bit 145 C 0 * +bit 144 O 1 PG12 145 0 Z +bit 143 I 1 PG12 +bit 142 C 0 * +bit 141 O 1 PG8 142 0 Z +bit 140 I 1 PG8 +bit 139 C 0 * +bit 138 O 1 PG9 139 0 Z +bit 137 I 1 PG9 +bit 136 C 0 * +bit 135 O 1 PG13 136 0 Z +bit 134 I 1 PG13 +bit 133 C 0 * +bit 132 O 1 PG14 133 0 Z +bit 131 I 1 PG14 +bit 130 C 0 * +bit 129 O 1 PG15 130 0 Z +bit 128 I 1 PG15 +bit 127 C 0 * +bit 126 O 1 PH0 127 0 Z +bit 125 I 1 PH0 +bit 124 C 0 * +bit 123 O 1 PH1 124 0 Z +bit 122 I 1 PH1 +bit 121 C 0 * +bit 120 O 1 PH2 121 0 Z +bit 119 I 1 PH2 +bit 118 C 0 * +bit 117 O 1 PH3 118 0 Z +bit 116 I 1 PH3 +bit 115 C 0 * +bit 114 O 1 PH4 115 0 Z +bit 113 I 1 PH4 +bit 112 C 0 * +bit 111 O 1 PH5 112 0 Z +bit 110 I 1 PH5 +bit 109 C 0 * +bit 108 O 1 PH6 109 0 Z +bit 107 I 1 PH6 +bit 106 C 0 * +bit 105 O 1 PH7 106 0 Z +bit 104 I 1 PH7 +bit 103 C 0 * +bit 102 O 1 PH8 103 0 Z +bit 101 I 1 PH8 +bit 100 C 0 * +bit 99 O 1 PH9 100 0 Z +bit 98 I 1 PH9 +bit 97 C 0 * +bit 96 O 1 PH10 97 0 Z +bit 95 I 1 PH10 +bit 94 C 0 * +bit 93 O 1 PH11 94 0 Z +bit 92 I 1 PH11 +bit 91 C 0 * +bit 90 O 1 PH12 91 0 Z +bit 89 I 1 PH12 +bit 88 C 0 * +bit 87 O 1 PH13 88 0 Z +bit 86 I 1 PH13 +bit 85 C 0 * +bit 84 O 1 PH14 85 0 Z +bit 83 I 1 PH14 +bit 82 C 0 * +bit 81 O 1 PH15 82 0 Z +bit 80 I 1 PH15 +bit 79 C 0 * +bit 78 O 1 PJ0 79 0 Z +bit 77 I 1 PJ0 +bit 76 C 0 * +bit 75 O 1 PJ1 76 0 Z +bit 74 I 1 PJ1 +bit 73 C 0 * +bit 72 O 1 PJ6 73 0 Z +bit 71 I 1 PJ6 +bit 70 C 0 * +bit 69 O 1 PJ7 70 0 Z +bit 68 I 1 PJ7 +bit 67 C 0 * +bit 66 O 1 PJ8 67 0 Z +bit 65 I 1 PJ8 +bit 64 C 0 * +bit 63 O 1 PJ4 64 0 Z +bit 62 I 1 PJ4 +bit 61 C 0 * +bit 60 O 1 PJ5 61 0 Z +bit 59 I 1 PJ5 +bit 58 C 0 * +bit 57 O 1 PJ9 58 0 Z +bit 56 I 1 PJ9 +bit 55 C 0 * +bit 54 O 1 PJ10 55 0 Z +bit 53 I 1 PJ10 +bit 52 C 0 * +bit 51 O 1 PJ11 52 0 Z +bit 50 I 1 PJ11 +bit 49 C 0 * +bit 48 O 1 PJ2 49 0 Z +bit 47 I 1 PJ2 +bit 46 C 0 * +bit 45 O 1 PJ3 46 0 Z +bit 44 I 1 PJ3 +bit 43 I 1 NMI +bit 42 I 1 RESET_B +bit 41 O 1 SCKE 39 0 Z +bit 40 O 1 SMS_B 39 0 Z +bit 39 C 0 * +bit 38 O 1 CLKOUT 39 0 Z +bit 37 O 1 SRAS_B 39 0 Z +bit 36 O 1 SCAS_B 39 0 Z +bit 35 O 1 SWE_B 39 0 Z +bit 34 O 1 SA10 39 0 Z +bit 33 I 1 BR_B +bit 32 I 1 ARDY +bit 31 O 1 AMS_B0 27 0 Z +bit 30 O 1 AMS_B1 27 0 Z +bit 29 O 1 AMS_B2 27 0 Z +bit 28 O 1 AMS_B3 27 0 Z +bit 27 C 0 * +bit 26 O 1 AOE_B 27 0 Z +bit 25 O 1 ARE_B 27 0 Z +bit 24 O 1 AWE_B 27 0 Z +bit 23 O 1 ABE_B0 17 0 Z +bit 22 O 1 ABE_B1 17 0 Z +bit 21 O 1 ADDR1 17 0 Z +bit 20 O 1 ADDR2 17 0 Z +bit 19 O 1 ADDR3 17 0 Z +bit 18 O 1 ADDR4 17 0 Z +bit 17 C 0 * +bit 16 O 1 ADDR5 17 0 Z +bit 15 O 1 ADDR6 17 0 Z +bit 14 O 1 ADDR7 17 0 Z +bit 13 O 1 ADDR8 17 0 Z +bit 12 O 1 ADDR9 17 0 Z +bit 11 O 1 ADDR10 17 0 Z +bit 10 O 1 ADDR11 17 0 Z +bit 9 O 1 ADDR12 17 0 Z +bit 8 O 1 ADDR13 17 0 Z +bit 7 O 1 ADDR14 17 0 Z +bit 6 O 1 ADDR15 17 0 Z +bit 5 O 1 ADDR16 17 0 Z +bit 4 O 1 ADDR17 17 0 Z +bit 3 O 1 ADDR18 17 0 Z +bit 2 O 1 ADDR19 17 0 Z +bit 1 O 1 BGH_B +bit 0 O 1 BG_B diff --git a/jtag/data/analog/bf549/STEPPINGS b/jtag/data/analog/bf549/STEPPINGS new file mode 100644 index 00000000..464ef8d6 --- /dev/null +++ b/jtag/data/analog/bf549/STEPPINGS @@ -0,0 +1,24 @@ +# +# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Richard Klingler +# + +# bits 31-28 of the Device Identification Register +0000 bf549 0 +0001 bf549 1 diff --git a/jtag/data/analog/bf549/bf549 b/jtag/data/analog/bf549/bf549 new file mode 100644 index 00000000..be2c70b4 --- /dev/null +++ b/jtag/data/analog/bf549/bf549 @@ -0,0 +1,1047 @@ +signal PORTA_0 +signal PORTA_1 +signal PORTA_2 +signal PORTA_3 +signal PORTA_4 +signal PORTA_5 +signal PORTA_6 +signal PORTA_7 +signal PORTA_8 +signal PORTA_9 +signal PORTA_10 +signal PORTA_11 +signal PORTA_12 +signal PORTA_13 +signal PORTA_14 +signal PORTA_15 +signal PORTB_0 +signal PORTB_1 +signal PORTB_2 +signal PORTB_3 +signal PORTB_4 +signal PORTB_5 +signal PORTB_6 +signal PORTB_7 +signal PORTB_8 +signal PORTB_9 +signal PORTB_10 +signal PORTB_11 +signal PORTB_12 +signal PORTB_13 +signal PORTB_14 +signal PORTC_0 +signal PORTC_1 +signal PORTC_2 +signal PORTC_3 +signal PORTC_4 +signal PORTC_5 +signal PORTC_6 +signal PORTC_7 +signal PORTC_8 +signal PORTC_9 +signal PORTC_10 +signal PORTC_11 +signal PORTC_12 +signal PORTC_13 +signal PORTD_0 +signal PORTD_1 +signal PORTD_2 +signal PORTD_3 +signal PORTD_4 +signal PORTD_5 +signal PORTD_6 +signal PORTD_7 +signal PORTD_8 +signal PORTD_9 +signal PORTD_10 +signal PORTD_11 +signal PORTD_12 +signal PORTD_13 +signal PORTD_14 +signal PORTD_15 +signal PORTE_0 +signal PORTE_1 +signal PORTE_2 +signal PORTE_3 +signal PORTE_4 +signal PORTE_5 +signal PORTE_6 +signal PORTE_7 +signal PORTE_8 +signal PORTE_9 +signal PORTE_10 +signal PORTE_11 +signal PORTE_12 +signal PORTE_13 +signal PORTE_14 +signal PORTE_15 +signal PORTF_0 +signal PORTF_1 +signal PORTF_2 +signal PORTF_3 +signal PORTF_4 +signal PORTF_5 +signal PORTF_6 +signal PORTF_7 +signal PORTF_8 +signal PORTF_9 +signal PORTF_10 +signal PORTF_11 +signal PORTF_12 +signal PORTF_13 +signal PORTF_14 +signal PORTF_15 +signal PORTG_0 +signal PORTG_1 +signal PORTG_2 +signal PORTG_3 +signal PORTG_4 +signal PORTG_5 +signal PORTG_6 +signal PORTG_7 +signal PORTG_8 +signal PORTG_9 +signal PORTG_10 +signal PORTG_11 +signal PORTG_12 +signal PORTG_13 +signal PORTG_14 +signal PORTG_15 +signal PORTH_0 +signal PORTH_1 +signal PORTH_2 +signal PORTH_3 +signal PORTH_4 +signal PORTH_5 +signal PORTH_6 +signal PORTH_7 +signal PORTH_8 +signal PORTH_9 +signal PORTH_10 +signal PORTH_11 +signal PORTH_12 +signal PORTH_13 +signal PORTI_0 +signal PORTI_1 +signal PORTI_2 +signal PORTI_3 +signal PORTI_4 +signal PORTI_5 +signal PORTI_6 +signal PORTI_7 +signal PORTI_8 +signal PORTI_9 +signal PORTI_10 +signal PORTI_11 +signal PORTI_12 +signal PORTI_13 +signal PORTI_14 +signal PORTI_15 +signal PORTJ_0 +signal PORTJ_1 +signal PORTJ_2 +signal PORTJ_3 +signal PORTJ_4 +signal PORTJ_5 +signal PORTJ_6 +signal PORTJ_7 +signal PORTJ_8 +signal PORTJ_9 +signal PORTJ_10 +signal PORTJ_11 +signal PORTJ_12 +signal PORTJ_13 +signal ATAPI_PDIAG +signal ABE0B +signal ABE1B +signal CLKOUT +signal DQ0 +signal DQ1 +signal DQ2 +signal DQ3 +signal DQ4 +signal DQ5 +signal DQ6 +signal DQ7 +signal DQ8 +signal DQ9 +signal DQ10 +signal DQ11 +signal DQ12 +signal DQ13 +signal DQ14 +signal DQ15 +signal LDM +signal UDM +signal LDQS +signal UDQS +signal BA0 +signal BA1 +signal A0 +signal A1 +signal A2 +signal A3 +signal A4 +signal A5 +signal A6 +signal A7 +signal A8 +signal A9 +signal A10 +signal A11 +signal A12 +signal WE_B +signal CAS_B +signal RAS_B +signal CS0_B +signal CS1_B +signal CKE +signal CK2_B +signal CK2 +signal CK1_B +signal CK1 +signal DATA15 +signal DATA14 +signal DATA13 +signal DATA12 +signal DATA11 +signal DATA10 +signal DATA9 +signal DATA8 +signal DATA7 +signal DATA6 +signal DATA5 +signal DATA4 +signal DATA3 +signal DATA2 +signal DATA1 +signal DATA0 +signal AWEB +signal AREB +signal RESETB +signal NMIB +signal AOEB +signal AMS3B +signal AMS2B +signal AMS1B +signal AMS0B +signal ADDR3 +signal ADDR2 +signal ADDR1 +signal MFS +signal BMODE0 +signal BMODE1 +signal BMODE2 +signal BMODE3 +signal TCK +signal TDI +signal TDO +signal TMS +signal TRSTB +signal EMU_B +signal IVDD0 +signal IVDD1 +signal IVDD2 +signal IVDD3 +signal IVDD4 +signal IVDD5 +signal IVDD6 +signal IVDD7 +signal IVDD8 +signal IVDD9 +signal IVDD10 +signal IVDD11 +signal IVDD12 +signal IVDD13 +signal IVDD14 +signal EVDD0 +signal EVDD1 +signal EVDD2 +signal EVDD3 +signal EVDD4 +signal EVDD5 +signal EVDD6 +signal EVDD7 +signal EVDD8 +signal EVDD9 +signal EVDD10 +signal EVDD11 +signal EVDD12 +signal EVDD13 +signal EVDD14 +signal EVDD15 +signal EVDD16 +signal EVDD17 +signal EVDD18 +signal EVDD19 +signal EVDD20 +signal EVDD21 +signal EVDD22 +signal EVDD23 +signal EVDD24 +signal EVDD25 +signal EVDD26 +signal EVDD27 +signal EVDD28 +signal EVDD29 +signal EVDD30 +signal EVDD31 +signal DVDD0 +signal DVDD1 +signal DVDD2 +signal DVDD3 +signal DVDD4 +signal DVDD5 +signal DVDD6 +signal DVDD7 +signal DVDD8 +signal DVDD9 +signal DVDD10 +signal GND0 +signal GND1 +signal GND2 +signal GND3 +signal GND4 +signal GND5 +signal GND6 +signal GND7 +signal GND8 +signal GND9 +signal GND10 +signal GND11 +signal GND12 +signal GND13 +signal GND14 +signal GND15 +signal GND16 +signal GND17 +signal GND18 +signal GND19 +signal GND20 +signal GND21 +signal GND22 +signal GND23 +signal GND24 +signal GND25 +signal GND26 +signal GND27 +signal GND28 +signal GND29 +signal GND30 +signal GND31 +signal GND32 +signal GND33 +signal GND34 +signal GND35 +signal GND36 +signal GND37 +signal GND38 +signal GND39 +signal GND40 +signal GND41 +signal GND42 +signal GND43 +signal GND44 +signal GND45 +signal GND46 +signal GND47 +signal GND48 +signal GND49 +signal GND50 +signal GND51 +signal GND52 +signal GND53 +signal GND54 +signal GND55 +signal GND56 +signal GND57 +signal GND58 +signal GND59 +signal GND60 +signal GND61 +signal GND62 +signal GND63 +signal GND64 +signal GND65 +signal GND66 +signal GND67 +signal GND68 +signal GND69 +signal EGND_MC +signal EGND_MX +signal EVDD_MC +signal EVDD_MX +signal IVDD_MP +signal IGND_MP +signal RTCVDD +signal EXT_WAKE +signal DDR_VREF +signal DDR_VSSR +signal CLKIN +signal XTAL +signal RTXI +signal RTXO +signal PHYCLK +signal MLF_M +signal MLF_P +signal MXI +signal MXO +signal VROUT_A +signal VROUT_B +signal USB_DP +signal USB_DM +signal USB_ID +signal USB_RSET +signal USB_VBUS +signal USB_VDDA +signal USB_VDDB +signal USB_VREF +signal USB_XI + +register BSR 636 +register BR 1 +register DIR 32 + +instruction length 5 + +instruction EXTEST 00000 BSR +instruction SAMPLE/PRELOAD 10000 BSR +instruction IDCODE 00010 DIR +instruction BYPASS 11111 BR + +bit 635 C 0 * +bit 634 O 1 PORTA_10 635 0 Z +bit 633 I 1 PORTA_10 +bit 632 C 0 * +bit 631 O 1 PORTA_11 632 0 Z +bit 630 I 1 PORTA_11 +bit 629 C 0 * +bit 628 O 1 PORTA_12 629 0 Z +bit 627 I 1 PORTA_12 +bit 626 C 0 * +bit 625 O 1 PORTA_13 626 0 Z +bit 624 I 1 PORTA_13 +bit 623 C 0 * +bit 622 O 1 PORTA_14 623 0 Z +bit 621 I 1 PORTA_14 +bit 620 C 0 * +bit 619 O 1 PORTA_15 620 0 Z +bit 618 I 1 PORTA_15 +bit 617 C 0 * +bit 616 O 1 PORTB_12 617 0 Z +bit 615 I 1 PORTB_12 +bit 614 C 0 * +bit 613 O 1 PORTB_13 614 0 Z +bit 612 I 1 PORTB_13 +bit 611 C 0 * +bit 610 O 1 PORTB_14 611 0 Z +bit 609 I 1 PORTB_14 +bit 608 C 0 * +bit 607 O 1 PORTB_8 608 0 Z +bit 606 I 1 PORTB_8 +bit 605 C 0 * +bit 604 O 1 PORTB_9 605 0 Z +bit 603 I 1 PORTB_9 +bit 602 C 0 * +bit 601 O 1 PORTB_10 602 0 Z +bit 600 I 1 PORTB_10 +bit 599 C 0 * +bit 598 O 1 PORTB_11 599 0 Z +bit 597 I 1 PORTB_11 +bit 596 C 0 * +bit 595 O 1 PORTB_4 596 0 Z +bit 594 I 1 PORTB_4 +bit 593 C 0 * +bit 592 O 1 PORTB_5 593 0 Z +bit 591 I 1 PORTB_5 +bit 590 C 0 * +bit 589 O 1 PORTB_6 590 0 Z +bit 588 I 1 PORTB_6 +bit 587 C 0 * +bit 586 O 1 PORTB_7 587 0 Z +bit 585 I 1 PORTB_7 +bit 584 O 1 * +bit 583 O 1 PORTB_1 583 1 Z +bit 582 I 1 PORTB_1 +bit 581 O 1 * +bit 580 O 1 PORTB_0 580 1 Z +bit 579 I 1 PORTB_0 +bit 578 C 0 * +bit 577 O 1 PORTB_2 578 0 Z +bit 576 I 1 PORTB_2 +bit 575 C 0 * +bit 574 O 1 PORTB_3 575 0 Z +bit 573 I 1 PORTB_3 +bit 572 O 0 * +bit 571 I 1 BMODE3 +bit 570 I 1 BMODE2 +bit 569 I 1 BMODE1 +bit 568 I 1 BMODE0 +bit 567 C 0 * +bit 566 O 1 PORTD_14 567 0 Z +bit 565 I 1 PORTD_14 +bit 564 C 0 * +bit 563 O 1 PORTD_15 564 0 Z +bit 562 I 1 PORTD_15 +bit 561 C 0 * +bit 560 O 1 PORTD_13 561 0 Z +bit 559 I 1 PORTD_13 +bit 558 C 0 * +bit 557 O 1 PORTD_12 558 0 Z +bit 556 I 1 PORTD_12 +bit 555 C 0 * +bit 554 O 1 PORTD_11 555 0 Z +bit 553 I 1 PORTD_11 +bit 552 C 0 * +bit 551 O 1 PORTD_10 552 0 Z +bit 550 I 1 PORTD_10 +bit 549 C 0 * +bit 548 O 1 PORTD_9 549 0 Z +bit 547 I 1 PORTD_9 +bit 546 C 0 * +bit 545 O 1 PORTD_8 546 0 Z +bit 544 I 1 PORTD_8 +bit 543 C 0 * +bit 542 O 1 PORTD_7 543 0 Z +bit 541 I 1 PORTD_7 +bit 540 C 0 * +bit 539 O 1 PORTD_6 540 0 Z +bit 538 I 1 PORTD_6 +bit 537 C 0 * +bit 536 O 1 PORTD_5 537 0 Z +bit 535 I 1 PORTD_5 +bit 534 C 0 * +bit 533 O 1 PORTD_4 534 0 Z +bit 532 I 1 PORTD_4 +bit 531 C 0 * +bit 530 O 1 PORTD_3 531 0 Z +bit 529 I 1 PORTD_3 +bit 528 C 0 * +bit 527 O 1 PORTD_2 528 0 Z +bit 526 I 1 PORTD_2 +bit 525 C 0 * +bit 524 O 1 PORTD_1 525 0 Z +bit 523 I 1 PORTD_1 +bit 522 C 0 * +bit 521 O 1 PORTD_0 522 0 Z +bit 520 I 1 PORTD_0 +bit 519 C 0 * +bit 518 O 1 PORTE_13 519 0 Z +bit 517 I 1 PORTE_13 +bit 516 C 0 * +bit 515 O 1 PORTE_12 516 0 Z +bit 514 I 1 PORTE_12 +bit 513 C 0 * +bit 512 O 1 PORTE_11 513 0 Z +bit 511 I 1 PORTE_11 +bit 510 C 0 * +bit 509 O 1 PORTG_4 510 0 Z +bit 508 I 1 PORTG_4 +bit 507 C 0 * +bit 506 O 1 PORTG_3 507 0 Z +bit 505 I 1 PORTG_3 +bit 504 C 0 * +bit 503 O 1 PORTF_15 504 0 Z +bit 502 I 1 PORTF_15 +bit 501 C 0 * +bit 500 O 1 PORTF_14 501 0 Z +bit 499 I 1 PORTF_14 +bit 498 C 0 * +bit 497 O 1 PORTF_13 498 0 Z +bit 496 I 1 PORTF_13 +bit 495 C 0 * +bit 494 O 1 PORTF_12 495 0 Z +bit 493 I 1 PORTF_12 +bit 492 C 0 * +bit 491 O 1 PORTF_11 492 0 Z +bit 490 I 1 PORTF_11 +bit 489 C 0 * +bit 488 O 1 PORTF_10 489 0 Z +bit 487 I 1 PORTF_10 +bit 486 C 0 * +bit 485 O 1 PORTF_9 486 0 Z +bit 484 I 1 PORTF_9 +bit 483 C 0 * +bit 482 O 1 PORTF_8 483 0 Z +bit 481 I 1 PORTF_8 +bit 480 C 0 * +bit 479 O 1 PORTF_7 480 0 Z +bit 478 I 1 PORTF_7 +bit 477 C 0 * +bit 476 O 1 PORTF_6 477 0 Z +bit 475 I 1 PORTF_6 +bit 474 C 0 * +bit 473 O 1 PORTF_5 474 0 Z +bit 472 I 1 PORTF_5 +bit 471 C 0 * +bit 470 O 1 PORTF_4 471 0 Z +bit 469 I 1 PORTF_4 +bit 468 C 0 * +bit 467 O 1 PORTF_3 468 0 Z +bit 466 I 1 PORTF_3 +bit 465 C 0 * +bit 464 O 1 PORTF_2 465 0 Z +bit 463 I 1 PORTF_2 +bit 462 C 0 * +bit 461 O 1 PORTF_1 462 0 Z +bit 460 I 1 PORTF_1 +bit 459 C 0 * +bit 458 O 1 PORTF_0 459 0 Z +bit 457 I 1 PORTF_0 +bit 456 C 0 * +bit 455 O 1 PORTG_2 456 0 Z +bit 454 I 1 PORTG_2 +bit 453 C 0 * +bit 452 O 1 PORTG_1 453 0 Z +bit 451 I 1 PORTG_1 +bit 450 C 0 * +bit 449 O 1 PORTG_0 450 0 Z +bit 448 I 1 PORTG_0 +bit 447 C 0 * +bit 446 O 1 PORTC_3 447 0 Z +bit 445 I 1 PORTC_3 +bit 444 C 0 * +bit 443 O 1 PORTC_2 444 0 Z +bit 442 I 1 PORTC_2 +bit 441 C 0 * +bit 440 O 1 PORTC_1 441 0 Z +bit 439 I 1 PORTC_1 +bit 438 C 0 * +bit 437 O 1 PORTC_0 438 0 Z +bit 436 I 1 PORTC_0 +bit 435 C 0 * +bit 434 O 1 PORTC_7 435 0 Z +bit 433 I 1 PORTC_7 +bit 432 C 0 * +bit 431 O 1 PORTC_6 432 0 Z +bit 430 I 1 PORTC_6 +bit 429 C 0 * +bit 428 O 1 PORTC_5 429 0 Z +bit 427 I 1 PORTC_5 +bit 426 C 0 * +bit 425 O 1 PORTC_4 426 0 Z +bit 424 I 1 PORTC_4 +bit 423 C 0 * +bit 422 O 1 PORTH_7 423 0 Z +bit 421 I 1 PORTH_7 +bit 420 C 0 * +bit 419 O 1 PORTH_5 420 0 Z +bit 418 I 1 PORTH_5 +bit 417 C 0 * +bit 416 O 1 MFS 417 0 Z +bit 415 I 1 MFS +bit 414 C 0 * +bit 413 O 1 PORTH_6 414 0 Z +bit 412 I 1 PORTH_6 +bit 411 C 0 * +bit 410 O 1 ADDR1 411 0 Z +bit 409 I 1 ADDR1 +bit 408 C 0 * +bit 407 O 1 ADDR2 408 0 Z +bit 406 I 1 ADDR2 +bit 405 C 0 * +bit 404 O 1 ADDR3 405 0 Z +bit 403 I 1 ADDR3 +bit 402 C 0 * +bit 401 O 1 PORTH_8 402 0 Z +bit 400 I 1 PORTH_8 +bit 399 C 0 * +bit 398 O 1 PORTH_9 399 0 Z +bit 397 I 1 PORTH_9 +bit 396 C 0 * +bit 395 O 1 PORTH_10 396 0 Z +bit 394 I 1 PORTH_10 +bit 393 C 0 * +bit 392 O 1 PORTH_11 393 0 Z +bit 391 I 1 PORTH_11 +bit 390 C 0 * +bit 389 O 1 PORTH_12 390 0 Z +bit 388 I 1 PORTH_12 +bit 387 C 0 * +bit 386 O 1 PORTH_13 387 0 Z +bit 385 I 1 PORTH_13 +bit 384 C 0 * +bit 383 O 1 PORTI_0 384 0 Z +bit 382 I 1 PORTI_0 +bit 381 C 0 * +bit 380 O 1 PORTI_1 381 0 Z +bit 379 I 1 PORTI_1 +bit 378 C 0 * +bit 377 O 1 PORTI_2 378 0 Z +bit 376 I 1 PORTI_2 +bit 375 C 0 * +bit 374 O 1 PORTI_3 375 0 Z +bit 373 I 1 PORTI_3 +bit 372 C 0 * +bit 371 O 1 PORTI_4 372 0 Z +bit 370 I 1 PORTI_4 +bit 369 C 0 * +bit 368 O 1 PORTI_5 369 0 Z +bit 367 I 1 PORTI_5 +bit 366 C 0 * +bit 365 O 1 PORTI_6 366 0 Z +bit 364 I 1 PORTI_6 +bit 363 C 0 * +bit 362 O 1 PORTI_7 363 0 Z +bit 361 I 1 PORTI_7 +bit 360 C 0 * +bit 359 O 1 PORTI_8 360 0 Z +bit 358 I 1 PORTI_8 +bit 357 C 0 * +bit 356 O 1 PORTI_9 357 0 Z +bit 355 I 1 PORTI_9 +bit 354 C 0 * +bit 353 O 1 PORTI_10 354 0 Z +bit 352 I 1 PORTI_10 +bit 351 C 0 * +bit 350 O 1 PORTI_11 351 0 Z +bit 349 I 1 PORTI_11 +bit 348 C 0 * +bit 347 O 1 PORTI_12 348 0 Z +bit 346 I 1 PORTI_12 +bit 345 C 0 * +bit 344 O 1 PORTI_13 345 0 Z +bit 343 I 1 PORTI_13 +bit 342 C 0 * +bit 341 O 1 PORTI_14 342 0 Z +bit 340 I 1 PORTI_14 +bit 339 C 0 * +bit 338 O 1 PORTI_15 339 0 Z +bit 337 I 1 PORTI_15 +bit 336 C 0 * +bit 335 O 1 AMS0B 336 0 Z +bit 334 I 1 AMS0B +bit 333 C 0 * +bit 332 O 1 AMS1B 333 0 Z +bit 331 I 1 AMS1B +bit 330 C 0 * +bit 329 O 1 AMS2B 330 0 Z +bit 328 I 1 AMS2B +bit 327 C 0 * +bit 326 O 1 AMS3B 327 0 Z +bit 325 I 1 AMS3B +bit 324 C 0 * +bit 323 O 1 AOEB 324 0 Z +bit 322 I 1 AOEB +bit 321 I 1 NMIB +bit 320 I 1 RESETB +bit 319 C 0 * +bit 318 O 1 AREB 319 0 Z +bit 317 I 1 AREB +bit 316 C 0 * +bit 315 O 1 AWEB 316 0 Z +bit 314 I 1 AWEB +bit 313 C 0 * +bit 312 O 1 DATA0 313 0 Z +bit 311 I 1 DATA0 +bit 310 C 0 * +bit 309 O 1 DATA1 310 0 Z +bit 308 I 1 DATA1 +bit 307 C 0 * +bit 306 O 1 DATA2 307 0 Z +bit 305 I 1 DATA2 +bit 304 C 0 * +bit 303 O 1 DATA3 304 0 Z +bit 302 I 1 DATA3 +bit 301 C 0 * +bit 300 O 1 DATA4 301 0 Z +bit 299 I 1 DATA4 +bit 298 C 0 * +bit 297 O 1 DATA5 298 0 Z +bit 296 I 1 DATA5 +bit 295 C 0 * +bit 294 O 1 DATA6 295 0 Z +bit 293 I 1 DATA6 +bit 292 C 0 * +bit 291 O 1 DATA7 292 0 Z +bit 290 I 1 DATA7 +bit 289 C 0 * +bit 288 O 1 DATA8 289 0 Z +bit 287 I 1 DATA8 +bit 286 C 0 * +bit 285 O 1 DATA9 286 0 Z +bit 284 I 1 DATA9 +bit 283 C 0 * +bit 282 O 1 DATA10 283 0 Z +bit 281 I 1 DATA10 +bit 280 C 0 * +bit 279 O 1 DATA11 280 0 Z +bit 278 I 1 DATA11 +bit 277 C 0 * +bit 276 O 1 DATA12 277 0 Z +bit 275 I 1 DATA12 +bit 274 C 0 * +bit 273 O 1 DATA13 274 0 Z +bit 272 I 1 DATA13 +bit 271 C 0 * +bit 270 O 1 DATA14 271 0 Z +bit 269 I 1 DATA14 +bit 268 C 0 * +bit 267 O 1 DATA15 268 0 Z +bit 266 I 1 DATA15 +bit 265 C 0 * +bit 264 O 1 ABE1B 265 0 Z +bit 263 I 1 ABE1B +bit 262 C 0 * +bit 261 O 1 ABE0B 262 0 Z +bit 260 I 1 ABE0B +bit 259 O 1 CK1 +bit 258 O 1 CK1_B +bit 257 O 1 CK2 +bit 256 O 1 CK2_B +bit 255 O 1 CKE +bit 254 O 1 CS1_B +bit 253 O 1 CS0_B +bit 252 O 1 RAS_B +bit 251 O 1 CAS_B +bit 250 O 1 WE_B +bit 249 O 1 A12 +bit 248 O 1 A11 +bit 247 O 1 A10 +bit 246 O 1 A9 +bit 245 O 1 A8 +bit 244 O 1 A7 +bit 243 O 1 A6 +bit 242 O 1 A5 +bit 241 O 1 A4 +bit 240 O 1 A3 +bit 239 O 1 A2 +bit 238 O 1 A1 +bit 237 O 1 A0 +bit 236 O 1 BA1 +bit 235 O 1 BA0 +bit 234 C 0 * +bit 233 O 1 UDQS 234 0 Z +bit 232 I 1 UDQS +bit 231 C 0 * +bit 230 O 1 LDQS 231 0 Z +bit 229 I 1 LDQS +bit 228 O 1 UDM +bit 227 O 1 LDM +bit 226 C 0 * +bit 225 O 1 DQ15 226 0 Z +bit 224 I 1 DQ15 +bit 223 C 0 * +bit 222 O 1 DQ14 223 0 Z +bit 221 I 1 DQ14 +bit 220 C 0 * +bit 219 O 1 DQ13 220 0 Z +bit 218 I 1 DQ13 +bit 217 C 0 * +bit 216 O 1 DQ12 217 0 Z +bit 215 I 1 DQ12 +bit 214 C 0 * +bit 213 O 1 DQ11 214 0 Z +bit 212 I 1 DQ11 +bit 211 C 0 * +bit 210 O 1 DQ10 211 0 Z +bit 209 I 1 DQ10 +bit 208 C 0 * +bit 207 O 1 DQ9 208 0 Z +bit 206 I 1 DQ9 +bit 205 C 0 * +bit 204 O 1 DQ8 205 0 Z +bit 203 I 1 DQ8 +bit 202 C 0 * +bit 201 O 1 DQ7 202 0 Z +bit 200 I 1 DQ7 +bit 199 C 0 * +bit 198 O 1 DQ6 199 0 Z +bit 197 I 1 DQ6 +bit 196 C 0 * +bit 195 O 1 DQ5 196 0 Z +bit 194 I 1 DQ5 +bit 193 C 0 * +bit 192 O 1 DQ4 193 0 Z +bit 191 I 1 DQ4 +bit 190 C 0 * +bit 189 O 1 DQ3 190 0 Z +bit 188 I 1 DQ3 +bit 187 C 0 * +bit 186 O 1 DQ2 187 0 Z +bit 185 I 1 DQ2 +bit 184 C 0 * +bit 183 O 1 DQ1 184 0 Z +bit 182 I 1 DQ1 +bit 181 C 0 * +bit 180 O 1 DQ0 181 0 Z +bit 179 I 1 DQ0 +bit 178 O 1 CLKOUT +bit 177 C 0 * +bit 176 O 1 PORTJ_11 177 0 Z +bit 175 I 1 PORTJ_11 +bit 174 C 0 * +bit 173 O 1 PORTJ_12 174 0 Z +bit 172 I 1 PORTJ_12 +bit 171 C 0 * +bit 170 O 1 PORTJ_13 171 0 Z +bit 169 I 1 PORTJ_13 +bit 168 C 0 * +bit 167 O 1 PORTJ_0 168 0 Z +bit 166 I 1 PORTJ_0 +bit 165 C 0 * +bit 164 O 1 PORTJ_1 165 0 Z +bit 163 I 1 PORTJ_1 +bit 162 C 0 * +bit 161 O 1 PORTJ_2 162 0 Z +bit 160 I 1 PORTJ_2 +bit 159 C 0 * +bit 158 O 1 PORTJ_3 159 0 Z +bit 157 I 1 PORTJ_3 +bit 156 C 0 * +bit 155 O 1 PORTJ_4 156 0 Z +bit 154 I 1 PORTJ_4 +bit 153 I 1 ATAPI_PDIAG +bit 152 C 0 * +bit 151 O 1 PORTJ_5 152 0 Z +bit 150 I 1 PORTJ_5 +bit 149 C 0 * +bit 148 O 1 PORTJ_6 149 0 Z +bit 147 I 1 PORTJ_6 +bit 146 C 0 * +bit 145 O 1 PORTJ_7 146 0 Z +bit 144 I 1 PORTJ_7 +bit 143 C 0 * +bit 142 O 1 PORTJ_8 143 0 Z +bit 141 I 1 PORTJ_8 +bit 140 C 0 * +bit 139 O 1 PORTJ_9 140 0 Z +bit 138 I 1 PORTJ_9 +bit 137 C 0 * +bit 136 O 1 PORTJ_10 137 0 Z +bit 135 I 1 PORTJ_10 +bit 134 C 0 * +bit 133 O 1 PORTG_13 134 0 Z +bit 132 I 1 PORTG_13 +bit 131 C 0 * +bit 130 O 1 PORTG_12 131 0 Z +bit 129 I 1 PORTG_12 +bit 128 C 0 * +bit 127 O 1 PORTE_7 128 0 Z +bit 126 I 1 PORTE_7 +bit 125 C 0 * +bit 124 O 1 PORTE_8 125 0 Z +bit 123 I 1 PORTE_8 +bit 122 C 0 * +bit 121 O 1 PORTE_9 122 0 Z +bit 120 I 1 PORTE_9 +bit 119 C 0 * +bit 118 O 1 PORTE_10 119 0 Z +bit 117 I 1 PORTE_10 +bit 116 C 0 * +bit 115 O 1 PORTE_0 116 0 Z +bit 114 I 1 PORTE_0 +bit 113 C 0 * +bit 112 O 1 PORTE_1 113 0 Z +bit 111 I 1 PORTE_1 +bit 110 C 0 * +bit 109 O 1 PORTE_2 110 0 Z +bit 108 I 1 PORTE_2 +bit 107 C 0 * +bit 106 O 1 PORTE_4 107 0 Z +bit 105 I 1 PORTE_4 +bit 104 C 0 * +bit 103 O 1 PORTE_5 104 0 Z +bit 102 I 1 PORTE_5 +bit 101 C 0 * +bit 100 O 1 PORTE_6 101 0 Z +bit 99 I 1 PORTE_6 +bit 98 C 0 * +bit 97 O 1 PORTH_4 98 0 Z +bit 96 I 1 PORTH_4 +bit 95 C 0 * +bit 94 O 1 PORTH_3 95 0 Z +bit 93 I 1 PORTH_3 +bit 92 C 0 * +bit 91 O 1 PORTH_2 92 0 Z +bit 90 I 1 PORTH_2 +bit 89 C 0 * +bit 88 O 1 PORTH_0 89 0 Z +bit 87 I 1 PORTH_0 +bit 86 O 1 * +bit 85 O 1 PORTE_15 85 1 Z +bit 84 I 1 PORTE_15 +bit 83 O 1 * +bit 82 O 1 PORTE_14 82 1 Z +bit 81 I 1 PORTE_14 +bit 80 C 0 * +bit 79 O 1 PORTG_8 80 0 Z +bit 78 I 1 PORTG_8 +bit 77 C 0 * +bit 76 O 1 PORTG_9 77 0 Z +bit 75 I 1 PORTG_9 +bit 74 C 0 * +bit 73 O 1 PORTG_10 74 0 Z +bit 72 I 1 PORTG_10 +bit 71 C 0 * +bit 70 O 1 PORTG_11 71 0 Z +bit 69 I 1 PORTG_11 +bit 68 C 0 * +bit 67 O 1 PORTG_5 68 0 Z +bit 66 I 1 PORTG_5 +bit 65 C 0 * +bit 64 O 1 PORTG_6 65 0 Z +bit 63 I 1 PORTG_6 +bit 62 C 0 * +bit 61 O 1 PORTG_7 62 0 Z +bit 60 I 1 PORTG_7 +bit 59 C 0 * +bit 58 O 1 PORTE_3 59 0 Z +bit 57 I 1 PORTE_3 +bit 56 C 0 * +bit 55 O 1 PORTH_1 56 0 Z +bit 54 I 1 PORTH_1 +bit 53 C 0 * +bit 52 O 1 PORTC_13 53 0 Z +bit 51 I 1 PORTC_13 +bit 50 C 0 * +bit 49 O 1 PORTC_12 50 0 Z +bit 48 I 1 PORTC_12 +bit 47 C 0 * +bit 46 O 1 PORTC_11 47 0 Z +bit 45 I 1 PORTC_11 +bit 44 C 0 * +bit 43 O 1 PORTC_10 44 0 Z +bit 42 I 1 PORTC_10 +bit 41 C 0 * +bit 40 O 1 PORTC_9 41 0 Z +bit 39 I 1 PORTC_9 +bit 38 C 0 * +bit 37 O 1 PORTC_8 38 0 Z +bit 36 I 1 PORTC_8 +bit 35 C 0 * +bit 34 O 1 PORTG_15 35 0 Z +bit 33 I 1 PORTG_15 +bit 32 C 0 * +bit 31 O 1 PORTG_14 32 0 Z +bit 30 I 1 PORTG_14 +bit 29 C 0 * +bit 28 O 1 PORTA_0 29 0 Z +bit 27 I 1 PORTA_0 +bit 26 C 0 * +bit 25 O 1 PORTA_1 26 0 Z +bit 24 I 1 PORTA_1 +bit 23 C 0 * +bit 22 O 1 PORTA_2 23 0 Z +bit 21 I 1 PORTA_2 +bit 20 C 0 * +bit 19 O 1 PORTA_3 20 0 Z +bit 18 I 1 PORTA_3 +bit 17 C 0 * +bit 16 O 1 PORTA_4 17 0 Z +bit 15 I 1 PORTA_4 +bit 14 C 0 * +bit 13 O 1 PORTA_5 14 0 Z +bit 12 I 1 PORTA_5 +bit 11 C 0 * +bit 10 O 1 PORTA_6 11 0 Z +bit 9 I 1 PORTA_6 +bit 8 C 0 * +bit 7 O 1 PORTA_7 8 0 Z +bit 6 I 1 PORTA_7 +bit 5 C 0 * +bit 4 O 1 PORTA_8 5 0 Z +bit 3 I 1 PORTA_8 +bit 2 C 0 * +bit 1 O 1 PORTA_9 2 0 Z +bit 0 I 1 PORTA_9 diff --git a/jtag/data/analog/bf561/STEPPINGS b/jtag/data/analog/bf561/STEPPINGS new file mode 100644 index 00000000..d3392f14 --- /dev/null +++ b/jtag/data/analog/bf561/STEPPINGS @@ -0,0 +1,25 @@ +# +# $Id: STEPPINGS 82 2006-11-06 04:22:52Z jiez $ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Richard Klingler +# + +# bits 31-28 of the Device Identification Register +0010 bf561 2 +0011 bf561 3 +0101 bf561 5 diff --git a/jtag/data/analog/bf561/bf561 b/jtag/data/analog/bf561/bf561 new file mode 100644 index 00000000..84581fdd --- /dev/null +++ b/jtag/data/analog/bf561/bf561 @@ -0,0 +1,600 @@ +signal ADDR2 +signal ADDR3 +signal ADDR4 +signal ADDR5 +signal ADDR6 +signal ADDR7 +signal ADDR8 +signal ADDR9 +signal ADDR10 +signal ADDR11 +signal ADDR12 +signal ADDR13 +signal ADDR14 +signal ADDR15 +signal ADDR16 +signal ADDR17 +signal ADDR18 +signal ADDR19 +signal ADDR20 +signal ADDR21 +signal ADDR22 +signal ADDR23 +signal ADDR24 +signal ADDR25 +signal DATA0 +signal DATA1 +signal DATA2 +signal DATA3 +signal DATA4 +signal DATA5 +signal DATA6 +signal DATA7 +signal DATA8 +signal DATA9 +signal DATA10 +signal DATA11 +signal DATA12 +signal DATA13 +signal DATA14 +signal DATA15 +signal DATA16 +signal DATA17 +signal DATA18 +signal DATA19 +signal DATA20 +signal DATA21 +signal DATA22 +signal DATA23 +signal DATA24 +signal DATA25 +signal DATA26 +signal DATA27 +signal DATA28 +signal DATA29 +signal DATA30 +signal DATA31 +signal AMS_B0 +signal AMS_B1 +signal AMS_B2 +signal AMS_B3 +signal AOE_B +signal ARDY +signal ARE_B +signal AWE_B +signal ABE_B0 +signal ABE_B1 +signal ABE_B2 +signal ABE_B3 +signal BG_B +signal BGH_B +signal BMODE0 +signal BMODE1 +signal BR_B +signal BY_PASS +signal PPI1_DATA0 +signal PPI1_DATA1 +signal PPI1_DATA2 +signal PPI1_DATA3 +signal PPI1_DATA4 +signal PPI1_DATA5 +signal PPI1_DATA6 +signal PPI1_DATA7 +signal PPI1_DATA8 +signal PPI1_DATA9 +signal PPI1_DATA10 +signal PPI1_DATA11 +signal PPI1_DATA12 +signal PPI1_DATA13 +signal PPI1_DATA14 +signal PPI1_DATA15 +signal PPI2_DATA0 +signal PPI2_DATA1 +signal PPI2_DATA2 +signal PPI2_DATA3 +signal PPI2_DATA4 +signal PPI2_DATA5 +signal PPI2_DATA6 +signal PPI2_DATA7 +signal PPI2_DATA8 +signal PPI2_DATA9 +signal PPI2_DATA10 +signal PPI2_DATA11 +signal PPI2_DATA12 +signal PPI2_DATA13 +signal PPI2_DATA14 +signal PPI2_DATA15 +signal DR0PRI +signal DR0SEC +signal DR1PRI +signal DR1SEC +signal DT0PRI +signal DT0SEC +signal DT1PRI +signal DT1SEC +signal MISO +signal MOSI +signal NMI_0 +signal NMI_1 +signal PF0 +signal PF1 +signal PF2 +signal PF3 +signal PF4 +signal PF5 +signal PF6 +signal PF7 +signal PF8 +signal PF9 +signal PF10 +signal PF11 +signal PF12 +signal PF13 +signal PF14 +signal PF15 +signal RESET_B +signal RFS0 +signal RFS1 +signal RSCLK0 +signal RSCLK1 +signal TSCLK0 +signal TSCLK1 +signal RX +signal TX +signal SA10 +signal SCAS_B +signal SCK +signal SCKE +signal SLEEP +signal SMS_B0 +signal SMS_B1 +signal SMS_B2 +signal SMS_B3 +signal SRAS_B +signal SWE_B +signal SCLK0 +signal SCLK1 +signal TCK +signal TDI +signal TDO +signal TMS +signal TRST_B +signal EMU_B +signal TEST +signal TFS0 +signal TFS1 +signal PPI1_CLK +signal PPI2_CLK +signal PPI1_SYNC1 +signal PPI1_SYNC2 +signal PPI1_SYNC3 +signal PPI2_SYNC1 +signal PPI2_SYNC2 +signal PPI2_SYNC3 +signal VDD_INT0 +signal VDD_INT1 +signal VDD_INT2 +signal VDD_INT3 +signal VDD_INT4 +signal VDD_INT5 +signal VDD_INT6 +signal VDD_INT7 +signal VDD_INT8 +signal GND_INT0 +signal GND_INT1 +signal GND_INT2 +signal GND_INT3 +signal GND_INT4 +signal GND_INT5 +signal GND_INT6 +signal VDD_EXT0 +signal VDD_EXT1 +signal VDD_EXT2 +signal VDD_EXT3 +signal VDD_EXT4 +signal VDD_EXT5 +signal VDD_EXT6 +signal VDD_EXT7 +signal VDD_EXT8 +signal VDD_EXT9 +signal VDD_EXT10 +signal VDD_EXT11 +signal VDD_EXT12 +signal VDD_EXT13 +signal VDD_EXT14 +signal VDD_EXT15 +signal VDD_EXT16 +signal VDD_EXT17 +signal VDD_EXT18 +signal CLKIN +signal XTAL +signal VREF_FLT +signal VREG +signal PSMON_VDD +signal PSMON_GND +signal GND_EXT0 +signal GND_EXT1 +signal GND_EXT2 +signal GND_EXT3 +signal GND_EXT4 +signal GND_EXT5 +signal GND_EXT6 +signal GND_EXT7 +signal GND_EXT8 +signal GND_EXT9 +signal GND_EXT10 +signal GND_EXT11 +signal GND_EXT12 +signal GND_EXT13 +signal GND_EXT14 +signal GND_EXT15 +signal GND_EXT16 +signal GND_EXT17 +signal GND_EXT18 + +register BSR 355 +register BR 1 +register DIR 32 + +instruction length 5 + +instruction BYPASS 11111 BR +instruction EXTEST 00000 BSR +instruction SAMPLE/PRELOAD 10000 BSR +instruction IDCODE 00010 DIR + +bit 354 I 1 TEST +bit 353 I 1 BMODE1 +bit 352 I 1 BMODE0 +bit 351 O 1 SLEEP +bit 350 I 1 NMI_0 +bit 349 C 0 * +bit 348 O 1 MISO 349 0 Z +bit 347 I 1 MISO +bit 346 C 0 * +bit 345 O 1 MOSI 346 0 Z +bit 344 I 1 MOSI +bit 343 C 0 * +bit 342 O 1 SCK 343 0 Z +bit 341 I 1 SCK +bit 340 C 0 * +bit 339 O 1 RX 340 0 Z +bit 338 I 1 RX +bit 337 C 0 * +bit 336 O 1 TX 337 0 Z +bit 335 I 1 TX +bit 334 C 0 * +bit 333 O 1 RSCLK1 334 0 Z +bit 332 I 1 RSCLK1 +bit 331 C 0 * +bit 330 O 1 RFS1 331 0 Z +bit 329 I 1 RFS1 +bit 328 C 0 * +bit 327 O 1 DR1SEC 328 0 Z +bit 326 I 1 DR1SEC +bit 325 C 0 * +bit 324 O 1 DR1PRI 325 0 Z +bit 323 I 1 DR1PRI +bit 322 C 0 * +bit 321 O 1 TSCLK1 322 0 Z +bit 320 I 1 TSCLK1 +bit 319 C 0 * +bit 318 O 1 TFS1 319 0 Z +bit 317 I 1 TFS1 +bit 316 C 0 * +bit 315 O 1 DT1SEC 316 0 Z +bit 314 I 1 DT1SEC +bit 313 C 0 * +bit 312 O 1 DT1PRI 313 0 Z +bit 311 I 1 DT1PRI +bit 310 C 0 * +bit 309 O 1 RSCLK0 310 0 Z +bit 308 I 1 RSCLK0 +bit 307 C 0 * +bit 306 O 1 RFS0 307 0 Z +bit 305 I 1 RFS0 +bit 304 C 0 * +bit 303 O 1 DR0SEC 304 0 Z +bit 302 I 1 DR0SEC +bit 301 C 0 * +bit 300 O 1 DR0PRI 301 0 Z +bit 299 I 1 DR0PRI +bit 298 C 0 * +bit 297 O 1 TSCLK0 298 0 Z +bit 296 I 1 TSCLK0 +bit 295 C 0 * +bit 294 O 1 TFS0 295 0 Z +bit 293 I 1 TFS0 +bit 292 C 0 * +bit 291 O 1 DT0SEC 292 0 Z +bit 290 I 1 DT0SEC +bit 289 C 0 * +bit 288 O 1 DT0PRI 289 0 Z +bit 287 I 1 DT0PRI +bit 286 O 1 DATA31 254 0 Z +bit 285 I 1 DATA31 +bit 284 O 1 DATA30 254 0 Z +bit 283 I 1 DATA30 +bit 282 O 1 DATA29 254 0 Z +bit 281 I 1 DATA29 +bit 280 O 1 DATA28 254 0 Z +bit 279 I 1 DATA28 +bit 278 O 1 DATA27 254 0 Z +bit 277 I 1 DATA27 +bit 276 O 1 DATA26 254 0 Z +bit 275 I 1 DATA26 +bit 274 O 1 DATA25 254 0 Z +bit 273 I 1 DATA25 +bit 272 O 1 DATA24 254 0 Z +bit 271 I 1 DATA24 +bit 270 O 1 DATA23 254 0 Z +bit 269 I 1 DATA23 +bit 268 O 1 DATA22 254 0 Z +bit 267 I 1 DATA22 +bit 266 O 1 DATA21 254 0 Z +bit 265 I 1 DATA21 +bit 264 O 1 DATA20 254 0 Z +bit 263 I 1 DATA20 +bit 262 O 1 DATA19 254 0 Z +bit 261 I 1 DATA19 +bit 260 O 1 DATA18 254 0 Z +bit 259 I 1 DATA18 +bit 258 O 1 DATA17 254 0 Z +bit 257 I 1 DATA17 +bit 256 O 1 DATA16 254 0 Z +bit 255 I 1 DATA16 +bit 254 C 0 * +bit 253 O 1 DATA15 221 0 Z +bit 252 I 1 DATA15 +bit 251 O 1 DATA14 221 0 Z +bit 250 I 1 DATA14 +bit 249 O 1 DATA13 221 0 Z +bit 248 I 1 DATA13 +bit 247 O 1 DATA12 221 0 Z +bit 246 I 1 DATA12 +bit 245 O 1 DATA11 221 0 Z +bit 244 I 1 DATA11 +bit 243 O 1 DATA10 221 0 Z +bit 242 I 1 DATA10 +bit 241 O 1 DATA9 221 0 Z +bit 240 I 1 DATA9 +bit 239 O 1 DATA8 221 0 Z +bit 238 I 1 DATA8 +bit 237 O 1 DATA7 221 0 Z +bit 236 I 1 DATA7 +bit 235 O 1 DATA6 221 0 Z +bit 234 I 1 DATA6 +bit 233 O 1 DATA5 221 0 Z +bit 232 I 1 DATA5 +bit 231 O 1 DATA4 221 0 Z +bit 230 I 1 DATA4 +bit 229 O 1 DATA3 221 0 Z +bit 228 I 1 DATA3 +bit 227 O 1 DATA2 221 0 Z +bit 226 I 1 DATA2 +bit 225 O 1 DATA1 221 0 Z +bit 224 I 1 DATA1 +bit 223 O 1 DATA0 221 0 Z +bit 222 I 1 DATA0 +bit 221 C 0 * +bit 220 O 1 ADDR2 219 0 Z +bit 219 C 0 * +bit 218 O 1 ADDR3 219 0 Z +bit 217 O 1 ADDR4 219 0 Z +bit 216 O 1 ADDR5 219 0 Z +bit 215 O 1 ADDR6 219 0 Z +bit 214 O 1 ADDR7 219 0 Z +bit 213 O 1 ADDR8 219 0 Z +bit 212 O 1 ABE_B3 219 0 Z +bit 211 O 1 ABE_B2 219 0 Z +bit 210 O 1 ABE_B1 219 0 Z +bit 209 O 1 ABE_B0 219 0 Z +bit 208 O 1 BGH_B +bit 207 O 1 BG_B +bit 206 I 1 BR_B +bit 205 O 1 SA10 194 0 Z +bit 204 O 1 SCLK1 194 0 Z +bit 203 O 1 SCLK0 194 0 Z +bit 202 O 1 SWE_B 194 0 Z +bit 201 O 1 SCAS_B 194 0 Z +bit 200 O 1 SCKE 194 0 Z +bit 199 O 1 SRAS_B 194 0 Z +bit 198 O 1 SMS_B3 194 0 Z +bit 197 O 1 SMS_B2 194 0 Z +bit 196 O 1 SMS_B1 194 0 Z +bit 195 O 1 SMS_B0 194 0 Z +bit 194 C 0 * +bit 193 I 1 ARDY +bit 192 O 1 ARE_B 189 0 Z +bit 191 O 1 AOE_B 189 0 Z +bit 190 O 1 AWE_B 189 0 Z +bit 189 C 0 * +bit 188 O 1 AMS_B0 189 0 Z +bit 187 O 1 AMS_B1 189 0 Z +bit 186 O 1 AMS_B2 189 0 Z +bit 185 O 1 AMS_B3 189 0 Z +bit 184 O 1 ADDR9 175 0 Z +bit 183 O 1 ADDR10 175 0 Z +bit 182 O 1 ADDR11 175 0 Z +bit 181 O 1 ADDR12 175 0 Z +bit 180 O 1 ADDR13 175 0 Z +bit 179 O 1 ADDR14 175 0 Z +bit 178 O 1 ADDR15 175 0 Z +bit 177 O 1 ADDR16 175 0 Z +bit 176 O 1 ADDR17 175 0 Z +bit 175 C 0 * +bit 174 O 1 ADDR18 175 0 Z +bit 173 O 1 ADDR19 175 0 Z +bit 172 O 1 ADDR20 175 0 Z +bit 171 O 1 ADDR21 175 0 Z +bit 170 O 1 ADDR22 175 0 Z +bit 169 O 1 ADDR23 175 0 Z +bit 168 O 1 ADDR24 175 0 Z +bit 167 O 1 ADDR25 175 0 Z +bit 166 I 1 PPI2_CLK +bit 165 I 1 PPI1_CLK +bit 164 C 0 * +bit 163 O 1 PPI1_SYNC3 164 0 Z +bit 162 I 1 PPI1_SYNC3 +bit 161 C 0 * +bit 160 O 1 PPI1_SYNC2 161 0 Z +bit 159 I 1 PPI1_SYNC2 +bit 158 C 0 * +bit 157 O 1 PPI1_SYNC1 158 0 Z +bit 156 I 1 PPI1_SYNC1 +bit 155 C 0 * +bit 154 O 1 PPI1_DATA15 155 0 Z +bit 153 I 1 PPI1_DATA15 +bit 152 C 0 * +bit 151 O 1 PPI1_DATA14 152 0 Z +bit 150 I 1 PPI1_DATA14 +bit 149 C 0 * +bit 148 O 1 PPI1_DATA13 149 0 Z +bit 147 I 1 PPI1_DATA13 +bit 146 C 0 * +bit 145 O 1 PPI1_DATA12 146 0 Z +bit 144 I 1 PPI1_DATA12 +bit 143 C 0 * +bit 142 O 1 PPI1_DATA11 143 0 Z +bit 141 I 1 PPI1_DATA11 +bit 140 C 0 * +bit 139 O 1 PPI1_DATA10 140 0 Z +bit 138 I 1 PPI1_DATA10 +bit 137 I 1 RESET_B +bit 136 I 1 BY_PASS +bit 135 C 0 * +bit 134 O 1 PPI1_DATA9 135 0 Z +bit 133 I 1 PPI1_DATA9 +bit 132 C 0 * +bit 131 O 1 PPI1_DATA8 132 0 Z +bit 130 I 1 PPI1_DATA8 +bit 129 C 0 * +bit 128 O 1 PPI1_DATA7 129 0 Z +bit 127 I 1 PPI1_DATA7 +bit 126 C 0 * +bit 125 O 1 PPI1_DATA6 126 0 Z +bit 124 I 1 PPI1_DATA6 +bit 123 C 0 * +bit 122 O 1 PPI1_DATA5 123 0 Z +bit 121 I 1 PPI1_DATA5 +bit 120 C 0 * +bit 119 O 1 PPI1_DATA4 120 0 Z +bit 118 I 1 PPI1_DATA4 +bit 117 C 0 * +bit 116 O 1 PPI1_DATA3 117 0 Z +bit 115 I 1 PPI1_DATA3 +bit 114 C 0 * +bit 113 O 1 PPI1_DATA2 114 0 Z +bit 112 I 1 PPI1_DATA2 +bit 111 C 0 * +bit 110 O 1 PPI1_DATA1 111 0 Z +bit 109 I 1 PPI1_DATA1 +bit 108 C 0 * +bit 107 O 1 PPI1_DATA0 108 0 Z +bit 106 I 1 PPI1_DATA0 +bit 105 C 0 * +bit 104 O 1 PPI2_SYNC3 105 0 Z +bit 103 I 1 PPI2_SYNC3 +bit 102 C 0 * +bit 101 O 1 PPI2_SYNC2 102 0 Z +bit 100 I 1 PPI2_SYNC2 +bit 99 C 0 * +bit 98 O 1 PPI2_SYNC1 99 0 Z +bit 97 I 1 PPI2_SYNC1 +bit 96 C 0 * +bit 95 O 1 PPI2_DATA15 96 0 Z +bit 94 I 1 PPI2_DATA15 +bit 93 C 0 * +bit 92 O 1 PPI2_DATA14 93 0 Z +bit 91 I 1 PPI2_DATA14 +bit 90 C 0 * +bit 89 O 1 PPI2_DATA13 90 0 Z +bit 88 I 1 PPI2_DATA13 +bit 87 C 0 * +bit 86 O 1 PPI2_DATA12 87 0 Z +bit 85 I 1 PPI2_DATA12 +bit 84 C 0 * +bit 83 O 1 PPI2_DATA11 84 0 Z +bit 82 I 1 PPI2_DATA11 +bit 81 C 0 * +bit 80 O 1 PPI2_DATA10 81 0 Z +bit 79 I 1 PPI2_DATA10 +bit 78 C 0 * +bit 77 O 1 PPI2_DATA9 78 0 Z +bit 76 I 1 PPI2_DATA9 +bit 75 C 0 * +bit 74 O 1 PPI2_DATA8 75 0 Z +bit 73 I 1 PPI2_DATA8 +bit 72 C 0 * +bit 71 O 1 PPI2_DATA7 72 0 Z +bit 70 I 1 PPI2_DATA7 +bit 69 C 0 * +bit 68 O 1 PPI2_DATA6 69 0 Z +bit 67 I 1 PPI2_DATA6 +bit 66 C 0 * +bit 65 O 1 PPI2_DATA5 66 0 Z +bit 64 I 1 PPI2_DATA5 +bit 63 C 0 * +bit 62 O 1 PPI2_DATA4 63 0 Z +bit 61 I 1 PPI2_DATA4 +bit 60 C 0 * +bit 59 O 1 PPI2_DATA3 60 0 Z +bit 58 I 1 PPI2_DATA3 +bit 57 C 0 * +bit 56 O 1 PPI2_DATA2 57 0 Z +bit 55 I 1 PPI2_DATA2 +bit 54 C 0 * +bit 53 O 1 PPI2_DATA1 54 0 Z +bit 52 I 1 PPI2_DATA1 +bit 51 C 0 * +bit 50 O 1 PPI2_DATA0 51 0 Z +bit 49 I 1 PPI2_DATA0 +bit 48 C 0 * +bit 47 O 1 PF0 48 0 Z +bit 46 I 1 PF0 +bit 45 C 0 * +bit 44 O 1 PF1 45 0 Z +bit 43 I 1 PF1 +bit 42 C 0 * +bit 41 O 1 PF2 42 0 Z +bit 40 I 1 PF2 +bit 39 C 0 * +bit 38 O 1 PF3 39 0 Z +bit 37 I 1 PF3 +bit 36 C 0 * +bit 35 O 1 PF4 36 0 Z +bit 34 I 1 PF4 +bit 33 C 0 * +bit 32 O 1 PF5 33 0 Z +bit 31 I 1 PF5 +bit 30 C 0 * +bit 29 O 1 PF6 30 0 Z +bit 28 I 1 PF6 +bit 27 C 0 * +bit 26 O 1 PF7 27 0 Z +bit 25 I 1 PF7 +bit 24 C 0 * +bit 23 O 1 PF8 24 0 Z +bit 22 I 1 PF8 +bit 21 C 0 * +bit 20 O 1 PF9 21 0 Z +bit 19 I 1 PF9 +bit 18 C 0 * +bit 17 O 1 PF10 18 0 Z +bit 16 I 1 PF10 +bit 15 C 0 * +bit 14 O 1 PF11 15 0 Z +bit 13 I 1 PF11 +bit 12 C 0 * +bit 11 O 1 PF12 12 0 Z +bit 10 I 1 PF12 +bit 9 C 0 * +bit 8 O 1 PF13 9 0 Z +bit 7 I 1 PF13 +bit 6 C 0 * +bit 5 O 1 PF14 6 0 Z +bit 4 I 1 PF14 +bit 3 C 0 * +bit 2 O 1 PF15 3 0 Z +bit 1 I 1 PF15 +bit 0 I 1 NMI_1 diff --git a/jtag/src/bus/Makefile.am b/jtag/src/bus/Makefile.am index edd62fa6..84ca55cc 100644 --- a/jtag/src/bus/Makefile.am +++ b/jtag/src/bus/Makefile.am @@ -33,6 +33,9 @@ libbus_a_SOURCES = \ ejtag.c \ bf533_stamp.c \ bf533_ezkit.c \ + bf537_stamp.c \ + bf548_ezkit.c \ + bf561_ezkit.c \ ixp425.c \ lh7a400.c \ mpc824x.c \ diff --git a/jtag/src/bus/bf537_stamp.c b/jtag/src/bus/bf537_stamp.c new file mode 100644 index 00000000..115252bd --- /dev/null +++ b/jtag/src/bus/bf537_stamp.c @@ -0,0 +1,408 @@ +/* + * bf537_stamp.c + * + * Analog Devices ADSP-BF537 STAMP/EZ-KIT Lite bus driver + * Copyright (C) 2008 Analog Devices, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + * 02111-1307, USA. + * + * Written by Jie Zhang , 2008. + * + */ + +#include "sysdep.h" + +#include +#include +#include + +#include "part.h" +#include "bus.h" +#include "chain.h" +#include "bssignal.h" +#include "jtag.h" +#include "buses.h" + +typedef struct { + chain_t *chain; + part_t *part; + signal_t *ams[4]; + signal_t *addr[19]; + signal_t *data[16]; + signal_t *abe[2]; + signal_t *awe; + signal_t *are; + signal_t *sras; + signal_t *scas; + signal_t *sms; + signal_t *swe; +} bus_params_t; + +#define CHAIN ((bus_params_t *) bus->params)->chain +#define PART ((bus_params_t *) bus->params)->part +#define AMS ((bus_params_t *) bus->params)->ams +#define ADDR ((bus_params_t *) bus->params)->addr +#define DATA ((bus_params_t *) bus->params)->data +#define AWE ((bus_params_t *) bus->params)->awe +#define ARE ((bus_params_t *) bus->params)->are +#define ABE ((bus_params_t *) bus->params)->abe +#define SRAS ((bus_params_t *) bus->params)->sras +#define SCAS ((bus_params_t *) bus->params)->scas +#define SMS ((bus_params_t *) bus->params)->sms +#define SWE ((bus_params_t *) bus->params)->swe + +static void +select_flash( bus_t *bus ) +{ + part_t *p = PART; + + part_set_signal( p, AMS[0], 1, 0 ); + part_set_signal( p, AMS[1], 1, 1 ); + part_set_signal( p, AMS[2], 1, 1 ); + part_set_signal( p, AMS[3], 1, 1 ); + + part_set_signal( p, ABE[0], 1, 0 ); + part_set_signal( p, ABE[1], 1, 0 ); + + part_set_signal( p, SRAS, 1, 1 ); + part_set_signal( p, SCAS, 1, 1 ); + part_set_signal( p, SWE, 1, 1 ); + part_set_signal( p, SMS, 1, 1 ); +} + +static void +unselect_flash( bus_t *bus ) +{ + part_t *p = PART; + + part_set_signal( p, AMS[0], 1, 1 ); + part_set_signal( p, AMS[1], 1, 1 ); + part_set_signal( p, AMS[2], 1, 1 ); + part_set_signal( p, AMS[3], 1, 1 ); + + part_set_signal( p, ABE[0], 1, 1 ); + part_set_signal( p, ABE[1], 1, 1 ); + + part_set_signal( p, SRAS, 1, 1 ); + part_set_signal( p, SCAS, 1, 1 ); + part_set_signal( p, SWE, 1, 1 ); + part_set_signal( p, SMS, 1, 1 ); +} + +static void +setup_address( bus_t *bus, uint32_t a ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 19; i++) + part_set_signal( p, ADDR[i], 1, (a >> (i + 1)) & 1 ); +} + +static void +set_data_in( bus_t *bus ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 16; i++) + part_set_signal( p, DATA[i], 0, 0 ); +} + +static void +setup_data( bus_t *bus, uint32_t d ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 16; i++) + part_set_signal( p, DATA[i], 1, (d >> i) & 1 ); + +} + +static void +bf537_stamp_bus_printinfo( bus_t *bus ) +{ + int i; + + for (i = 0; i < CHAIN->parts->len; i++) + if (PART == CHAIN->parts->parts[i]) + break; + printf( _("Blackfin BF537 Stamp compatible bus driver via BSR (JTAG part No. %d)\n"), i ); +} + +static void +bf537_ezkit_bus_printinfo( bus_t *bus ) +{ + int i; + + for (i = 0; i < CHAIN->parts->len; i++) + if (PART == CHAIN->parts->parts[i]) + break; + printf( _("Blackfin BF537 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), i ); +} + +static void +bf537_stamp_bus_prepare( bus_t *bus ) +{ + part_set_instruction( PART, "EXTEST" ); + chain_shift_instructions( CHAIN ); +} + +static void +bf537_stamp_bus_read_start( bus_t *bus, uint32_t adr ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + + select_flash( bus ); + part_set_signal( p, ARE, 1, 0 ); + part_set_signal( p, AWE, 1, 1 ); + + setup_address( bus, adr ); + set_data_in( bus ); + + chain_shift_data_registers( chain, 0 ); +} + +static uint32_t +bf537_stamp_bus_read_next( bus_t *bus, uint32_t adr ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + int i; + uint32_t d = 0; + + setup_address( bus, adr ); + chain_shift_data_registers( chain, 1 ); + + for (i = 0; i < 16; i++) + d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i); + + return d; +} + +static uint32_t +bf537_stamp_bus_read_end( bus_t *bus ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + int i; + uint32_t d = 0; + + unselect_flash( bus ); + part_set_signal( p, ARE, 1, 1 ); + part_set_signal( p, AWE, 1, 1 ); + + chain_shift_data_registers( chain, 1 ); + + for (i = 0; i < 16; i++) + d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i); + + return d; +} + +static uint32_t +bf537_stamp_bus_read( bus_t *bus, uint32_t adr ) +{ + bf537_stamp_bus_read_start( bus, adr ); + return bf537_stamp_bus_read_end( bus ); +} + +static void +bf537_stamp_bus_write( bus_t *bus, uint32_t adr, uint32_t data ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + +// printf("Writing %04X to %08X...\n", data, adr); + + select_flash( bus ); + part_set_signal( p, ARE, 1, 1 ); + + setup_address( bus, adr ); + setup_data( bus, data ); + + chain_shift_data_registers( chain, 0 ); + + part_set_signal( p, AWE, 1, 0 ); + chain_shift_data_registers( chain, 0 ); + part_set_signal( p, AWE, 1, 1 ); + unselect_flash( bus ); + chain_shift_data_registers( chain, 0 ); +} + +static int +bf537_stamp_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area ) +{ + area->description = NULL; + area->start = UINT32_C(0x00000000); + area->length = UINT64_C(0x100000000); + area->width = 16; + + return 0; +} + +static void +bf537_stamp_bus_free( bus_t *bus ) +{ + free( bus->params ); + free( bus ); +} + +static bus_t *bf537_stamp_bus_new( char *cmd_params[] ); + +const bus_driver_t bf537_stamp_bus = { + "bf537_stamp", + N_("Blackfin BF537 Stamp board bus driver"), + bf537_stamp_bus_new, + bf537_stamp_bus_free, + bf537_stamp_bus_printinfo, + bf537_stamp_bus_prepare, + bf537_stamp_bus_area, + bf537_stamp_bus_read_start, + bf537_stamp_bus_read_next, + bf537_stamp_bus_read_end, + bf537_stamp_bus_read, + bf537_stamp_bus_write +}; + +const bus_driver_t bf537_ezkit_bus = { + "bf537_ezkit", + N_("Blackfin BF537 EZ-KIT board bus driver"), + bf537_stamp_bus_new, + bf537_stamp_bus_free, + bf537_ezkit_bus_printinfo, + bf537_stamp_bus_prepare, + bf537_stamp_bus_area, + bf537_stamp_bus_read_start, + bf537_stamp_bus_read_next, + bf537_stamp_bus_read_end, + bf537_stamp_bus_read, + bf537_stamp_bus_write +}; + + +static bus_t * +bf537_stamp_bus_new( char *cmd_params[] ) +{ + bus_t *bus; + char buff[15]; + int i; + int failed = 0; + + if (!chain || !chain->parts || chain->parts->len <= chain->active_part || chain->active_part < 0) + return NULL; + + bus = malloc( sizeof (bus_t) ); + if (!bus) + return NULL; + + bus->driver = &bf537_stamp_bus; + bus->params = malloc( sizeof (bus_params_t) ); + if (!bus->params) { + free( bus ); + return NULL; + } + + CHAIN = chain; + PART = chain->parts->parts[chain->active_part]; + + for (i = 0; i < 4; i++) { + sprintf( buff, "AMS_B%d", i ); + AMS[i] = part_find_signal( PART, buff ); + if (!AMS[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + for (i = 0; i < 19; i++) { + sprintf( buff, "ADDR%d", i + 1); + ADDR[i] = part_find_signal( PART, buff ); + if (!ADDR[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + for (i = 0; i < 16; i++) { + sprintf( buff, "DATA%d", i); + DATA[i] = part_find_signal( PART, buff ); + if (!DATA[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + AWE = part_find_signal( PART, "AWE_B" ); + if (!AWE) { + printf( _("signal '%s' not found\n"), "AWE_B" ); + failed = 1; + } + + ARE = part_find_signal( PART, "ARE_B" ); + if (!ARE) { + printf( _("signal '%s' not found\n"), "ARE_B" ); + failed = 1; + } + + ABE[0] = part_find_signal( PART, "ABE_B0" ); + if (!ABE[0]) { + printf( _("signal '%s' not found\n"), "ABE_B0" ); + failed = 1; + } + + ABE[1] = part_find_signal( PART, "ABE_B1" ); + if (!ABE[1]) { + printf( _("signal '%s' not found\n"), "ABE_B1" ); + failed = 1; + } + + SRAS = part_find_signal( PART, "SRAS_B" ); + if (!SRAS) { + printf( _("signal '%s' not found\n"), "SRAS_B" ); + failed = 1; + } + + SCAS = part_find_signal( PART, "SCAS_B" ); + if (!SCAS) { + printf( _("signal '%s' not found\n"), "SCAS_B" ); + failed = 1; + } + + SWE = part_find_signal( PART, "SWE_B" ); + if (!SWE) { + printf( _("signal '%s' not found\n"), "SWE_B" ); + failed = 1; + } + + SMS = part_find_signal( PART, "SMS_B" ); + if (!SMS) { + printf( _("signal '%s' not found\n"), "SMS_B" ); + failed = 1; + } + + if (failed) { + free( bus->params ); + free( bus ); + return NULL; + } + + return bus; +} diff --git a/jtag/src/bus/bf548_ezkit.c b/jtag/src/bus/bf548_ezkit.c new file mode 100644 index 00000000..892d607c --- /dev/null +++ b/jtag/src/bus/bf548_ezkit.c @@ -0,0 +1,370 @@ +/* + * bf548_ezkit.c + * + * Analog Devices ADSP-BF548 EZ-KIT Lite bus driver + * Copyright (C) 2008 Analog Devices, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + * 02111-1307, USA. + * + * Written by Jie Zhang , 2008. + */ + +#include "sysdep.h" + +#include +#include +#include + +#include "part.h" +#include "bus.h" +#include "chain.h" +#include "bssignal.h" +#include "jtag.h" +#include "buses.h" + +typedef struct { + chain_t *chain; + part_t *part; + signal_t *ams[4]; + signal_t *addr[24]; + signal_t *data[16]; + signal_t *awe; + signal_t *are; + signal_t *aoe; + signal_t *dcs0; + signal_t *nce; +} bus_params_t; + +#define CHAIN ((bus_params_t *) bus->params)->chain +#define PART ((bus_params_t *) bus->params)->part +#define AMS ((bus_params_t *) bus->params)->ams +#define ADDR ((bus_params_t *) bus->params)->addr +#define DATA ((bus_params_t *) bus->params)->data +#define AOE ((bus_params_t *) bus->params)->aoe +#define AWE ((bus_params_t *) bus->params)->awe +#define ARE ((bus_params_t *) bus->params)->are +#define DCS0 ((bus_params_t *) bus->params)->dcs0 +#define NCE ((bus_params_t *) bus->params)->nce + +static void +select_flash( bus_t *bus ) +{ + part_t *p = PART; + + part_set_signal( p, AMS[0], 1, 0 ); + part_set_signal( p, AMS[1], 1, 1 ); + part_set_signal( p, AMS[2], 1, 1 ); + part_set_signal( p, AMS[3], 1, 1 ); + part_set_signal( p, DCS0, 1, 1 ); + part_set_signal( p, NCE, 1, 1 ); +} + +static void +unselect_flash( bus_t *bus ) +{ + part_t *p = PART; + + part_set_signal( p, AMS[0], 1, 1 ); + part_set_signal( p, AMS[1], 1, 1 ); + part_set_signal( p, AMS[2], 1, 1 ); + part_set_signal( p, AMS[3], 1, 1 ); + part_set_signal( p, DCS0, 1, 1 ); + part_set_signal( p, NCE, 1, 1 ); +} + +static void +setup_address( bus_t *bus, uint32_t a ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 24; i++) + part_set_signal( p, ADDR[i], 1, (a >> (i + 1)) & 1 ); +} + +static void +set_data_in( bus_t *bus ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 16; i++) + part_set_signal( p, DATA[i], 0, 0 ); +} + +static void +setup_data( bus_t *bus, uint32_t d ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 16; i++) + part_set_signal( p, DATA[i], 1, (d >> i) & 1 ); + +} + +static void +bf548_ezkit_bus_printinfo( bus_t *bus ) +{ + int i; + + for (i = 0; i < CHAIN->parts->len; i++) + if (PART == CHAIN->parts->parts[i]) + break; + printf( _("Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), i ); +} + +static void +bf548_ezkit_bus_prepare( bus_t *bus ) +{ + part_set_instruction( PART, "EXTEST" ); + chain_shift_instructions( CHAIN ); +} + +static void +bf548_ezkit_bus_read_start( bus_t *bus, uint32_t adr ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + + select_flash( bus ); + part_set_signal( p, AOE, 1, 0 ); + part_set_signal( p, ARE, 1, 0 ); + part_set_signal( p, AWE, 1, 1 ); + + setup_address( bus, adr ); + set_data_in( bus ); + + chain_shift_data_registers( chain, 0 ); +} + +static uint32_t +bf548_ezkit_bus_read_next( bus_t *bus, uint32_t adr ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + int i; + uint32_t d = 0; + + setup_address( bus, adr ); + chain_shift_data_registers( chain, 1 ); + + for (i = 0; i < 16; i++) + d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i); + + return d; +} + +static uint32_t +bf548_ezkit_bus_read_end( bus_t *bus ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + int i; + uint32_t d = 0; + + part_set_signal( p, AOE, 1, 1 ); + part_set_signal( p, ARE, 1, 1 ); + part_set_signal( p, AWE, 1, 1 ); + unselect_flash( bus ); + + chain_shift_data_registers( chain, 1 ); + + for (i = 0; i < 16; i++) + d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i); + + return d; +} + +static uint32_t +bf548_ezkit_bus_read( bus_t *bus, uint32_t adr ) +{ + bf548_ezkit_bus_read_start( bus, adr ); + return bf548_ezkit_bus_read_end( bus ); +} + +static void +bf548_ezkit_bus_write( bus_t *bus, uint32_t adr, uint32_t data ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + + select_flash( bus ); + part_set_signal( p, AOE, 1, 0 ); + part_set_signal( p, ARE, 1, 1 ); + + setup_address( bus, adr ); + setup_data( bus, data ); + + chain_shift_data_registers( chain, 0 ); + + part_set_signal( p, AWE, 1, 0 ); + chain_shift_data_registers( chain, 0 ); + part_set_signal( p, AWE, 1, 1 ); + part_set_signal( p, AOE, 1, 1 ); + unselect_flash( bus ); + chain_shift_data_registers( chain, 0 ); +} + +static int +bf548_ezkit_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area ) +{ + area->description = NULL; + area->start = UINT32_C(0x00000000); + area->length = UINT64_C(0x100000000); + area->width = 16; + + return 0; +} + +static void +bf548_ezkit_bus_free( bus_t *bus ) +{ + free( bus->params ); + free( bus ); +} + +static bus_t *bf548_ezkit_bus_new( char *cmd_params[] ); + +const bus_driver_t bf548_ezkit_bus = { + "bf548_ezkit", + N_("Blackfin BF548 EZ-KIT board bus driver"), + bf548_ezkit_bus_new, + bf548_ezkit_bus_free, + bf548_ezkit_bus_printinfo, + bf548_ezkit_bus_prepare, + bf548_ezkit_bus_area, + bf548_ezkit_bus_read_start, + bf548_ezkit_bus_read_next, + bf548_ezkit_bus_read_end, + bf548_ezkit_bus_read, + bf548_ezkit_bus_write +}; + + +static bus_t * +bf548_ezkit_bus_new( char *cmd_params[] ) +{ + bus_t *bus; + char buff[15]; + int i; + int failed = 0; + + if (!chain || !chain->parts || chain->parts->len <= chain->active_part || chain->active_part < 0) + return NULL; + + bus = malloc( sizeof (bus_t) ); + if (!bus) + return NULL; + + bus->driver = &bf548_ezkit_bus; + bus->params = malloc( sizeof (bus_params_t) ); + if (!bus->params) { + free( bus ); + return NULL; + } + + CHAIN = chain; + PART = chain->parts->parts[chain->active_part]; + + for (i = 0; i < 4; i++) { + sprintf( buff, "AMS%dB", i ); + AMS[i] = part_find_signal( PART, buff ); + if (!AMS[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + for (i = 0; i < 3; i++) { + sprintf( buff, "ADDR%d", i + 1); + ADDR[i] = part_find_signal( PART, buff ); + if (!ADDR[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + for (i = 3; i < 9; i++) { + sprintf( buff, "PORTH_%d", i + 5); + ADDR[i] = part_find_signal( PART, buff ); + if (!ADDR[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + for (i = 9; i < 24; i++) { + sprintf( buff, "PORTI_%d", i - 9); + ADDR[i] = part_find_signal( PART, buff ); + if (!ADDR[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + for (i = 0; i < 16; i++) { + sprintf( buff, "DATA%d", i); + DATA[i] = part_find_signal( PART, buff ); + if (!DATA[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + AWE = part_find_signal( PART, "AWEB" ); + if (!AWE) { + printf( _("signal '%s' not found\n"), "AWEB" ); + failed = 1; + } + + ARE = part_find_signal( PART, "AREB" ); + if (!ARE) { + printf( _("signal '%s' not found\n"), "AREB" ); + failed = 1; + } + + AOE = part_find_signal( PART, "AOEB" ); + if (!AOE) { + printf( _("signal '%s' not found\n"), "AOEB" ); + failed = 1; + } + + DCS0 = part_find_signal( PART, "CS0_B" ); + if (!DCS0) { + printf( _("signal '%s' not found\n"), "CS0_B" ); + failed = 1; + } + + NCE = part_find_signal( PART, "PORTJ_1" ); + if (!NCE) { + printf( _("signal '%s' not found\n"), "PORTJ_1" ); + failed = 1; + } + + if (failed) { + free( bus->params ); + free( bus ); + return NULL; + } + + return bus; +} diff --git a/jtag/src/bus/bf561_ezkit.c b/jtag/src/bus/bf561_ezkit.c new file mode 100644 index 00000000..9c4e5263 --- /dev/null +++ b/jtag/src/bus/bf561_ezkit.c @@ -0,0 +1,392 @@ +/* + * bf561_ezkit.c + * + * Analog Devices ADSP-BF561 EZ-KIT Lite bus driver + * Copyright (C) 2008 Analog Devices, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + * 02111-1307, USA. + * + * Written by Jie Zhang , 2008. + * + */ + +#include "sysdep.h" + +#include +#include +#include + +#include "part.h" +#include "bus.h" +#include "chain.h" +#include "bssignal.h" +#include "jtag.h" +#include "buses.h" + +typedef struct { + chain_t *chain; + part_t *part; + signal_t *ams[4]; + signal_t *addr[24]; + signal_t *abe[4]; + signal_t *data[32]; + signal_t *awe; + signal_t *aoe; + signal_t *sras; + signal_t *scas; + signal_t *sms[4]; + signal_t *swe; +} bus_params_t; + +#define CHAIN ((bus_params_t *) bus->params)->chain +#define PART ((bus_params_t *) bus->params)->part +#define AMS ((bus_params_t *) bus->params)->ams +#define ADDR ((bus_params_t *) bus->params)->addr +#define ABE ((bus_params_t *) bus->params)->abe +#define DATA ((bus_params_t *) bus->params)->data +#define AWE ((bus_params_t *) bus->params)->awe +#define AOE ((bus_params_t *) bus->params)->aoe +#define SRAS ((bus_params_t *) bus->params)->sras +#define SCAS ((bus_params_t *) bus->params)->scas +#define SMS ((bus_params_t *) bus->params)->sms +#define SWE ((bus_params_t *) bus->params)->swe + +static void +select_flash( bus_t *bus ) +{ + part_t *p = PART; + + part_set_signal( p, AMS[0], 1, 0 ); + part_set_signal( p, AMS[1], 1, 1 ); + part_set_signal( p, AMS[2], 1, 1 ); + part_set_signal( p, AMS[3], 1, 1 ); + + part_set_signal( p, ABE[0], 1, 0 ); + part_set_signal( p, ABE[1], 1, 0 ); + part_set_signal( p, ABE[2], 1, 0 ); + part_set_signal( p, ABE[3], 1, 0 ); + + part_set_signal( p, SRAS, 1, 1 ); + part_set_signal( p, SCAS, 1, 1 ); + part_set_signal( p, SWE, 1, 1 ); + part_set_signal( p, SMS[0], 1, 1 ); + part_set_signal( p, SMS[1], 1, 1 ); + part_set_signal( p, SMS[2], 1, 1 ); + part_set_signal( p, SMS[3], 1, 1 ); +} + +static void +unselect_flash( bus_t *bus ) +{ + part_t *p = PART; + + part_set_signal( p, AMS[0], 1, 1 ); + part_set_signal( p, AMS[1], 1, 1 ); + part_set_signal( p, AMS[2], 1, 1 ); + part_set_signal( p, AMS[3], 1, 1 ); + + part_set_signal( p, ABE[0], 1, 1 ); + part_set_signal( p, ABE[1], 1, 1 ); + part_set_signal( p, ABE[2], 1, 1 ); + part_set_signal( p, ABE[3], 1, 1 ); + + part_set_signal( p, SRAS, 1, 1 ); + part_set_signal( p, SCAS, 1, 1 ); + part_set_signal( p, SWE, 1, 1 ); + part_set_signal( p, SMS[0], 1, 1 ); + part_set_signal( p, SMS[1], 1, 1 ); + part_set_signal( p, SMS[2], 1, 1 ); + part_set_signal( p, SMS[3], 1, 1 ); +} + +static void +setup_address( bus_t *bus, uint32_t a ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 24; i++) + part_set_signal( p, ADDR[i], 1, (a >> (i + 2)) & 1 ); + part_set_signal( p, ABE[3], 1, (a >> 1) & 1 ); +} + +static void +set_data_in( bus_t *bus ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 16; i++) + part_set_signal( p, DATA[i], 0, 0 ); +} + +static void +setup_data( bus_t *bus, uint32_t d ) +{ + int i; + part_t *p = PART; + + for (i = 0; i < 16; i++) + part_set_signal( p, DATA[i], 1, (d >> i) & 1 ); + +} + +static void +bf561_ezkit_bus_printinfo( bus_t *bus ) +{ + int i; + + for (i = 0; i < CHAIN->parts->len; i++) + if (PART == CHAIN->parts->parts[i]) + break; + printf( _("Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), i ); +} + +static void +bf561_ezkit_bus_prepare( bus_t *bus ) +{ + part_set_instruction( PART, "EXTEST" ); + chain_shift_instructions( CHAIN ); +} + +static void +bf561_ezkit_bus_read_start( bus_t *bus, uint32_t adr ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + + select_flash( bus ); + part_set_signal( p, AOE, 1, 0 ); + part_set_signal( p, AWE, 1, 1 ); + + setup_address( bus, adr ); + set_data_in( bus ); + + chain_shift_data_registers( chain, 0 ); +} + +static uint32_t +bf561_ezkit_bus_read_next( bus_t *bus, uint32_t adr ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + int i; + uint32_t d = 0; + + setup_address( bus, adr ); + chain_shift_data_registers( chain, 1 ); + + for (i = 0; i < 16; i++) + d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i); + + return d; +} + +static uint32_t +bf561_ezkit_bus_read_end( bus_t *bus ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + int i; + uint32_t d = 0; + + unselect_flash( bus ); + part_set_signal( p, AOE, 1, 1 ); + part_set_signal( p, AWE, 1, 1 ); + + chain_shift_data_registers( chain, 1 ); + + for (i = 0; i < 16; i++) + d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i); + + return d; +} + +static uint32_t +bf561_ezkit_bus_read( bus_t *bus, uint32_t adr ) +{ + bf561_ezkit_bus_read_start( bus, adr ); + return bf561_ezkit_bus_read_end( bus ); +} + +static void +bf561_ezkit_bus_write( bus_t *bus, uint32_t adr, uint32_t data ) +{ + part_t *p = PART; + chain_t *chain = CHAIN; + + select_flash( bus ); + part_set_signal( p, AOE, 1, 1 ); + + setup_address( bus, adr ); + setup_data( bus, data ); + + chain_shift_data_registers( chain, 0 ); + + part_set_signal( p, AWE, 1, 0 ); + chain_shift_data_registers( chain, 0 ); + part_set_signal( p, AWE, 1, 1 ); + unselect_flash( bus ); + chain_shift_data_registers( chain, 0 ); +} + +static int +bf561_ezkit_bus_area( bus_t *bus, uint32_t addr, bus_area_t *area ) +{ + area->description = NULL; + area->start = UINT32_C(0x00000000); + area->length = UINT64_C(0x100000000); + area->width = 16; + return 0; +} + +static void +bf561_ezkit_bus_free( bus_t *bus ) +{ + free( bus->params ); + free( bus ); +} + +static bus_t *bf561_ezkit_bus_new( char *cmd_params[] ); + +const bus_driver_t bf561_ezkit_bus = { + "bf561_ezkit", + N_("Blackfin BF561 EZ-KIT board bus driver"), + bf561_ezkit_bus_new, + bf561_ezkit_bus_free, + bf561_ezkit_bus_printinfo, + bf561_ezkit_bus_prepare, + bf561_ezkit_bus_area, + bf561_ezkit_bus_read_start, + bf561_ezkit_bus_read_next, + bf561_ezkit_bus_read_end, + bf561_ezkit_bus_read, + bf561_ezkit_bus_write +}; + +static bus_t * +bf561_ezkit_bus_new( char *cmd_params[] ) +{ + bus_t *bus; + char buff[15]; + int i; + int failed = 0; + + if (!chain || !chain->parts || chain->parts->len <= chain->active_part || chain->active_part < 0) + return NULL; + + bus = malloc( sizeof (bus_t) ); + if (!bus) + return NULL; + + bus->driver = &bf561_ezkit_bus; + bus->params = malloc( sizeof (bus_params_t) ); + if (!bus->params) { + free( bus ); + return NULL; + } + + CHAIN = chain; + PART = chain->parts->parts[chain->active_part]; + + for (i = 0; i < 4; i++) { + sprintf( buff, "AMS_B%d", i ); + AMS[i] = part_find_signal( PART, buff ); + if (!AMS[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + for (i = 0; i < 24; i++) { + sprintf( buff, "ADDR%d", i + 2); + ADDR[i] = part_find_signal( PART, buff ); + if (!ADDR[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + for (i = 0; i < 4; i++) { + sprintf( buff, "ABE_B%d", i); + ABE[i] = part_find_signal( PART, buff ); + if (!ABE[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + for (i = 0; i < 32; i++) { + sprintf( buff, "DATA%d", i); + DATA[i] = part_find_signal( PART, buff ); + if (!DATA[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + AWE = part_find_signal( PART, "AWE_B" ); + if (!AWE) { + printf( _("signal '%s' not found\n"), "AWE_B" ); + failed = 1; + } + + AOE = part_find_signal( PART, "AOE_B" ); + if (!AOE) { + printf( _("signal '%s' not found\n"), "AOE_B" ); + failed = 1; + } + + SRAS = part_find_signal( PART, "SRAS_B" ); + if (!SRAS) { + printf( _("signal '%s' not found\n"), "SRAS_B" ); + failed = 1; + } + + SCAS = part_find_signal( PART, "SCAS_B" ); + if (!SCAS) { + printf( _("signal '%s' not found\n"), "SCAS_B" ); + failed = 1; + } + + SWE = part_find_signal( PART, "SWE_B" ); + if (!SWE) { + printf( _("signal '%s' not found\n"), "SWE_B" ); + failed = 1; + } + + for (i = 0; i < 4; i++) { + sprintf( buff, "SMS_B%d", i ); + SMS[i] = part_find_signal( PART, buff ); + if (!SMS[i]) { + printf( _("signal '%s' not found\n"), buff ); + failed = 1; + break; + } + } + + if (failed) { + free( bus->params ); + free( bus ); + return NULL; + } + + return bus; +} diff --git a/jtag/src/bus/buses.c b/jtag/src/bus/buses.c index b09109d7..d140abf0 100644 --- a/jtag/src/bus/buses.c +++ b/jtag/src/bus/buses.c @@ -35,6 +35,9 @@ const bus_driver_t *bus_drivers[] = { &ejtag_bus, &bf533_stamp_bus, &bf533_ezkit_bus, + &bf537_stamp_bus, + &bf537_ezkit_bus, + &bf561_ezkit_bus, &ixp425_bus, &lh7a400_bus, &mpc824x_bus, diff --git a/jtag/src/bus/buses.h b/jtag/src/bus/buses.h index 4b57b853..08cf3c89 100644 --- a/jtag/src/bus/buses.h +++ b/jtag/src/bus/buses.h @@ -30,6 +30,9 @@ extern const bus_driver_t bcm1250_bus; extern const bus_driver_t ejtag_bus; extern const bus_driver_t bf533_stamp_bus; extern const bus_driver_t bf533_ezkit_bus; +extern const bus_driver_t bf537_stamp_bus; +extern const bus_driver_t bf537_ezkit_bus; +extern const bus_driver_t bf561_ezkit_bus; extern const bus_driver_t ixp425_bus; extern const bus_driver_t lh7a400_bus; extern const bus_driver_t mpc824x_bus;