Added register offsets and bits.

git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@146 b68d4a1b-bc3d-0410-92ed-d4ac073336b7

include/arm/pxa2x0/pmrc.h

@@ -24,22 +24,23 @@
  * Documentation:
  * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
  *     Developer's Manual", February 2002, Order Number: 278522-001
- * [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
- *     Specification Update", May 2002, Order Number: 278534-005
  *
  */
 
 #ifndef	PXA2X0_PMRC_H
 #define	PXA2X0_PMRC_H
 
-#ifndef uint32_t
-typedef	unsigned int	uint32_t;
+#include <common.h>
+
+#if LANGUAGE == C
+#include <stdint.h>
 #endif
 
 /* Power Manager and Reset Control Registers */
 
 #define	PMRC_BASE	0x40F00000
 
+#if LANGUAGE == C
 typedef volatile struct PMRC_registers {
 	uint32_t pmcr;
 	uint32_t pssr;
@@ -56,7 +57,7 @@ typedef volatile struct PMRC_registers {
 	uint32_t rcsr;
 } PMRC_registers;
 
-#ifndef PMRC_pointer
+#ifdef PXA2X0_UNMAPPED
 #define	PMRC_pointer	((PMRC_registers*) PMRC_BASE)
 #endif
 
@@ -72,5 +73,48 @@ typedef volatile struct PMRC_registers {
 #define	PGSR1		PMRC_pointer->pgsr1
 #define	PGSR2		PMRC_pointer->pgsr2
 #define	RCSR		PMRC_pointer->rcsr
+#endif /* LANGUAGE == C */
+
+#define	PMCR_OFFSET	0x00
+#define	PSSR_OFFSET	0x04
+#define	PSPR_OFFSET	0x08
+#define	PWER_OFFSET	0x0C
+#define	PRER_OFFSET	0x10
+#define	PFER_OFFSET	0x14
+#define	PEDR_OFFSET	0x18
+#define	PCFR_OFFSET	0x1C
+#define	PGSR0_OFFSET	0x20
+#define	PGSR1_OFFSET	0x24
+#define	PGSR2_OFFSET	0x28
+#define	RCSR_OFFSET	0x30
+
+/* PMCR bits - see Table 3-7 in [1] */
+
+#define	PMCR_IDAE	bit(0)
+
+/* PSSR bits - see Table 3-13 in [1] */
+
+#define	PSSR_RDH	bit(5)
+#define	PSSR_PH		bit(4)
+#define	PSSR_VFS	bit(2)
+#define	PSSR_BFS	bit(1)
+#define	PSSR_SSS	bit(0)
+
+/* PWER bits - see Table 3-9 in [1] */
+
+#define	PWER_WERTC	bit(31)
+
+/* PCFR bits - see Table 3-8 in [1] */
+
+#define	PCFR_FS		bit(2)
+#define	PCFR_FP		bit(1)
+#define	PCFR_OPDE	bit(0)
+
+/* RCSR bits - see Table 3-18 in [1] */
+
+#define	RCSR_GPR	bit(3)
+#define	RCSR_SMR	bit(2)
+#define	RCSR_WDR	bit(1)
+#define	RCSR_HWR	bit(0)
 
-#endif	/* PXA2X0_PMRC_H */
+#endif /* PXA2X0_PMRC_H */