Added initial JTAG declarations for PXA250 (w/o boundary scan register).
git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@65 b68d4a1b-bc3d-0410-92ed-d4ac073336b7master
Marcel Telka
23 years ago
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#
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# $Id$
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#
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# JTAG declarations for PXA250
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# Copyright (C) 2002 ETC s.r.o.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; either version 2
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# of the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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# 02111-1307, USA.
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#
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# Written by Marcel Telka <marcel@telka.sk>, 2002.
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#
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# Documentation:
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# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
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# Design Guide", February 2002, Order Number: 278523-001
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# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
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# and PXA210 Application Processors User's Manual", February 2002,
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# Order Number: 278525-001
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# [3] Intel Corporation, "BSDL description for top level entity pxa250_jtag", 2002-03-06,
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# http://developer.intel.com/design/pca/applicationsprocessors/bsdl/PXA250_bsdl_bga.txt
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#
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# see Table 1-4 in [1]
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pin nACRESET D10
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pin nBATT_FAULT K12
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pin BATT_VCC M11
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pin BOOT_SEL[0] G16
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pin BOOT_SEL[1] G13
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pin BOOT_SEL[2] F13
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pin nCS[0] N8
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pin DQM[0] M8
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pin DQM[1] B1
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pin DQM[2] B2
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pin DQM[3] L7
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pin GPIO[0] L10
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pin GPIO[1] L12
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pin GPIO[2] L13
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pin GPIO[3] K14
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pin GPIO[4] J12
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pin GPIO[5] J11
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pin GPIO[6] H14
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pin GPIO[7] G15
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pin GPIO[8] F14
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pin GPIO[9] F12
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pin GPIO[10] F7
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pin GPIO[11] A7
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pin GPIO[12] B6
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pin GPIO[13] B5
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pin GPIO[14] B4
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pin GPIO[15] T8
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pin GPIO[16] E12
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pin GPIO[17] D12
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pin GPIO[18] C1
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pin GPIO[19] N14
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pin GPIO[20] N12
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pin GPIO[21] N15
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pin GPIO[22] M12
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pin GPIO[23] F9
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pin GPIO[24] E9
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pin GPIO[25] D9
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pin GPIO[26] A9
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pin GPIO[27] B9
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pin GPIO[28] C9
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pin GPIO[29] E10
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pin GPIO[30] A10
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pin GPIO[31] E11
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pin GPIO[32] A16
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pin GPIO[33] T13
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pin GPIO[34] A13
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pin GPIO[35] A14
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pin GPIO[36] A12
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pin GPIO[37] B11
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pin GPIO[38] B10
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pin GPIO[39] E13
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pin GPIO[40] F10
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pin GPIO[41] F8
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pin GPIO[42] B13
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pin GPIO[43] D13
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pin GPIO[44] A15
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pin GPIO[45] B14
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pin GPIO[46] B15
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pin GPIO[47] C15
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pin GPIO[48] P13
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pin GPIO[49] T14
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pin GPIO[50] T15
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pin GPIO[51] R15
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pin GPIO[52] P14
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pin GPIO[53] R16
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pin GPIO[54] P16
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pin GPIO[55] M13
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pin GPIO[56] N16
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pin GPIO[57] M16
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pin GPIO[58] E7
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pin GPIO[59] D7
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pin GPIO[60] C7
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pin GPIO[61] B7
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pin GPIO[62] E6
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pin GPIO[63] D6
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pin GPIO[64] E5
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pin GPIO[65] A6
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pin GPIO[66] C5
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pin GPIO[67] A5
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pin GPIO[68] D5
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pin GPIO[69] A4
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pin GPIO[70] A3
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pin GPIO[71] A2
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pin GPIO[72] C3
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pin GPIO[73] B3
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pin GPIO[74] E8
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pin GPIO[75] D8
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pin GPIO[76] B8
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pin GPIO[77] A8
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pin GPIO[78] P9
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pin GPIO[79] T9
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pin GPIO[80] R13
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pin MA[0] G1
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pin MA[1] H2
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pin MA[2] H1
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pin MA[3] H6
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pin MA[4] J6
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pin MA[5] J5
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pin MA[6] J3
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pin MA[7] J1
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pin MA[8] K1
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pin MA[9] K2
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pin MA[10] K5
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pin MA[11] K6
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pin MA[12] L1
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pin MA[13] L3
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pin MA[14] M1
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pin MA[15] M3
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pin MA[16] N3
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pin MA[17] P1
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pin MA[18] R1
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pin MA[19] P2
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pin MA[20] R3
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pin MA[21] T4
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pin MA[22] R5
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pin MA[23] P5
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pin MA[24] T5
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pin MA[25] P4
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pin MD[0] N4
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pin MD[1] M5
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pin MD[2] L5
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pin MD[3] T6
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pin MD[4] N6
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pin MD[5] T7
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pin MD[6] M6
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pin MD[7] M7
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pin MD[8] M9
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pin MD[9] T10
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pin MD[10] R9
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pin MD[11] T11
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pin MD[12] P11
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pin MD[13] N10
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pin MD[14] T12
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pin MD[15] M10
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pin MD[16] H3
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pin MD[17] H5
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pin MD[18] J4
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pin MD[19] K3
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pin MD[20] L4
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pin MD[21] M2
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pin MD[22] N1
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pin MD[23] T3
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pin MD[24] P6
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pin MD[25] R7
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pin MD[26] P7
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pin MD[27] P8
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pin MD[28] L8
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pin MD[29] P10
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pin MD[30] R11
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pin MD[31] P12
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pin MMCMD D14
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pin MMDAT B16
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pin nOE G5
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pin PEXTAL K16
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pin PLL_VCC J15
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pin PLL_VSS J16
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pin PWR_EN L11
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pin PXTAL K15
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pin RDnWR D3
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pin nRESET J13
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pin nRESET_OUT K11
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pin SCL D11
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pin SDA A11
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pin nSDCAS F3
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pin SDCKE[0] E4
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pin SDCKE[1] E3
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pin SDCLK[0] D2
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pin SDCLK[1] F5
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pin SDCLK[2] D1
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pin nSDCS[0] F1
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pin nSDCS[1] G6
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pin nSDCS[2] G3
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pin nSDCS[3] F2
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pin nSDRAS E1
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pin TCK H12
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pin TDI H15
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pin TDO H16
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pin TEST G12
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pin TESTCLK G11
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pin TEXTAL L15
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pin TXTAL L16
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pin TMS H13
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pin nTRST H11
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pin USB_N B12
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pin USB_P C12
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pin VCC F11 G7 G9 H10 J7 K8 K10 L6 L9
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pin VCCN A1 D4 F4 H4 K4 M4 M14 N5 N7 N9 N11 N13 P3 T2 T16
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pin VCCQ C6 C10 C13 D15 E14 G14
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pin nVDD_FAULT K13
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pin VSS C16 H8 H9 J8 J9 T1
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pin VSSN C2 E2 G2 J2 L2 M15 N2 P15 R2 R4 R6 R8 R10 R12 R14
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pin VSSQ C4 C8 C11 C14 D16 E15 E16 F6 F15 F16 G8 G10 H7 J10 J14 K7 K9 L14
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pin nWE G4
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# see 9.3.1 in [2]
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instruction length 5
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# mandatory instructions
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instruction EXTEST 00000
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instruction SAMPLE/PRELOAD 00001
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instruction BYPASS 11111
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# optional instructions
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instruction CLAMP 00100
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instruction HIGHZ 01000
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instruction IDCODE 11110
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# user-defined instructions
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instruction DBGRX 00010
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instruction LDIC 00111
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instruction DCSR 01001
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instruction DBGTX 10000
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# see [3]
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boundary length 385
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