Copy jtag/ to urjtag/.

This is the very first step in converting the jtag/ tree into a library
structure. All changes will be done on urjtag/. For a grace period, jtag/
will live on as a bug-fix-only release.



git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1506 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Rutger Hofman 16 years ago
parent 04b9a8bb99
commit 41a1720498

@ -0,0 +1,15 @@
autom4te*.cache
aclocal.m4
config.log
config.status
configure
configure.lineno
Makefile.in
Makefile
COPYING
INSTALL
ABOUT-NLS
m4
config.h
config.h.in
stamp-h1

@ -0,0 +1,8 @@
Arnim Läuger <arniml@users.sourceforge.net>, Kolja Waschk <kawk>
A major part of the of UrJTAG 0.6 originally comes from the openwince JTAG
Tools which are written by Marcel Telka <marcel@telka.sk>. Many lines of
code have been contributed by further numerous developers, see THANKS.

@ -0,0 +1,339 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
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convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
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Also add information on how to contact you by electronic and paper mail.
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Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
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The hypothetical commands `show w' and `show c' should show the appropriate
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You should also get your employer (if you work as a programmer) or your
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necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

File diff suppressed because it is too large Load Diff

@ -0,0 +1,44 @@
#
# $Id$
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002.
#
include $(top_srcdir)/Makefile.rules
SUBDIRS = \
doc \
include \
data \
src \
po
DIST_SUBDIRS = \
$(SUBDIRS)
noinst_HEADERS = \
sysdep.h
EXTRA_DIST = \
Makefile.rules \
UrJTAG.nsi
ACLOCAL_AMFLAGS = -I m4

@ -0,0 +1,31 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
# Copyright (C) 2004 Marcel Telka
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2003, 2004.
#
lint:
-test "$(SOURCES)" && splint $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(SOURCES)
test -z "$(SUBDIRS)" || $(MAKE) RECURSIVE_TARGETS=lint-recursive $(AM_MAKEFLAGS) lint-recursive
lint-am: Makefile @MAINTAINER_MODE_TRUE@ $(top_srcdir)/Makefile.rules
.PHONY: lint lint-am

@ -0,0 +1,396 @@
$Id$
urjtag-0.10
* Major internal improvements
- Flash write/program API function now operates on a buffer instead
of single bytes/words. Required for the multi-byte write mode.
(Arnim Laeuger)
- Limit maximum number of bytes queued for usbconn based cables.
Reduces the requested amount of memory for SVF runtest (Kolja Waschk)
- Command and methods to access JTAG signals directly, including
TRST and SRST (Sebastian Hesselbarth, Kolja Waschk, Arnim Laeuger)
* Improvements to the build system
- Several updates for Windows build compatability (Mike Frysinger)
- CPP include strategy sanitized (Mike Frysinger)
- Resolved formatting/printing mismatches (Mike Frysinger)
- bsdl2jtag program replaced by wrapper script (Arnim Laeuger)
- Man page updates (Uwe Hermann)
* Updates to the jtag command shell
- New usleep command (Stanislav Sinyagin)
- Added instruction parameter to the print command (Hartley Sweeten)
- Added ref_freq parameter to the svf command (Arnim Laeuger)
- New pod command (Kolja Waschk)
- Added noverify parameter to the flashmem command (Jeff Wittrock)
* Updates to the SVF player
- Optional reference frequency (Arnim Laeuger)
- Fix compare TDO flaw (Kolja Waschk)
- Fix progress indicator visibility (William)
- Add pass/fail report for progress reporting (Arnim Laeuger)
* New and updated bus drivers
- Support BCM6348/EJTAG 3.1 (by Andy Potter/livebox)
- Fixed address mode behvavior of prototype driver (Arnim Laeuger)
- Support foe EJTAG in DMA mode (Julien Aube)
- Added Goepel Boundary Scan Coach (Markus Schneider)
- Added additional address decoding for mpc5200 (Jeff Wittrock)
- General fix for part descriptions containing initbus (Arnim Laeuger)
- Support multiplexed bus operation for mpc5200 (Jon Smirl)
* New and updated cable drivers
- New FT2232 based cable ARM-USB-OCD TINY (Sebastian Hesselbarth)
- Parport calibration loop is more tolerant (Arnim Laeuger)
- Technology Systems TS-7800 support (Catalin Ionescu)
- New FT2232 based cable TinCanTools Flyswatter (Mark Norman)
- Added detection of InpOut32.dll and usage for I/O port access even
under Vista (Kolja Waschk)
- FT2232 MPSSE buffer increased to mitigate performance decrease (Arnim
Laeuger)
- Keep FTDI based JTAG dongles in current mode during initialization
(Holger Schurig)
- New FT2232 based cable UsbScarab2 (Tomek Cedro)
* Updated flash drivers
- Spansion S92GL chips added (Arnim Laeuger)
- Multi-byte write mode support for Intel and AMD chips (Arnim Laeuger)
- MX29LV640B recognition (Julien Aube)
- Fixed memory corruption from jedec code (Jon Smirl)
- Fix and polish flasherase implementation (Jeff Wittrock, Arnim Laeuger)
* Added new JTAG declarations for
- New steppings for BF527, BF533, BF548 (Mike Frysinger)
- New IDs for BF534 and BF548M (Mike Frysinger)
- Addes stepping for MPC5200B (Jeff Wittrock)
- Analog Devices Blackfin BF518 (Mike Frysinger)
- Atheros AR2313 flash access (snowwiehua)
- Atmel AVR32 clarifications (Holger Schurig)
- Broadcom BCM6358 / neufbox4 (Julien Aube)
- Lattice LC4064ZC (Catalin Ionescu)
- Lattice LFEC2-12E (Catalin Ionescu)
- Marvell 88E1118, 88F5182-A2 (Catalin Ionescu)
- Texas Instruments TNETV1060, TNETV1061 (Kenny)
* Updated documentation
urjtag-0.9
* Completely rewritten BSDL parser, making it better maintainable,
extendable, and also adding support for IEEE 1532 extensions
(Arnim Laeuger)
* Major internal improvements
- Most if not all internal functions now take a pointer to the
chain configuration data as an argument, instead of using a
global "chain" variable. Needed for use as a library (Jie Zhang)
- Generally UrJTAG uses less global variables now (all)
- Added new "link driver" layer where previously only parport
was known; now there's a separate subsystem for USB cables,
named "usbconn". Due to the switch, some "cable" command
arguments for USB cables changed! (Arnim Laeuger, Kolja Waschk)
* Improvements to the build system
- Cable and link driver selection during ./configure (Arnim Laeuger)
- Fix building out of tree (Mike Frysinger)
- Support run-time relocatable UrJTAG (Mike Frysinger)
- Many improvements for building on Windows and generally on
other platforms (by Mike Frysinger)
- Support building under Mac OS X (Ville Voipio)
- Some initial work to support building in MinGW (Kolja Waschk)
* Updates to the jtag command shell
- Allow to disable startup message and quit upon EOF (Mike Frysinger)
- Allow customization of jtag prompt via env variable (Mike Frysinger)
- Don't add duplicate history lines (Uwe Bonnes)
- Fixes to handling of the "frequency" command (many contributors)
- Fix quitting when not using readline (Mike Frysinger)
- Fix some irritating warning messages even if there was nothing wrong
- New "idcode" command (Uwe Bonnes)
* Updates to the SVF player
- Added progress indicator (Steve Franks)
- Fix for RUNTEST command with SEC argument (Arnim Laeuger)
- Read TDO data from instruction shift (Arnim Laeuger)
* New and updated bus drivers
- General cleanup and malloc/free issues fixed (Hartley Sweeten)
- Added avr32 bus driver (Gabor Juhos)
- Added bf526,bf527,bf538 and bf548_ezkit bus driver (Jie Zhang)
- Added fjmem bus driver (A. Laeuger)
- Add 32 bit bus support for mpc824x (Eugene Boldenkov)
* New and updated cable drivers
- General cleanup and malloc/free issues fixed (Hartley Sweeten)
- Generic FT2232 driver improvements for performance and
stability (Arnim Laeuger)
- New FT2232 based cable BFIN-UJTAG/gnICE (Michael Hennerich)
- New Segger J-Link driver (not really functional yet) (Kolja Waschk)
- Xilinx XPCU cable driver now using fast GPIF transfers via vendor
request instead of bit banging (Kolja Waschk)
* Updated flash drivers
- Fix address shift (Jeff Wittrock)
- Fixes and better verbosity in flash drivers (Jie Zhang)
* Added new JTAG declarations for
- Analog Devices Blackfin BF527 (Jie Zhang)
- Atmel ATF1504ASV (Stefan Pledl)
- Atmel AT32AP7000 (Gabor Juhos)
* Updated documentation
urjtag-0.8
* Integrated BSDL parser (Arnim Laeuger)
* Updates to the jtag command shell
- New "bsdl" command
- New "scan" command
- More flexible search algorithm for "include" and "script"
* New and updated bus drivers
- Added prototype bus driver (Detrick Martin)
- Added bus drivers for various Blackfin boards (Jie Zhang)
- Improvements in S3C4510B driver
* New and updated cable drivers (by A. Laeuger, unless noted otherwise)
- Wiggler driver with configurable pin mapping
- TRST/SRST and LED support in drivers for FT2232-based cables
- Vision EP9307 GPIO (Hartley Sweeten)
- Added new variants of FT2232-based cables
- Amontec JTAGkey (Laurent Gauch)
- OOCDLink-s
- Turtelizer 2
- USB to JTAG Interface
- Xverve DT-USB-ST Signalyzer Tool
* Numerous internal improvements
- activity queuing mechanism to speed up JTAG over USB
- simplified source directory layout; incorporated libbrux and inclow
- (hopefully) fixed problem with writing to dual-mode x8/x16 flash
- experimental (debug-only) new improved JEDEC flash detection
- improved linking with USB drivers in Cygwin environment
- several bug fixes and optimizations
* Added new JTAG declarations for
- Altera EP2C8 (Hartley Sweeten)
- Analog Devices Blackfin BF537, BF549, BF567 (Jie Zhang)
- Freescale MPC5241
- Xilinx XC2V80- XC2V250- and XC2V1000-FG256 (Alexander Didebulidze)
* Improved documentation
* Added JIM, a cable/part simulator for regression testing and demos
urjtag-0.7 (2007-12-23)
Also see libbrux/NEWS for more news, especially regarding the flash support.
* Integrated SVF player (Arnim Laeuger)
* Updates to the jtag command shell
- New writemem command to write to SRAM (Kent Palmkvist)
- New debug, test and shell commands, aliasing for parts
- Version output includes subversion revision number
- New command line options "version","help","norc"
- Improved diagnostics for bsdl2jtag, SVF player (Hein Roehrig)
- More error messages added to cmd/bit.c (Jerome Debard)
- More verbose output during flashmem (Jerome Debard)
- DR can be loaded interactively (Martin Buck)
- JTAG commands now parsed case insensitive (Andrew Dyer)
* New and updated bus drivers
- Added optional 'init' function to every bus driver
- Analog Devices Blackfin BF533 (Robin Getz)
- Analog Devices SHARC ADSP-21065L (Girish G.Pai,Lesly A.M,T.Nadackal,S.Abraham)
- Freescale MPC5200 (Asier Llano Palacios)
- IBM PPC405EP (Wojtek Kaniewski)
- Intel PXA2x0 (Cliff Brake, F.Rysanek)
- JOP.design Cyclone boards (Arnim Laeuger)
- Magnachip H7202 (Arnim Laeuger)
- Updated Samsung S3C4510 bus driver (Krysztof Blaszkowski)
- SLS Corp. UP3 (Kent Palmkvist)
- Zefant XS3 (Arnim Laeuger)
* New and updated cable drivers
- Cable command syntax changed to allow better integration of
non-parport-based cables (Laurent Pinchart)
- Added support for FreeBSD ppi interface
- Altera USB-Blaster and ixo.de usb_jtag (Kolja Waschk)
- EJTAG driver (Oleg)
- FT2232-based USB cables (Arnim Laeuger)
- IGLOO cable (Robin Getz)
- Xilinx Platform Cable USB (experimental) (Kolja Waschk)
- Fix for certain Wiggler cables (David Vrabel)
- Better diagnostics when opening ppdev (Hein Roehrig)
* Improved documentation:
- New doc/UrJTAG.txt
- Added man pages for jtag and bsdl2jtag
* Miscellaneous enhancements and fixes
- Improved timing and busy-loop waiting (Hein Roehrig)
- bidir support in bsdl2jtag (Wojtek Kaniewski)
- GCC4 Compilation fix (Asier Llano Palacios)
- Moved "libbrux" and "include" into jtag directory.
* Added new JTAG declarations for
- ADMtek ADM5120
- Altera EP1C6, EP1C12, EPM3064
- Analog Devices BF533, ADSP-21065L
- Atheros AR2312
- Atmel AT91SAM7S256
- Brecis MSP2006
- Freescale MPC5200
- Hitachi AR7300
- IBM PPC405EP
- Intel PXA270
- Lattice LC4128C
- Lexra LX5280
- Sharp LH7A400
- Xilinx XC18V04, XC2C256, XC2C64, xC2S200E, XC2S300E, XC3S..., XCF04S, XC9572XL
jtag-0.6 (2007-11-02, never released officially; many derivatives in the wild)
* Created UrJTAG fork at http://www.urjtag.org
* Added new JTAG declarations for
- Hitachi HD64465
- Hitachi SH7729 (Beregnyei Balazs)
- Motorola MPC8245
- Broadcom BCM4712 (partial, Alan Wallace)
- Xilinx XCR3128XL-VQ100 (patch 1010714, Michael Lauer)
- Xilinx XCR3032XL-VQ44 (patch 972621, Andrew Dyer)
- Toshiba TX4925/TX4926 (patch 972621, Andrew Dyer)
- Sharp LH7A400 (patch 886068, Marko Rößler)
- IBM 440GX (patch 1012120, Jerome Debard)
- Lattice LC4032V (patch 1012120, Jerome Debard)
- Lattice M4A3-64/32 (patch 1012120, Jerome Debard)
- Lattice M4A3-256/192 (patch 1012120, Jerome Debard)
* Added new bus drivers:
- Motorola MPC824x
- AMD Alchemy Solutions Au1500 (patch 853883, Zhang Wei)
- Toshiba TX4925 (patch 972625, Andrew Dyer)
- IBM PowerPC 440GX (patch 1012154, Jerome Debard)
- Sharp LH7A400 (patch 886068, Marko Rößler)
* Added support for Lattice Parallel Port JTAG Cable (patch 1012138, Jerome Debard).
* Fixed pin assignment for Macraigor Wiggler JTAG Cable (patch 1040199, Andrew Dyer).
* Added new commands:
- 'salias' to define alias for a signal
- 'reset' to reset JTAG chain
* Explicit 'detectflash' command call is required before 'flashmem' command.
* Fixed minor bugs (including bug 857039).
* Fixed compiler error on Debian Woody (patch 986414, Martin Buck).
* Added support for different Intel IXP425 frequency variants (patch 1030647, Trevor Man).
* Rewritten and improved startup sequence to distinguish between interactive invocation
and stdin input (fixed bug 858535, thanks to Andrew Dyer for an idea).
* Removed support for parameter '-' (stdin).
* New translations:
- French (Michel Robitaille)
- Kinyarwanda (Steven Michael Murphy)
jtag-0.5.1 (2003-10-11):
* Added new JTAG declarations for
- Altera EP1C20F400 (Rojhalat Ibrahim)
- Altera EPM7128AETC100 (Rojhalat Ibrahim)
* Added additional checks for valid ByteBlaster cable connection and enabled all variants
of the cable (patch 793313, Rojhalat Ibrahim).
* Used real data bus width for data reading in PXA2x0, SA1110, and SH7727 bus drivers
(based on patch 792591, thanks to Guennadi Liakhovetski).
* Added 'initbus' command to allow dynamic bus driver loading.
* Added support for flashes with multiple block erase regions for 'flashmem' (Bradley D. LaRonde).
* Added BOOT_DEF register emulation for PXA2x0 bus driver.
* Fixed inverted TRST signal for Macraigor Wiggler JTAG Cable see patch 799377 for more info,
thanks to Mike Tesch for reporting).
* Added Ka-Ro TRITON (PXA255/250) JTAG Cable driver (patch 805103, Andreas Mohr).
* Spelling and documentation fixes (patch 805108, Andreas Mohr).
* Fixed minor bugs.
* Updated translations:
- Slovak
jtag-0.5 (2003-08-19):
* Fixed bug with SELECT, AUTOFD, and STROBE signals handling (bug 745824).
* Added new commands 'peek' and 'poke' (patch 747447, Matan Ziv-Av).
* Fixed bugs in SH7727 bus driver (thanks to Rainer Dörken).
* Added bus drivers for Hitachi SH7750R and Broadcom BCM1250 (patch 753300, Matan Ziv-Av).
* Added bus driver for Hitachi SH7751R (patch 773533, Matan Ziv-Av).
* Added bus width detection using MD3 and MD4 signals in SH7727 bus driver
(thanks to Rainer Dörken).
* Changes in 'discovery' command:
- removed explicit JTAG chain length detection (patch 753298, Matan Ziv-Av)
- simplified output messages
- removed support for report results to file
* Added new command 'part', syntax changes for 'set', 'get', 'dr', 'instruction', and
'print' commands.
* Added support for multiple buses, added new 'bus' command to change active bus.
* Added initial JTAG declarations for Broadcom BCM3310 (see support request 770145 for
more info, thanks to Ramses VI).
* Added JTAG declarations for Samsung S3C4510B (Jiun-Shian Ho).
* Added bus driver for Samsung S3C4510X (Jiun-Shian Ho).
* Fixed invalid memory allocation size (core dump) in jtag_parse_line() function.
* Added new 'include' command.
* Added new commands 'signal', 'register', 'bit', and enhanced 'instruction' command
to allow create JTAG declarations from command line (or script).
* Added new 'eraseflash' command (patch 772267, Thomas Fröhlich).
* JTAG declarations are now executed as scripts.
* Added support for parts without IDCODE instruction.
* Added support for "downto" in bit vectors and "observe_only" into bsdl2jtag
(patch 787346, Brad Parker).
* Minor bugs fixed.
* New translations:
- Slovak
jtag-0.4 (2003-05-29):
* Added support for executing scripts directly from stdin (parameter '-').
* Disabled external bus cycles for PXA250 for addresses above 0x04000000.
* Fixed bug in BUSY signal handling in Linux ppdev driver.
* Optimized bus drivers to increase bus access speed (readmem, flashmem, ...).
* Added new command 'endian' to configure access mode to external files.
* Added JTAG declarations for
- Broadcom BCM5421S (patch 743129, Matan Ziv-Av)
- DEC SA1100 (thanks to Jachym Holecek)
* Added bus driver for Hitachi SH7727 (based on patch 743140, Matan Ziv-Av).
* Added support for printing current JTAG frequency.
* Added support for 'signal' keyword (as alias for 'pin') into JTAG declarations.
* Minor bugs fixed.
jtag-0.3.2 (2003-04-04):
* Added driver for Keith & Koep JTAG Cable.
* Ported to NetBSD/i386 (Jachym Holecek).
* Added JTAG declarations for Xilinx XCR3256XL-FT256 (Jachym Holecek).
jtag-0.3.1 (2003-03-19):
* Added support for Intel PXA255 A0 (thanks to Mike Sprauve).
* Added support for running scripts specified as jtag command line parameters.
* Added support for comments in scripts. Lines started with `#' are treated as
comments.
* Added support for Linux ppdev parallel port driver. Non-root users can
use JTAG Tools now.
* Added new `bsdl2jtag' conversion tool (Matan Ziv-Av).
jtag-0.3 (2003-02-25):
* Changes in interactive commands:
- enhanced 'dr' command functionality
- new 'set signal' command
- new 'get signal' command
- new 'script' command (Alessandro Zummo)
* Added support for JTAG cables:
- Mpcbdm JTAG Cable (Christian Pellegrin)
- Arcom JTAG Cable (patch 682310, Ian Campbell)
* Added JTAG declarations for
- Intel IXP425 (Christian Pellegrin)
- Xilinx XC2C256-TQ144 (Alessandro Zummo)
- Broadcom BCM1250 (Matan Ziv-Av)
- Hitachi SH7727 (Matan Ziv-Av)
* Added bus driver for Intel IXP425 (Christian Pellegrin).
* Added support for all 6 static memory banks for Intel SA1110 (bug 682660).
* Added support for bidirectional 'B' boundary scan bits (Christian Pellegrin).
* Added support for 1 x 16 bit memory configuration (Christian Pellegrin).
* Added buffered file reads/writes (Christian Pellegrin).
* Added support for flash drivers (August Hörandl).
* Added flash driver for AMD chips (August Hörandl).
* Added support for rc and history files (Alessandro Zummo).
* Added support for localization.
* Some bugs fixed.
jtag-0.2.2 (2003-02-04):
* Added new manufacturer: Cypress. (patch 669157, Chris Ellec)
* Added new 'frequency' command to limit maximum TCK frequency
* Added support for parallel ports with I/O addresses above 0x3FF
jtag-0.2.1 (2003-01-13):
* Fixed compile error (bug 665923, thanks to Chris Ellec).
* Added support for Macraigor Wiggler JTAG Cable (Stas Khirman).
* Added support for Altera ByteBlaster/ByteBlaster II/ByteBlasterMV
Parallel Port Download Cable.
* Fixed some other bugs.
jtag-0.2 (2003-01-08):
* Completed JTAG declarations for Xilinx XCR3128XL-CS144.
* Fixed crash if flash memory is not detected.
* Added new 'discovery' command for discovery unknown JTAG chains.
* Added JTAG cable driver support and new 'cable' command.
jtag-0.1 (2002-11-25):
* Initial public release.

@ -0,0 +1,16 @@
$Id$
UrJTAG package is free software, covered by the GNU General Public License, and
you are welcome to change it and/or distribute copies of it under certain
conditions. There is absolutely no warranty for UrJTAG. Please read COPYING
file for more info.
All the information about installing and running UrJTAG is available in
the document
<< doc/UrJTAG.txt >>
The very latest information and software updates are available at
the project homepage
<< http://www.urjtag.org >>

@ -0,0 +1,93 @@
$Id$
Please complain if you find any typos, incorrect sorting,
or someone is missing who should be listed there!
Shaju Abraham
Julien Aube
Beregnyei Balazs
Michael Banditt
Krzysztof Blaszkowski
Eugene Boldenkov
Uwe Bonnes
Cliff Brake
Martin Buck
Ian Campbell
Jeff Carr
Tomek Cedro
Alex (d18c7db)
Jerome Debard
Kris Dickie
Alexander Didebulidze
Rainer Dörken
Andrew Dyer
Chris Ellec
Ralf Engels
Steve Franks
Thomas Fröhlich
Mike Frysinger
Robin Getz
Christophe Grenier
Uwe Hermann
Sebastian Hesselbarth
Jiun-Shian Ho
Jachym Holecek
August Hörandl
Rojhalat Ibrahim
Andrey F. Ilchuk
Catalin Ionescu
Kees Jongenburger
Gabor Juhos
Wojtek Kaniewski
Kenny
Stas Khirman
Matej Kupljen
Arnim Läuger
Bradley D. LaRonde
Michael Lauer
Guennadi Liakhovetski
Anselmo Luginbühl
Lesly A. M
Raphael Mack
Trevor Man
Detrick Martin
Andreas Mohr
Jani Monoses
Masaki Muranaka
Tony K Nadackal
Márton Németh
Mark Norman
Oleg <olegi>
Daniel O'Connor
Girish G Pai
Asier Llano Palacios
Kent Palmkvist
Brad Parker
Ken Parker
Christian Pellegrin
Laurent Pinchart
Ramses VI
Michel Robitaille
Hein Roehrig
Marko Rößler
Frantisek Rysanek
Benedikt Sauter
Markus Schneider
Holger Schurig
Robert Sedevici
Stanislav Sinyagin
Jon Smirl
Snowel (snowweihua)
Juergen Stuber
Hartley Sweeten
Marcel Telka
Mike Tesch
Ville Voipio
David Vrabel
Alan Wallace
William (wmsfuan)
Jeff Wittrock
Zhang Wei
Jie Zhang
Matan Ziv-Av
Alessandro Zummo

@ -0,0 +1,190 @@
;
; $Id$
;
; Script to create Installer for Windows platforms using
; "nullsoft scriptable install system" (NSIS)
; (available from http://nsis.sourceforge.net)
;
; Copyright (C) 2009 K. Waschk
;
; This program is free software; you can redistribute it and/or
; modify it under the terms of the GNU General Public License
; as published by the Free Software Foundation; either version 2
; of the License, or (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
;
; Written by K. Waschk, 2009
; Based on "Modern UI Basic Example Script" by Joost Verburg
;
; Last tested with NSIS version 2.42
;
; Run makensis.exe in the root of an UrJTAG source directory
; extracted from a distributed archive of UrJTAG (make dist)
; after configuring and compiling. Usually you want to compile
; with --with-ftd2xx, --with-inpout32, --enable-relocatable and
; the CFLAGS=-mno-cygwin setting. To make UrJTAG search for
; its data files and BSDL declarations in the correct path,
; add JTAG_BIN_DIR and JTAG_DATA_DIR as follows to the CFLAGS
; on the same line together with ./configure and its options
; (this is used for building the UrJTAG.exe distributable):
;
; CFLAGS="-mno-cygwin -O2 -DJTAG_BIN_DIR=\\\"/\\\" -DJTAG_DATA_DIR=\\\"/data\\\""
; ./configure --enable-relocatable \
; --with-ftd2xx=/tmp/FTDI_CDM_204 \
; --with-libusb=/tmp/LibUSB-Win32_112 \
; --with-inpout32
;
; This script now expects InpOut32.dll in the current directory
; as well. You can get an InpOut32.dll that works on 32 bit AND
; 64 bit Windows, including Vista, from
; http://www.highrez.co.uk/Downloads/InpOut32/
;
; No drivers for FTDI cables are installed. FTD2XX.DLL must be
; in your PATH somewhere. It usually is installed with the cable
; drivers.
;
;--------------------------------
;Include Modern UI
!include "MUI2.nsh"
;--------------------------------
;General
;Name and file
Name "UrJTAG"
OutFile "UrJTAG.exe"
;Default installation folder
InstallDir "$PROGRAMFILES\UrJTAG"
;Get installation folder from registry if available
InstallDirRegKey HKCU "Software\UrJTAG" ""
;Request application privileges for Windows Vista
RequestExecutionLevel user
;--------------------------------
;Interface Settings
!define MUI_ABORTWARNING
;--------------------------------
;Variables
Var StartMenuFolder
;--------------------------------
;Pages
!insertmacro MUI_PAGE_LICENSE "COPYING"
!insertmacro MUI_PAGE_COMPONENTS
!insertmacro MUI_PAGE_DIRECTORY
;Start Menu Folder Page Configuration
!define MUI_STARTMENUPAGE_REGISTRY_ROOT "HKCU"
!define MUI_STARTMENUPAGE_REGISTRY_KEY "Software\UrJTAG"
!define MUI_STARTMENUPAGE_REGISTRY_VALUENAME "Start Menu Folder"
!insertmacro MUI_PAGE_STARTMENU Application $StartMenuFolder
!insertmacro MUI_PAGE_INSTFILES
!insertmacro MUI_UNPAGE_CONFIRM
!insertmacro MUI_UNPAGE_INSTFILES
;--------------------------------
;Languages
!insertmacro MUI_LANGUAGE "English"
;--------------------------------
;Installer Sections
Section "UrJTAG executable" SecExe
SetOutPath "$INSTDIR"
File src\jtag.exe
File inpout32.dll
WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR
WriteUninstaller "$INSTDIR\uninst.exe"
SectionEnd
Section "Documentation" SecDoc
SetOutPath "$INSTDIR\doc"
File doc\UrJTAG.txt
WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR
WriteUninstaller "$INSTDIR\uninst.exe"
SectionEnd
Section "Data files" SecData
SetOutPath "$INSTDIR\data"
File /r /x Makefile /x Makefile.am /x Makefile.in data\*
WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR
WriteUninstaller "$INSTDIR\uninst.exe"
SectionEnd
Section "Start Menu Entries" SecStartMenu
!insertmacro MUI_STARTMENU_WRITE_BEGIN Application
;Create shortcuts
CreateDirectory "$SMPROGRAMS\$StartMenuFolder"
CreateShortCut "$SMPROGRAMS\$StartMenuFolder\JTAG Shell.lnk" "$INSTDIR\jtag.exe"
CreateShortCut "$SMPROGRAMS\$StartMenuFolder\Documentation.lnk" "$INSTDIR\doc\UrJTAG.txt"
CreateShortCut "$SMPROGRAMS\$StartMenuFolder\Uninstall.lnk" "$INSTDIR\Uninstall.exe"
!insertmacro MUI_STARTMENU_WRITE_END
SectionEnd
;--------------------------------
;Descriptions
!insertmacro MUI_FUNCTION_DESCRIPTION_BEGIN
!insertmacro MUI_DESCRIPTION_TEXT ${SecExe} \
"UrJTAG executable"
!insertmacro MUI_DESCRIPTION_TEXT ${SecDoc} \
"Documentation for UrJTAG"
!insertmacro MUI_DESCRIPTION_TEXT ${SecData} \
"BSDL include files and part descriptions for autodetection"
!insertmacro MUI_DESCRIPTION_TEXT ${SecStartMenu} \
"Links to UrJTAG in Start Menu"
!insertmacro MUI_FUNCTION_DESCRIPTION_END
;--------------------------------
;Uninstaller Section
Section "Uninstall"
RMDir /r "$INSTDIR\doc"
RMDir /r "$INSTDIR\data"
Delete "$INSTDIR\jtag.exe"
Delete "$INSTDIR\uninst.exe"
RMDir /r "$INSTDIR"
!insertmacro MUI_STARTMENU_GETFOLDER Application $StartMenuFolder
Delete "$SMPROGRAMS\$StartMenuFolder\Uninstall.lnk"
RMDir "$SMPROGRAMS\$StartMenuFolder"
DeleteRegKey /ifempty HKCU "Software\UrJTAG"
SectionEnd

@ -0,0 +1,132 @@
dnl @synopsis VL_LIB_READLINE
dnl
dnl Searches for a readline compatible library. If found, defines
dnl `HAVE_LIBREADLINE'. If the found library has the `add_history'
dnl function, sets also `HAVE_READLINE_HISTORY'. Also checks for the
dnl locations of the necessary include files and sets `HAVE_READLINE_H'
dnl or `HAVE_READLINE_READLINE_H' and `HAVE_READLINE_HISTORY_H' or
dnl 'HAVE_HISTORY_H' if the corresponding include files exists.
dnl
dnl The libraries that may be readline compatible are `libedit',
dnl `libeditline' and `libreadline'. Sometimes we need to link a termcap
dnl library for readline to work, this macro tests these cases too by
dnl trying to link with `libtermcap', `libcurses', `libncurses' or
dnl `libtinfo' before giving up.
dnl
dnl Here is an example of how to use the information provided by this
dnl macro to perform the necessary includes or declarations in a C file:
dnl
dnl #ifdef HAVE_LIBREADLINE
dnl # if defined(HAVE_READLINE_READLINE_H)
dnl # include <readline/readline.h>
dnl # elif defined(HAVE_READLINE_H)
dnl # include <readline.h>
dnl # else /* !defined(HAVE_READLINE_H) */
dnl extern char *readline ();
dnl # endif /* !defined(HAVE_READLINE_H) */
dnl char *cmdline = NULL;
dnl #else /* !defined(HAVE_READLINE_READLINE_H) */
dnl /* no readline */
dnl #endif /* HAVE_LIBREADLINE */
dnl
dnl #ifdef HAVE_READLINE_HISTORY
dnl # if defined(HAVE_READLINE_HISTORY_H)
dnl # include <readline/history.h>
dnl # elif defined(HAVE_HISTORY_H)
dnl # include <history.h>
dnl # else /* !defined(HAVE_HISTORY_H) */
dnl extern void add_history ();
dnl extern int write_history ();
dnl extern int read_history ();
dnl # endif /* defined(HAVE_READLINE_HISTORY_H) */
dnl /* no history */
dnl #endif /* HAVE_READLINE_HISTORY */
dnl
dnl
dnl @version 1.1
dnl @author Ville Laurikari <vl@iki.fi>
dnl @author Ville Voipio <vv@iki.fi>; check for readline completion (not available in, e.g. Leopard)
AC_DEFUN([VL_LIB_READLINE], [
AC_CACHE_CHECK([for a readline compatible library],
vl_cv_lib_readline, [
ORIG_LIBS="$LIBS"
for readline_lib in readline edit editline; do
for termcap_lib in "" termcap curses ncurses tinfo; do
if test -z "$termcap_lib"; then
TRY_LIB="-l$readline_lib"
else
TRY_LIB="-l$readline_lib -l$termcap_lib"
fi
LIBS="$ORIG_LIBS $TRY_LIB"
AC_TRY_LINK_FUNC(readline, vl_cv_lib_readline="$TRY_LIB")
if test -n "$vl_cv_lib_readline"; then
break
fi
done
if test -n "$vl_cv_lib_readline"; then
break
fi
done
if test -z "$vl_cv_lib_readline"; then
vl_cv_lib_readline="no"
LIBS="$ORIG_LIBS"
fi
])
if test "$vl_cv_lib_readline" != "no"; then
AC_DEFINE(HAVE_LIBREADLINE, 1,
[Define if you have a readline compatible library])
AC_CHECK_HEADERS(readline.h readline/readline.h)
AC_CACHE_CHECK([whether readline supports history],
vl_cv_lib_readline_history,
[vl_cv_lib_readline_history="no"
AC_TRY_LINK_FUNC(add_history, vl_cv_lib_readline_history="yes")])
if test "$vl_cv_lib_readline_history" = "yes"; then
AC_DEFINE(HAVE_READLINE_HISTORY, 1, [Define if your readline library has \`add_history'])
AC_CHECK_HEADERS(history.h readline/history.h)
fi
AC_CACHE_CHECK([whether readline supports completion],
vl_cv_lib_readline_completion,
[vl_cv_lib_readline_completion="no"
AC_TRY_LINK_FUNC(rl_completion_matches, vl_cv_lib_readline_completion="yes")])
if test "$vl_cv_lib_readline_completion" = "yes"; then
AC_DEFINE(HAVE_READLINE_COMPLETION, 1, [Define if your readline library has \`rl_completion_matches'])
fi
fi
])dnl
# ACI_PROG_SED
# ------------
# Check for a fully functional sed program that truncates
# as few characters as possible. Prefer GNU sed if found.
#
# Copyright (C) Free Software Foundation
#
# Copied here from autoconf-2.60 programs.m4 (AC_PROG_SED) to maintain
# compatibility with autoconf-2.59. Can be removed from acinclude.m4 if
# autoconf-2.60 or newer is required for other reasons..
#
m4_ifndef([AC_PROG_SED],[dnl
AC_DEFUN([AC_PROG_SED],
[AC_CACHE_CHECK([for a sed that does not truncate output], ac_cv_path_SED,
[dnl ac_script should not contain more than 99 commands (for HP-UX sed),
dnl but more than about 7000 bytes, to catch a limit in Solaris 8 /usr/ucb/sed.
ac_script=s/aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa/bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb/
for ac_i in 1 2 3 4 5 6 7; do
ac_script="$ac_script$as_nl$ac_script"
done
echo "$ac_script" | sed 99q >conftest.sed
$as_unset ac_script || ac_script=
_AC_PATH_PROG_FEATURE_CHECK(SED, [sed gsed],
[_AC_FEATURE_CHECK_LENGTH([ac_path_SED], [ac_cv_path_SED],
["$ac_path_SED" -f conftest.sed])])])
SED="$ac_cv_path_SED"
AC_SUBST([SED])dnl
rm -f conftest.sed
])# ACI_PROG_SED
])dnl

@ -0,0 +1,36 @@
#!/bin/sh
#
# $Id$
#
# Copyright (C) 2002, 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
#
if autoreconf -i -s -v -f ; then
echo
echo "autoreconf done."
echo
else
echo
echo "autoreconf failed."
echo
exit 1
fi
./configure --enable-maintainer-mode

@ -0,0 +1,645 @@
#
# $Id$
#
# Copyright (C) 2007, 2008 Kolja Waschk and other
# UrJTAG.org developers, (C) 2002, 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002, 2003,
# and other UrJTAG authors, 2007, 2008, ...
#
AC_INIT(UrJTAG,0.10,http://urjtag.org,urjtag)
AC_PREREQ(2.54)
AC_COPYRIGHT([Copyright (C) 2007/08 Kolja Waschk and other UrJTAG authors; 2002/03 ETC s.r.o.])
AC_REVISION($Revision$)
# Get SVN Revision - idea from xfce-power-manager (C) 2007 by B.Tarricone
dnl get svn revision
AC_MSG_CHECKING([code revision])
SVN=`which svn`
SVN_REVISION=0
if test -n "$SVN" -a -x "$SVN"; then
SVN_REVISION=`LC_ALL=C svn info -R "$srcdir" | awk 'BEGIN { x=0 } /^Revision: / { if($2>x) x=$2; } END { printf "%d\n",x }'`
if test "$SVN_REVISION" -ne "0" ; then
AC_MSG_RESULT([from svn info: $SVN_REVISION])
fi
fi
if test "$SVN_REVISION" -eq 0 -a -e "$srcdir/ChangeLog"; then
SVN_REVISION=`awk 'BEGIN { x=0 } /Revision: / { if($2>x) x=$2; } END { printf "%d\n",x }' "$srcdir/ChangeLog"`
if test "$SVN_REVISION" -ne "0" ; then
AC_MSG_RESULT([from ChangeLog: $SVN_REVISION])
fi
fi
if test "$SVN_REVISION" -eq "0" ; then
AC_MSG_RESULT([unknown, using 0])
fi
AC_DEFINE_UNQUOTED([SVN_REVISION], "$SVN_REVISION", [subversion revision number])
AC_SUBST([SVN_REVISION])
AC_CONFIG_AUX_DIR(tools)
AM_INIT_AUTOMAKE([check-news dist-bzip2])
AC_CONFIG_FILES(
Makefile
doc/Makefile
data/Makefile
include/Makefile
src/Makefile
src/lib/Makefile
src/tap/Makefile
src/part/Makefile
src/bus/Makefile
src/flash/Makefile
src/cmd/Makefile
src/svf/Makefile
src/bsdl/Makefile
src/jim/Makefile
po/Makefile.in
)
AM_MAINTAINER_MODE
AM_CONFIG_HEADER(config.h)
AC_GNU_SOURCE
AM_GNU_GETTEXT(external)
AM_GNU_GETTEXT_VERSION(0.14.1)
AC_PROG_CC
AC_PROG_RANLIB
AC_PROG_YACC
AC_SEARCH_LIBS([ioperm], [ioperm])
if test "$ac_cv_search_ioperm" != "no"; then
AC_DEFINE(HAVE_IOPERM, 1, [Define to 1 if you have the ioperm() function])
HAVE_IOPERM="yes"
else
AC_SEARCH_LIBS([i386_set_ioperm], [i386])
if test "$ac_cv_search_i386_set_ioperm" != "no"; then
AC_DEFINE(HAVE_I386_SET_IOPERM, 1,
[Define to 1 if you have the i386_set_ioperm() function])
HAVE_I386_SET_IOPERM="yes"
fi
fi
AC_CHECK_FUNCS(getline getdelim)
AC_CHECK_FUNCS(swprintf)
AC_CHECK_FUNC(clock_gettime, [], [ AC_CHECK_LIB(rt, clock_gettime) ])
AC_CHECK_HEADERS([linux/ppdev.h], [HAVE_LINUX_PPDEV_H="yes"])
AC_CHECK_HEADERS([dev/ppbus/ppi.h], [HAVE_DEV_PPBUS_PPI_H="yes"])
AC_CHECK_HEADERS(stropts.h)
AC_CHECK_HEADERS(wchar.h)
VL_LIB_READLINE
dnl check for libusb-config
AC_ARG_WITH([libusb],
[AS_HELP_STRING([--with-libusb],
[use libusb for some USB JTAG cables])],,
[with_libusb=check])
AS_IF([test "x$with_libusb" != xno], [
save_LIBS=$LIBS
save_CPPFLAGS=$CPPFLAGS
AS_IF([test "x$with_libusb" != xyes -a "x$with_libusb" != xcheck], [
case $host in
*cygwin*)
USBLIBS="-L$with_libusb/lib/gcc -lusb"
USBCFLAGS="-I$with_libusb/include"
;;
*)
USBLIBS="-Lwith_libusb -lusb"
USBCFLAGS="-I$with_libusb"
;;
esac
],[
AC_PATH_TOOL(LIBUSB_CONFIG, libusb-config, no)
AS_IF([test "$LIBUSB_CONFIG" != "no"],[
USBLIBS=`$LIBUSB_CONFIG --libs`
USBCFLAGS=`$LIBUSB_CONFIG --cflags`
],)
])
LIBS="$LIBS $USBLIBS"
CPPFLAGS="$CPPFLAGS $USBCFLAGS"
AC_CHECK_FUNC([usb_find_devices], [
AC_DEFINE(HAVE_LIBUSB, 1, [Define if you have libusb])
HAVELIBUSB=yes
],[
AC_MSG_WARN([*** libusb not detected. No support for USB JTAG cables via libusb.])
LIBS=$save_LIBS
CPPFLAGS=$save_CPPFLAGS
])
],)
AS_IF([test "x$HAVELIBUSB" = "xyes"],[
AM_CONDITIONAL(HAVE_LIBUSB, true)
],[
AM_CONDITIONAL(HAVE_LIBUSB, false)
])
dnl Use FTDI library?
AC_ARG_WITH([libftdi],
[AS_HELP_STRING([--with-libftdi],
[use libftdi for FTDI-based cables])],
[], [with_libftdi=check])
AS_IF([test "x$with_libftdi" != xno], [
save_LIBS=$LIBS
save_CPPFLAGS=$CPPFLAGS
AS_IF([test "x$with_libftdi" != xyes -a "x$with_libftdi" != xcheck], [
FTDILIBS="-L$with_libftdi -lftdi"
FTDICFLAGS="-I$with_libftdi"
],[
AC_PATH_TOOL(LIBFTDI_CONFIG, libftdi-config, no)
AS_IF([test "$LIBFTDI_CONFIG" != "no"],[
FTDILIBS=`$LIBFTDI_CONFIG --libs`
FTDICFLAGS=`$LIBFTDI_CONFIG --cflags`
],)
])
LIBS="$FTDILIBS $LIBS"
CPPFLAGS="$CPPFLAGS $FTDICFLAGS"
AC_CHECK_FUNC([ftdi_usb_open], [
AC_DEFINE(HAVE_LIBFTDI, 1, [Define if you have libftdi])
HAVELIBFTDI=yes
],[
AC_MSG_WARN([*** libftdi not detected. No support for FTDI-based USB JTAG cables via libftdi.])
LIBS=$save_LIBS
CPPFLAGS=$save_CPPFLAGS
])
],)
AS_IF([test "x$HAVELIBFTDI" = "xyes"],[
AM_CONDITIONAL(HAVE_LIBFTDI, true)
],[
AM_CONDITIONAL(HAVE_LIBFTDI, false)
])
dnl Use FTDI ftd2xx library?
AC_ARG_WITH([ftd2xx],
[AS_HELP_STRING([--with-ftd2xx],
[use ftd2xx library for FTDI-based cables])],
[], [with_ftd2xx=check])
FTD2XXLIB=
AS_IF([test "x$with_ftd2xx" = xyes -o "x$with_ftd2xx" = xcheck], [
AC_CHECK_LIB([ftd2xx], [FT_OpenEx], [
HAVELIBFTD2XX=yes
LIBS="-lftd2xx $LIBS"
],[
AC_MSG_WARN([*** libftd2xx not found. No support for FTDI-based USB JTAG cables via libftd2xx.])
])
],[
AS_IF([test "x$with_ftd2xx" != xno], [
HAVELIBFTD2XX=yes
case $host in
*cygwin*|*mingw*)
CFLAGS="$CFLAGS -I$with_ftd2xx"
AS_IF([test -d "$with_ftd2xx/i386"], [
FTD2XXLIB="$with_ftd2xx/i386/ftd2xx.lib"
],[
FTD2XXLIB="$with_ftd2xx/ftd2xx.lib"
])
;;
*)
CFLAGS="$CFLAGS -I$with_ftd2xx -L$with_ftd2xx"
LIBS="-lftd2xx $LIBS"
;;
esac
],)
])
AS_IF([test "x$HAVELIBFTD2XX" = xyes], [
AM_CONDITIONAL(HAVE_LIBFTD2XX, true)
AC_DEFINE(HAVE_LIBFTD2XX, 1, [define if you have libftd2xx])
],[
AM_CONDITIONAL(HAVE_LIBFTD2XX, false)
])
AC_SUBST(FTD2XXLIB)
dnl Use InpOut I/O library?
dnl http://www.highrez.co.uk/Downloads/InpOut32/default.htm
AC_ARG_WITH([inpout32],
[AS_HELP_STRING([--with-inpout32],
[use InpOut32.dll for parallel port access on Windows])],
[], [with_inpout32=no])
case $host in
*cygwin*|*mingw*) ;;
*) with_inpout32=no ;;
esac
AS_IF([test "x$with_inpout32" = xyes], [
AM_CONDITIONAL(HAVE_INPOUTXX, true)
AC_DEFINE(HAVE_INPOUTXX, 1, [define if you have inpout32.dll])
],[
AM_CONDITIONAL(HAVE_INPOUTXX, false)
])
CFLAGS="$CFLAGS -Wall"
CPPFLAGS="-I\$(top_srcdir) -I\$(top_srcdir)/include $CPPFLAGS"
# check for lex/flex
AC_PROG_LEX
# check for modern version of flex
AC_PROG_AWK
AC_PROG_SED
AS_IF([test "$LEX" = flex], [
ver_ge_ver () {
v1=$1
v2=$2
v3=$3
ref_v1=$4
ref_v2=$5
ref_v3=$6
AS_IF([test -n "$v1" -a "$v1" -gt "$ref_v1"], [
return 0
])
AS_IF([test -n "$v1" -a "$v1" -eq "$ref_v1"], [
AS_IF([test "$v2" -gt "$ref_v2"], [
return 0
])
AS_IF([test "$v2" -eq "$ref_v2"], [
AS_IF([test "$v3" -ge "$ref_v3"], [
return 0
])
])
])
return 1
}
flex_version=`$LEX --version | $AWK '{print $2}'`
AS_IF([test "$flex_version" = "version"], [
flex_version=`$LEX --version | $AWK '{print $3}'`
])
flex_v1=`echo $flex_version | $AWK -F . '{print $1}' | $SED -e 's/[a-zA-Z]//g'`
flex_v2=`echo $flex_version | $AWK -F . '{print $2}' | $SED -e 's/[a-zA-Z]//g'`
flex_v3=`echo $flex_version | $AWK -F . '{print $3}' | $SED -e 's/[a-zA-Z]//g'`
# svf and bsdl lexer require flex >= 2.5.33
flex_ref_v1=2
flex_ref_v2=5
flex_ref_v3=33
flex_ref_version="$flex_ref_v1.$flex_ref_v2.$flex_ref_v3"
AC_MSG_CHECKING([for flex >= $flex_ref_version, required for SVF and BSDL lexer])
#
AS_IF([ver_ge_ver $flex_v1 $flex_v2 $flex_v3 $flex_ref_v1 $flex_ref_v2 $flex_ref_v3], [
AC_MSG_RESULT([yes - flex $flex_version])
svf_lexer=true
bsdl_lexer=true
], [
AC_MSG_RESULT([no - flex $flex_version])
svf_lexer=false
bsdl_lexer=false
])
], [
svf_lexer=false
bsdl_lexer=false
])
dnl If the transformed svf_flex.c is already existing, it doesn't matter
dnl that flex is too old for building the lexer.
AS_IF([test "x$svf_lexer" = xfalse], [
AS_IF([test -r src/svf/svf_flex.c], [
svf_lexer=true
])
])
dnl Enable SVF player?
AC_ARG_ENABLE(svf,
[AS_HELP_STRING([--disable-svf], [Disable SVF player])],
[case "${enableval}" in
yes) svf=true ;;
no) svf=false ;;
*) AC_MSG_ERROR(bad value ${enableval} for --enable-svf) ;;
esac],
[svf=$svf_lexer])
AS_IF([test "x$svf" = xtrue], [
AM_CONDITIONAL(ENABLE_SVF, true)
AC_DEFINE(ENABLE_SVF, 1, [define if SVF player is enabled])
],[
AM_CONDITIONAL(ENABLE_SVF, false)
])
dnl If the transformed bsdl_flex.c is already existing, it doesn't matter
dnl that flex is too old for building the lexer.
AS_IF([test "x$bsdl_lexer" = xfalse], [
AS_IF([test -r src/bsdl/bsdl_flex.c], [
bsdl_lexer=true
])
])
dnl Enable BSDL subsystem?
AC_ARG_ENABLE(bsdl,
[AS_HELP_STRING([--disable-bsdl], [Disable BSDL subsystem])],
[case "${enableval}" in
yes) bsdl=true ;;
no) bsdl=false ;;
*) AC_MSG_ERROR(bad value ${enableval} for --enable-bsdl) ;;
esac],
[bsdl=$bsdl_lexer])
AS_IF([test "x$bsdl" = xtrue], [
AM_CONDITIONAL(ENABLE_BSDL, true)
AC_DEFINE(ENABLE_BSDL, 1, [define if BSDL subsystem is enabled])
],[
AM_CONDITIONAL(ENABLE_BSDL, false)
])
dnl Enable experimental brute-force JEDEC flash autodetection?
AC_ARG_ENABLE(jedec-exp,
[AS_HELP_STRING([--enable-jedec-exp], [Enable experimental JEDEC flash detection])],
[case "${enableval}" in
yes) jedecexp=true ;;
no) jedecexp=false ;;
*) AC_MSG_ERROR(bad value ${enableval} for --enable-jedec-exp) ;;
esac],
[jedecexp=false])
AS_IF([test "x$jedecexp" = xtrue], [
AM_CONDITIONAL(JEDEC_EXP, true)
AC_DEFINE(JEDEC_EXP, 1, [define if experimental JEDEC flash detection is enabled])
],[
AM_CONDITIONAL(JEDEC_EXP, false)
])
# Macro for driver include check
AC_DEFUN([CHECK_DRIVER], [
AS_IF([echo "$1" | $GREP -q $3], [
AC_DEFINE([$4], 1, [define if $3 is enabled])
AM_CONDITIONAL([$4], true)
$2="${$2}$3 "
], [
AM_CONDITIONAL([$4], false)
])
])
# Enable bus drivers
AC_DEFUN([DEF_ENABLE_BUSDRIVERS], [\
au1500 avr32 bcm1250 bf526_ezkit bf527_ezkit bf533_stamp bf533_ezkit bf537_stamp bf537_ezkit bf538f_ezkit bf548_ezkit bf561_ezkit bscoach ejtag ejtag_dma\
fjmem ixp425 jopcyc h7202 lh7a400 mpc5200 mpc824x ppc405ep ppc440gx_ebc8 prototype pxa2x0 pxa27x \
s3c4510 sa1110 sh7727 sh7750r sh7751r sharc_21065L slsup3 tx4925 zefant_xs3])
AC_ARG_ENABLE(bus,
[AS_HELP_STRING([--enable-bus], [Enable default set or specific bus drivers:])]
[AS_HELP_STRING([], ['default' enables:])]
[AS_HELP_STRING([],DEF_ENABLE_BUSDRIVERS)]
,
[AS_CASE([${enableval}],
[yes], [busdrivers=default],
[no], [busdrivers=none],
[none], [busdrivers=none],
[busdrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
[busdrivers=default])
# expand 'default' to default enabled busdrivers
busdrivers=`echo ${busdrivers} | $SED -e "s/default/DEF_ENABLE_BUSDRIVERS/"`
#
enabled_bus_drivers=''
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [au1500], [ENABLE_BUS_AU1500])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [avr32], [ENABLE_BUS_AVR32])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bcm1250], [ENABLE_BUS_BCM1250])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf526_ezkit], [ENABLE_BUS_BF526_EZKIT])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf527_ezkit], [ENABLE_BUS_BF527_EZKIT])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf533_stamp], [ENABLE_BUS_BF533_STAMP])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf533_ezkit], [ENABLE_BUS_BF533_EZKIT])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf537_stamp], [ENABLE_BUS_BF537_STAMP])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf537_ezkit], [ENABLE_BUS_BF537_EZKIT])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf538f_ezkit], [ENABLE_BUS_BF538F_EZKIT])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf548_ezkit], [ENABLE_BUS_BF548_EZKIT])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf561_ezkit], [ENABLE_BUS_BF561_EZKIT])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bscoach], [ENABLE_BUS_BSCOACH])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ejtag], [ENABLE_BUS_EJTAG])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ejtag_dma], [ENABLE_BUS_EJTAG_DMA])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [fjmem], [ENABLE_BUS_FJMEM])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ixp425], [ENABLE_BUS_IXP425])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [jopcyc], [ENABLE_BUS_JOPCYC])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [h7202], [ENABLE_BUS_H7202])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [lh7a400], [ENABLE_BUS_LH7A400])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [mpc5200], [ENABLE_BUS_MPC5200])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [mpc824x], [ENABLE_BUS_MPC824X])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ppc405ep], [ENABLE_BUS_PPC405EP])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ppc440gx_ebc8], [ENABLE_BUS_PPC440GX_EBC8])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [prototype], [ENABLE_BUS_PROTOTYPE])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [pxa2x0], [ENABLE_BUS_PXA2X0])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [pxa27x], [ENABLE_BUS_PXA27X])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [s3c4510], [ENABLE_BUS_S3C4510])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sa1110], [ENABLE_BUS_SA1110])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7727], [ENABLE_BUS_SH7727])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7750r], [ENABLE_BUS_SH7750R])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7751r], [ENABLE_BUS_SH7751R])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sharc_21065L], [ENABLE_BUS_SHARC_21065L])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [slsup3], [ENABLE_BUS_SLSUP3])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [tx4925], [ENABLE_BUS_TX4925])
CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [zefant_xs3], [ENABLE_BUS_ZEFANT_XS3])
# Enable cable drivers
AC_DEFUN([DEF_ENABLE_CABLEDRIVERS], [\
arcom byteblaster dlc5 ea253 ei012 ft2232 igloo jlink keithkoep lattice mpcbdm triton usbblaster wiggler xpc])
AC_DEFUN([DEF_DISABLE_CABLEDRIVERS], [ep9307 jim ts7800])
AC_ARG_ENABLE(cable,
[AS_HELP_STRING([--enable-cable], [Enable default set or specific cable drivers.])]
[AS_HELP_STRING([], ['default' enables:])]
[AS_HELP_STRING([],DEF_ENABLE_CABLEDRIVERS)]
[AS_HELP_STRING([], [Disabled by default are:])]
[AS_HELP_STRING([],DEF_DISABLE_CABLEDRIVERS)]
,
[AS_CASE([${enableval}],
[yes], [cabledrivers=default],
[no], [cabledrivers=none],
[none], [cabledrivers=none],
[cabledrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
[cabledrivers=default])
# expand 'default' to default enabled cabledrivers
cabledrivers=`echo ${cabledrivers} | $SED -e "s/default/DEF_ENABLE_CABLEDRIVERS/"`
# automatically disable cable drivers when a required feature is not available
AS_IF([test "x$HAVELIBFTDI" != "xyes" -a "x$HAVELIBFTD2XX" != "xyes"], [
cabledrivers=`echo ${cabledrivers} | $SED -e "s/ft2232//" -e "s/usbblaster//"`
])
AS_IF([test "x$HAVELIBUSB" != "xyes"], [
cabledrivers=`echo ${cabledrivers} | $SED -e "s/jlink//" -e "s/xpc//"`
])
#
enabled_cable_drivers=''
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [arcom], [ENABLE_CABLE_ARCOM])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [byteblaster], [ENABLE_CABLE_BYTEBLASTER])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [dlc5], [ENABLE_CABLE_DLC5])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ea253], [ENABLE_CABLE_EA253])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ei012], [ENABLE_CABLE_EI012])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ep9307], [ENABLE_CABLE_EP9307])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ft2232], [ENABLE_CABLE_FT2232])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [igloo], [ENABLE_CABLE_IGLOO])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [jim], [ENABLE_JIM])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [jlink], [ENABLE_CABLE_JLINK])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [keithkoep], [ENABLE_CABLE_KEITHKOEP])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [lattice], [ENABLE_CABLE_LATTICE])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [mpcbdm], [ENABLE_CABLE_MPCBDM])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [triton], [ENABLE_CABLE_TRITON])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [usbblaster], [ENABLE_CABLE_USBBLASTER])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [wiggler], [ENABLE_CABLE_WIGGLER])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [xpc], [ENABLE_CABLE_XPC])
CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ts7800], [ENABLE_CABLE_TS7800])
# Enable lowlevel drivers
AC_DEFUN([DEF_ENABLE_LOWLEVELDRIVERS], [\
direct ftdi ftd2xx ppdev ppi])
AC_ARG_ENABLE(lowlevel,
[AS_HELP_STRING([--enable-lowlevel], [Enable default set or specific lowlevel drivers:])]
[AS_HELP_STRING([], ['default' enables:])]
[AS_HELP_STRING([],DEF_ENABLE_LOWLEVELDRIVERS)]
,
[AS_CASE([${enableval}],
[yes], [lowleveldrivers=default],
[no], [lowleveldrivers=none],
[none], [lowleveldrivers=none],
[lowleveldrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
[lowleveldrivers=default])
# expand 'default' to default enabled lowlevel drivers
lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/default/DEF_ENABLE_LOWLEVELDRIVERS/"`
# automatically disable lowlevel drivers when a required feature is not available
AS_IF([test "x$HAVELIBFTDI" != "xyes"], [
lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ftdi//"`
])
AS_IF([test "x$HAVELIBFTD2XX" != "xyes"], [
lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ftd2xx//"`
])
AS_IF([test "x$HAVE_LINUX_PPDEV_H" != "xyes"], [
lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ppdev//"`
])
AS_IF([test "x$HAVE_DEV_PPBUS_PPI_H" != "xyes"], [
lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ppi//"`
])
AS_IF([test "x$HAVE_IOPERM" != "xyes" -a "x$HAVE_I386_SET_IOPERM" != "xyes" -a "x$HAVE_INPOUTXX" != "xyes" ], [
lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/direct//"`
])
#
enabled_lowlevel_drivers=''
CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [direct], [ENABLE_LOWLEVEL_DIRECT])
CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ftd2xx], [ENABLE_LOWLEVEL_FTD2XX])
CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ftdi], [ENABLE_LOWLEVEL_FTDI])
CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ppdev], [ENABLE_LOWLEVEL_PPDEV])
CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ppi], [ENABLE_LOWLEVEL_PPI])
dnl Enable a relocatable jtag?
AC_ARG_ENABLE(relocatable,
[AS_HELP_STRING([--enable-relocatable], [Enable relocatable paths])],
[relocatable=$enableval], [relocatable=no])
AS_IF([test "x$relocatable" = xyes], [
AM_CONDITIONAL(JTAG_RELOCATABLE, true)
AC_DEFINE(JTAG_RELOCATABLE, 1, [define for relocatable paths])
],[
AM_CONDITIONAL(JTAG_RELOCATABLE, false)
])
dnl Is fmax() provided by libm?
AC_CHECK_LIB([m], [fmax], [
AC_DEFINE(HAVE_FMAX, 1, [Define if -lm provides fmax()])
])
dnl Enable use of DMALLOC library?
AC_ARG_ENABLE(dmalloc,
[AS_HELP_STRING([--enable-dmalloc], [Enable heap debugging with dmalloc library])],
[dmalloc=$enableval], [dmalloc=no])
AS_IF([test "x$dmalloc" = xyes], [
AM_CONDITIONAL(DMALLOC, true)
AC_DEFINE(DMALLOC, 1, [define for dmalloc library])
],[
AM_CONDITIONAL(DMALLOC, false)
])
# Enable flash multi-byte write mode?
AC_ARG_ENABLE(flash-multi-byte,
[AS_HELP_STRING([--disable-flash-multi-byte], [Disable flash multi-byte write mode])],
[flash_multi_byte=$enableval], [flash_multi_byte=yes])
AS_IF([test "x$flash_multi_byte" = xyes], [
AC_DEFINE(FLASH_MULTI_BYTE, 1, [define for flash multi-byte write mode])
])
AC_OUTPUT
dnl
dnl Configuration summary
dnl
AS_IF([test ${HAVELIBFTDI:-no} != no], [
FLAG_HAVELIBFTDI=yes
], [
FLAG_HAVELIBFTDI=no
])
AS_IF([test ${HAVELIBUSB:-no} != no], [
FLAG_HAVELIBUSB=yes
], [
FLAG_HAVELIBUSB=no
])
AS_IF([test ${HAVELIBFTD2XX:-no} != no], [
FLAG_HAVELIBFTD2XX=yes
], [
FLAG_HAVELIBFTD2XX=no
])
AS_IF([test ${HAVEINPOUTXX:-no} != no], [
FLAG_HAVEINPOUTXX=yes
], [
FLAG_HAVEINPOUTXX=no
])
AS_IF([test ${svf:-false} != false], [
FLAG_SVF=yes
], [
FLAG_SVF=no
])
AS_IF([test ${bsdl:-false} != false], [
FLAG_BSDL=yes
], [
FLAG_BSDL=no
])
AC_MSG_NOTICE([
jtag is now configured for
Detected libusb : $FLAG_HAVELIBUSB
Detected libftdi : $FLAG_HAVELIBFTDI
Detected libftd2xx : $FLAG_HAVELIBFTD2XX
Detected inpout32 : $FLAG_HAVEINPOUTXX
Build SVF player : $FLAG_SVF
Build BSDL subsystem : $FLAG_BSDL
Bus drivers : $enabled_bus_drivers
Cable drivers : $enabled_cable_drivers
Lowlevel drivers : $enabled_lowlevel_drivers
])

@ -0,0 +1,2 @@
Makefile
Makefile.in

@ -0,0 +1,51 @@
#
# $Id$
#
# Manufacturer ID database
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002.
#
# Documentation:
# [1] JEDEC Solid State Technology Association, "Standard Manufacturer's
# Identification Code", September 2001, Order Number: JEP106-K
#
# bits 11-1 of the Device Identification Register
00000000110 lexra Lexr
00000000111 hitachi Hitachi
00000001001 intel Intel
00000001110 freescale Freescale (Motorola)
00000010101 philips Philips Semi. (Signetics)
00000010111 ti Texas Instruments
00000011000 toshiba Toshiba
00000011111 atmel Atmel
00000100001 lattice Lattice Semiconductors
00000100100 ibm IBM Semiconductors
00000110100 cypress Cypress
00000110101 dec DEC
00001001001 xilinx Xilinx
00001100101 analog Analog Devices
00001101110 altera Altera
00010101011 lattice Lattice Semiconductors
00010111111 broadcom Broadcom
00101010000 broadcom Broadcom # or "Sibyte, Incorporated" ?
00101110000 brecis Brecis (PMC-Sierra)
00111101001 marvell Marvell
00110101011 marvell Marvell
11110000111 arm ARM

@ -0,0 +1,268 @@
#
# $Id$
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002.
#
include $(top_srcdir)/Makefile.rules
nobase_dist_pkgdata_DATA = \
MANUFACTURERS \
admtek/adm5120/adm5120 \
altera/PARTS \
altera/ep1c20f400/STEPPINGS \
altera/ep1c20f400/ep1c20f400 \
altera/ep1c6q240/STEPPINGS \
altera/ep1c6q240/ep1c6q240 \
altera/epm7128aetc100/STEPPINGS \
altera/epm7128aetc100/epm7128aetc100 \
altera/ep1c12/STEPPINGS \
altera/ep1c12/ep1c12 \
altera/ep1c12/f256 \
altera/ep1c12/f324 \
altera/ep1c12/q240 \
altera/ep2c8/STEPPINGS \
altera/ep2c8/ep2c8 \
altera/ep2c8/f256 \
altera/ep2c8/q208 \
altera/ep2c8/t144 \
altera/epm3064a/STEPPINGS \
altera/epm3064a/epm3064a \
altera/epm3064a/l44 \
altera/epm3064a/t100 \
altera/epm3064a/t44 \
atheros/ar2312/ar2312 \
atmel/PARTS \
atmel/at32ap7000/STEPPINGS \
atmel/at32ap7000/at32ap7000 \
atmel/atmega128/STEPPINGS \
atmel/atmega128/atmega128 \
atmel/at91sam7s256/STEPPINGS \
atmel/at91sam7s256/at91sam7s_tq64v0 \
atmel/at91sam7s256/at91sam7s_tq48v0 \
atmel/atf15xx/STEPPINGS \
atmel/atf15xx/atf1504asv \
analog/PARTS \
analog/bf518/STEPPINGS \
analog/bf518/bf518 \
analog/bf527/STEPPINGS \
analog/bf527/bf527 \
analog/bf533/STEPPINGS \
analog/bf533/bf533 \
analog/bf537/STEPPINGS \
analog/bf537/bf537 \
analog/bf538/STEPPINGS \
analog/bf538/bf538 \
analog/bf548/STEPPINGS \
analog/bf548/bf548 \
analog/bf561/STEPPINGS \
analog/bf561/bf561 \
analog/PARTS \
analog/sharc21065l/STEPPINGS \
analog/sharc21065l/sharc21065l \
brecis/PARTS \
brecis/msp2006/STEPPINGS \
brecis/msp2006/msp2006 \
broadcom/PARTS \
broadcom/bcm1250/STEPPINGS \
broadcom/bcm1250/bcm1250 \
broadcom/bcm3310/STEPPINGS \
broadcom/bcm3310/bcm3310 \
broadcom/bcm4712/STEPPINGS \
broadcom/bcm4712/bcm4712 \
broadcom/bcm5421s/STEPPINGS \
broadcom/bcm5421s/bcm5421s \
broadcom/bcm6358/STEPPINGS \
broadcom/bcm6358/bcm6358 \
bsdl/STD_1149_1_1990 \
bsdl/STD_1149_1_1994 \
bsdl/STD_1149_1_2001 \
bsdl/STD_1532_2001 \
bsdl/STD_1532_2002 \
dec/PARTS \
dec/sa1100/STEPPINGS \
dec/sa1100/sa1100 \
hitachi/PARTS \
hitachi/ar7300/STEPPINGS \
hitachi/ar7300/ar7300 \
hitachi/hd64465/hd64465 \
hitachi/sh7727/STEPPINGS \
hitachi/sh7727/sh7727 \
hitachi/sh7729/STEPPINGS \
hitachi/sh7729/sh7729 \
freescale/PARTS \
freescale/mpc5200/STEPPINGS \
freescale/mpc5200/mpc5200 \
ibm/PARTS \
ibm/ppc440gx/STEPPINGS \
ibm/ppc440gx/ppc440gx \
ibm/ppc405ep/STEPPINGS \
ibm/ppc405ep/ppc405ep \
intel/PARTS \
intel/pxa250/STEPPINGS \
intel/pxa250/pxa250 \
intel/pxa250/pxa250c0 \
intel/pxa270/STEPPINGS \
intel/pxa270/pxa270 \
intel/sa1110/STEPPINGS \
intel/sa1110/sa1110 \
intel/ixp425/STEPPINGS \
intel/ixp425/ixp425 \
lattice/PARTS \
lattice/lc4032v-tqfp48/STEPPINGS \
lattice/lc4032v-tqfp48/lc4032v-tqfp48 \
lattice/lc4064zc/STEPPINGS \
lattice/lc4064zc/lc4064zc \
lattice/lc4128c-tqfp100/STEPPINGS \
lattice/lc4128c-tqfp100/lc4128c-tqfp100 \
lattice/lfec2-12e/STEPPINGS \
lattice/lfec2-12e/lfec2-12e \
lattice/m4a3-256.192-fpbga256/STEPPINGS \
lattice/m4a3-256.192-fpbga256/m4a3-256.192-fpbga256 \
lattice/m4a3-64.32-tqfp48/STEPPINGS \
lattice/m4a3-64.32-tqfp48/m4a3-64.32-tqfp48 \
lexra/PARTS \
lexra/lx5280/STEPPINGS \
lexra/lx5280/lx5280 \
marvell/PARTS \
marvell/88e1118/STEPPINGS \
marvell/88e1118/88e1118 \
marvell/88f5182/STEPPINGS \
marvell/88f5182/88f5182-a2 \
motorola/mpc8241/1.2 \
motorola/mpc8245/1.2 \
philips/PARTS \
philips/xcr3128xl-cs144/STEPPINGS \
philips/xcr3128xl-cs144/xcr3128xl-cs144 \
philips/xcr3128xl-vq100/STEPPINGS \
philips/xcr3128xl-vq100/xcr3128xl-vq100 \
samsung/s3c4510b/s3c4510b \
sharp/PARTS \
sharp/lh7a400/STEPPINGS \
sharp/lh7a400/lh7a400 \
sigma/PARTS \
sigma/smp8634/STEPPINGS \
sigma/smp8634/smp8634 \
ti/PARTS \
ti/tnetv1060/STEPPINGS \
ti/tnetv1060/tnetv1060 \
ti/tnetv1061/STEPPINGS \
ti/tnetv1061/tnetv1061 \
toshiba/PARTS \
toshiba/tx4925/STEPPINGS \
toshiba/tx4925/tx4925 \
toshiba/tx4926/STEPPINGS \
toshiba/tx4926/tx4926 \
xilinx/PARTS \
xilinx/xc18v04pc44/xc18v04pc44 \
xilinx/xc18v04pc44/STEPPINGS \
xilinx/xc2c256-tq144/STEPPINGS \
xilinx/xc2c256-tq144/xc2c256-tq144 \
xilinx/xc2c256-vq100/STEPPINGS \
xilinx/xc2c256-vq100/xc2c256-vq100 \
xilinx/xc2c64a-vq44/STEPPINGS \
xilinx/xc2c64a-vq44/xc2c64a-vq44 \
xilinx/xc2s200e-pq208/STEPPINGS \
xilinx/xc2s200e-pq208/xc2s200e-pq208 \
xilinx/xc2s300e/STEPPINGS \
xilinx/xc2s300e/xc2s300e \
xilinx/xc2v80-fg256/STEPPINGS \
xilinx/xc2v80-fg256/xc2v80-fg256 \
xilinx/xc2v250-fg256/STEPPINGS \
xilinx/xc2v250-fg256/xc2v250-fg256 \
xilinx/xc2v1000-fg256/STEPPINGS \
xilinx/xc2v1000-fg256/xc2v1000-fg256 \
xilinx/xc2s300e/pq208 \
xilinx/xc2s300e/ft256 \
xilinx/xc2s300e/fg456 \
xilinx/xc3s1000/fg676 \
xilinx/xc3s1000/xc3s1000 \
xilinx/xc3s1000/fg320 \
xilinx/xc3s1000/ft256 \
xilinx/xc3s1000/STEPPINGS \
xilinx/xc3s1000/fg456 \
xilinx/xc3s100e_die/xc3s100e_pq208 \
xilinx/xc3s100e_die/xc3s100e_tq144 \
xilinx/xc3s100e_die/xc3s100e_die \
xilinx/xc3s100e_die/STEPPINGS \
xilinx/xc3s100e_die/xc3s100e_vq100 \
xilinx/xc3s1500/xc3s1500_fg456 \
xilinx/xc3s1500/xc3s1500l_fg676 \
xilinx/xc3s1500/xc3s1500l \
xilinx/xc3s1500/xc3s1500l_fg320 \
xilinx/xc3s1500/xc3s1500_fg676 \
xilinx/xc3s1500/xc3s1500 \
xilinx/xc3s1500/xc3s1500_fg320 \
xilinx/xc3s1500/STEPPINGS \
xilinx/xc3s1500/xc3s1500l_fg456 \
xilinx/xc3s200/xc3s200_tq144 \
xilinx/xc3s200/xc3s200 \
xilinx/xc3s200/xc3s200_ft256 \
xilinx/xc3s200/xc3s200_vq100 \
xilinx/xc3s200/STEPPINGS \
xilinx/xc3s200/xc3s200_pq208 \
xilinx/xc3s2000/xc3s2000_fg676 \
xilinx/xc3s2000/xc3s2000 \
xilinx/xc3s2000/xc3s2000l_fg900 \
xilinx/xc3s2000/xc3s2000_fg900 \
xilinx/xc3s2000/STEPPINGS \
xilinx/xc3s2000/xc3s2000_fg456 \
xilinx/xc3s2000/xc3s2000l_fg676 \
xilinx/xc3s2000/xc3s2000l \
xilinx/xc3s400/xc3s400_fg456 \
xilinx/xc3s400/xc3s400_tq144 \
xilinx/xc3s400/xc3s400 \
xilinx/xc3s400/xc3s400_fg320 \
xilinx/xc3s400/xc3s400_ft256 \
xilinx/xc3s400/STEPPINGS \
xilinx/xc3s400/xc3s400_pq208 \
xilinx/xc3s4000/xc3s4000l \
xilinx/xc3s4000/xc3s4000_fg676 \
xilinx/xc3s4000/xc3s4000 \
xilinx/xc3s4000/xc3s4000l_fg900 \
xilinx/xc3s4000/xc3s4000_fg900 \
xilinx/xc3s4000/xc3s4000l_fg1156 \
xilinx/xc3s4000/STEPPINGS \
xilinx/xc3s4000/xc3s4000_fg1156 \
xilinx/xc3s50/xc3s50_pq208 \
xilinx/xc3s50/xc3s50_tq144 \
xilinx/xc3s50/xc3s50 \
xilinx/xc3s50/STEPPINGS \
xilinx/xc3s50/xc3s50_vq100 \
xilinx/xc3s50/xc3s50_cp132 \
xilinx/xc3s5000/xc3s5000 \
xilinx/xc3s5000/xc3s5000_fg900 \
xilinx/xc3s5000/STEPPINGS \
xilinx/xc3s5000/xc3s5000_fg1156 \
xilinx/xc3s500e_fg320/xc3s500e_ft256 \
xilinx/xc3s500e_fg320/xc3s500e_pq208 \
xilinx/xc3s500e_fg320/xc3s500e_fg320 \
xilinx/xc3s500e_fg320/STEPPINGS \
xilinx/xc9572xl_vq44/xc9572xl_vq44 \
xilinx/xc9572xl_vq44/STEPPINGS \
xilinx/xcf04s/xcf04s \
xilinx/xcf04s/STEPPINGS \
xilinx/xcr3032xl-vq44/STEPPINGS \
xilinx/xcr3032xl-vq44/xcr3032xl-vq44 \
xilinx/xcr3128xl-cs144/STEPPINGS \
xilinx/xcr3128xl-cs144/xcr3128xl-cs144 \
xilinx/xcr3128xl-vq100/xcr3128xl-vq100 \
xilinx/xcr3256xl-ft256/STEPPINGS \
xilinx/xcr3256xl-ft256/xcr3256xl-ft256

@ -0,0 +1,50 @@
#
# $Id$
#
# JTAG declarations for ADMtek/Infineon ADM5120
# Copyright (C) 2005 Marek Michalkiewicz
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
#
register BR 1
register BSR 1
register DIR 32
register EJIMPCODE 32
register EJADDRESS 32
register EJDATA 32
register EJCONTROL 32
register EJALL 96
register EJFASTDATA 33
instruction length 5
instruction BYPASS 11111 BR
instruction SAMPLE/PRELOAD 00010 BSR
instruction IDCODE 00001 DIR
instruction EJTAG_IMPCODE 00011 EJIMPCODE
instruction EJTAG_ADDRESS 01000 EJADDRESS
instruction EJTAG_DATA 01001 EJDATA
instruction EJTAG_CONTROL 01010 EJCONTROL
instruction EJTAG_ALL 01011 EJALL
instruction EJTAGBOOT 01100 BR
instruction NORMALBOOT 01101 BR
instruction EJTAG_FASTDATA 01110 EJFASTDATA
initbus ejtag
endian little

@ -0,0 +1,28 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
#
# bits 27-12 of the Device Identification Register
0010000010000010 ep1c6q240 EP1C6Q240
0010000010000011 ep1c12 EP1C12
0010000010000100 ep1c20f400 EP1C20F400
0111000100101000 epm7128aetc100 EPM7128AETC100
0111000001100100 epm3064a EPM3064A
0010000010110010 ep2c8 EP2C8

@ -0,0 +1,23 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
# bits 31-28 of the Device Identification Register
0000 ep1c12 0

File diff suppressed because it is too large Load Diff

@ -0,0 +1,204 @@
#
# $Id$
#
# JTAG package script for EP1C12F256
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
salias IOB2 BSC0
salias IOA2 BSC1
salias IOB3 BSC2
salias IOC4 BSC3
salias IOB4 BSC4
salias IOA4 BSC5
salias IOB5 BSC6
salias IOC5 BSC7
salias IOE5 BSC8
salias IOE6 BSC9
salias IOD5 BSC10
salias IOD6 BSC11
salias IOC6 BSC12
salias IOB6 BSC13
salias IOE7 BSC14
salias IOA6 BSC16
salias IOB7 BSC17
salias IOC7 BSC18
salias IOD7 BSC19
salias IOB8 BSC20
salias IOA8 BSC21
salias IOE8 BSC22
salias IOD8 BSC26
salias IOC8 BSC27
salias IOE10 BSC30
salias IOC9 BSC33
salias IOD9 BSC34
salias IOB9 BSC36
salias IOA9 BSC37
salias IOD10 BSC38
salias IOC10 BSC39
salias IOB10 BSC40
salias IOA11 BSC41
salias IOB11 BSC42
salias IOC11 BSC43
salias IOD11 BSC48
salias IOD12 BSC49
salias IOE9 BSC50
salias IOE11 BSC51
salias IOE12 BSC52
salias IOC12 BSC53
salias IOB12 BSC54
salias IOA13 BSC55
salias IOB13 BSC56
salias IOC13 BSC57
salias IOB14 BSC58
salias IOA15 BSC59
salias IOB15 BSC60
salias IOD13 BSC61
salias IOC14 BSC62
salias IOC15 BSC63
salias IOB16 BSC64
salias IOG12 BSC65
salias IOH13 BSC66
salias IOD14 BSC67
salias IOE13 BSC68
salias IOF12 BSC69
salias IOE14 BSC70
salias IOD15 BSC71
salias IOD16 BSC72
salias IOE15 BSC73
salias IOE16 BSC74
salias IOF15 BSC75
salias IOF13 BSC76
salias IOF14 BSC77
salias IOF16 BSC78
salias IOG15 BSC79
salias IOG13 BSC80
salias IOG14 BSC81
salias IOH12 BSC91
salias IOJ16 BSC96
salias IOK15 BSC97
salias IOK16 BSC108
salias IOL16 BSC109
salias IOL15 BSC110
salias IOL14 BSC111
salias IOM16 BSC112
salias IOM15 BSC113
salias IOL13 BSC114
salias IOM14 BSC115
salias IOM13 BSC116
salias ION14 BSC117
salias IOL12 BSC118
salias IOK14 BSC119
salias IOK12 BSC120
salias ION16 BSC121
salias ION15 BSC122
salias IOR16 BSC123
salias IOP15 BSC124
salias IOP14 BSC125
salias ION13 BSC126
salias IOR15 BSC127
salias IOT15 BSC128
salias IOP13 BSC129
salias IOR14 BSC130
salias IOR13 BSC131
salias IOT13 BSC132
salias IOR12 BSC133
salias IOP12 BSC134
salias IOM12 BSC135
salias IOM11 BSC136
salias IOM9 BSC137
salias ION12 BSC138
salias ION11 BSC139
salias IOP11 BSC144
salias IOR11 BSC145
salias IOP10 BSC146
salias ION10 BSC147
salias IOT11 BSC148
salias IOR10 BSC149
salias ION9 BSC150
salias IOP9 BSC151
salias IOT9 BSC153
salias IOR9 BSC154
salias IOM10 BSC157
salias IOP8 BSC160
salias ION8 BSC161
salias IOM8 BSC165
salias IOT8 BSC166
salias IOR8 BSC167
salias ION7 BSC168
salias IOP7 BSC169
salias IOR7 BSC170
salias IOT6 BSC171
salias IOM7 BSC173
salias IOR6 BSC174
salias IOP6 BSC175
salias ION6 BSC176
salias ION5 BSC177
salias IOM6 BSC178
salias IOM5 BSC179
salias IOP5 BSC180
salias IOR5 BSC181
salias IOT4 BSC182
salias IOR4 BSC183
salias IOP4 BSC184
salias IOR3 BSC185
salias IOT2 BSC186
salias IOR2 BSC187
salias ION4 BSC188
salias IOP3 BSC189
salias IOP2 BSC190
salias IOR1 BSC191
salias IOL4 BSC192
salias IOK5 BSC193
salias ION3 BSC194
salias IOM4 BSC195
salias IOL5 BSC196
salias IOM3 BSC197
salias ION2 BSC198
salias IOM2 BSC199
salias ION1 BSC200
salias IOM1 BSC201
salias IOL2 BSC202
salias IOL1 BSC203
salias IOK1 BSC204
salias IOL3 BSC205
salias IOK2 BSC216
salias IOJ1 BSC217
salias IOK3 BSC218
salias IOG4 BSC228
salias IOH5 BSC229
salias IOF1 BSC239
salias IOG2 BSC240
salias IOE1 BSC241
salias IOF2 BSC242
salias IOG3 BSC243
salias IOF3 BSC244
salias IOD1 BSC245
salias IOE2 BSC246
salias IOD2 BSC247
salias IOE3 BSC248
salias IOF5 BSC249
salias IOE4 BSC250
salias IOD3 BSC251
salias IOF4 BSC252
salias IOG5 BSC253
salias IOB1 BSC254
salias IOC2 BSC255
salias IOC3 BSC256
salias IOD4 BSC257

@ -0,0 +1,268 @@
#
# $Id$
#
# JTAG package script for EP1C12F324
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
salias IOC4 BSC0
salias IOB3 BSC1
salias IOG8 BSC2
salias IOF8 BSC3
salias IOB4 BSC4
salias IOA4 BSC5
salias IOD5 BSC6
salias IOC5 BSC7
salias IOB5 BSC8
salias IOA6 BSC9
salias IOC6 BSC10
salias IOB6 BSC11
salias IOD6 BSC12
salias IOE6 BSC13
salias IOC7 BSC14
salias IOD7 BSC15
salias IOB7 BSC16
salias IOA7 BSC17
salias IOE7 BSC18
salias IOE8 BSC19
salias IOB8 BSC20
salias IOA8 BSC21
salias IOC8 BSC22
salias IOD8 BSC23
salias IOB9 BSC24
salias IOA9 BSC25
salias IOC9 BSC26
salias IOD9 BSC27
salias IOF9 BSC28
salias IOG9 BSC29
salias IOE10 BSC30
salias IOA10 BSC31
salias IOB10 BSC32
salias IOD10 BSC33
salias IOC10 BSC34
salias IOE11 BSC35
salias IOA11 BSC36
salias IOB11 BSC37
salias IOD11 BSC38
salias IOC11 BSC39
salias IOA12 BSC40
salias IOB12 BSC41
salias IOC12 BSC42
salias IOD12 BSC43
salias IOC13 BSC44
salias IOD13 BSC45
salias IOA13 BSC46
salias IOB13 BSC47
salias IOF10 BSC48
salias IOG10 BSC49
salias IOE13 BSC50
salias IOC14 BSC51
salias IOB14 BSC52
salias IOD14 BSC53
salias IOC15 BSC54
salias IOA15 BSC55
salias IOB15 BSC56
salias IOF11 BSC57
salias IOG11 BSC58
salias IOB16 BSC59
salias IOC16 BSC60
salias IOD17 BSC61
salias IOC17 BSC62
salias IOD15 BSC63
salias IOD16 BSC64
salias IOE14 BSC65
salias IOD18 BSC66
salias IOE15 BSC67
salias IOE16 BSC68
salias IOE17 BSC69
salias IOF15 BSC70
salias IOF16 BSC71
salias IOF14 BSC72
salias IOF13 BSC73
salias IOF17 BSC74
salias IOF18 BSC75
salias IOF12 BSC76
salias IOG12 BSC77
salias IOG16 BSC78
salias IOG15 BSC79
salias IOG14 BSC80
salias IOG13 BSC81
salias IOG17 BSC82
salias IOG18 BSC83
salias IOH18 BSC84
salias IOH17 BSC85
salias IOH16 BSC86
salias IOH15 BSC87
salias IOH14 BSC88
salias IOH13 BSC89
salias IOJ13 BSC90
salias IOJ14 BSC91
salias IOK15 BSC96
salias IOK16 BSC97
salias IOL14 BSC98
salias IOL15 BSC99
salias IOL16 BSC100
salias IOL13 BSC101
salias IOM13 BSC102
salias IOL17 BSC103
salias IOL18 BSC104
salias IOM16 BSC105
salias IOM15 BSC106
salias IOM14 BSC107
salias IOM17 BSC108
salias IOM18 BSC109
salias ION15 BSC110
salias ION16 BSC111
salias ION12 BSC112
salias ION13 BSC113
salias ION17 BSC114
salias ION18 BSC115
salias ION14 BSC116
salias IOP14 BSC117
salias IOP15 BSC118
salias IOP17 BSC119
salias IOP16 BSC120
salias IOR16 BSC121
salias IOR15 BSC122
salias IOR18 BSC123
salias IOR17 BSC124
salias IOT17 BSC125
salias IOT16 BSC126
salias IOT15 BSC127
salias IOU16 BSC128
salias IOM11 BSC129
salias ION11 BSC130
salias IOU15 BSC131
salias IOV15 BSC132
salias IOR14 BSC133
salias IOT14 BSC134
salias IOU14 BSC135
salias IOP13 BSC136
salias IOP12 BSC137
salias IOM10 BSC138
salias ION10 BSC139
salias IOR13 BSC140
salias IOT13 BSC141
salias IOU13 BSC142
salias IOV13 BSC143
salias IOR12 BSC144
salias IOT12 BSC145
salias IOU12 BSC146
salias IOV12 BSC147
salias IOV11 BSC148
salias IOU11 BSC149
salias IOT11 BSC150
salias IOR11 BSC151
salias IOP10 BSC152
salias IOR10 BSC153
salias IOT10 BSC154
salias IOV10 BSC155
salias IOU10 BSC156
salias IOP9 BSC157
salias ION9 BSC158
salias IOM9 BSC159
salias IOT9 BSC160
salias IOR9 BSC161
salias IOV9 BSC162
salias IOU9 BSC163
salias IOR8 BSC164
salias IOT8 BSC165
salias IOV8 BSC166
salias IOU8 BSC167
salias IOR7 BSC168
salias IOT7 BSC169
salias IOV7 BSC170
salias IOU7 BSC171
salias IOR6 BSC172
salias IOT6 BSC173
salias IOP7 BSC174
salias IOP6 BSC175
salias IOU6 BSC176
salias IOV6 BSC177
salias IOR5 BSC178
salias IOR4 BSC179
salias IOU5 BSC180
salias IOT5 BSC181
salias IOU4 BSC182
salias IOT4 BSC183
salias ION8 BSC184
salias IOM8 BSC185
salias IOV4 BSC186
salias IOU3 BSC187
salias IOT3 BSC188
salias IOT2 BSC189
salias IOR3 BSC190
salias IOR2 BSC191
salias IOP4 BSC192
salias IOR1 BSC193
salias IOP3 BSC194
salias IOP2 BSC195
salias IOP5 BSC196
salias ION4 BSC197
salias ION3 BSC198
salias ION6 BSC199
salias ION5 BSC200
salias ION7 BSC201
salias IOM6 BSC202
salias ION2 BSC203
salias ION1 BSC204
salias IOM4 BSC205
salias IOM5 BSC206
salias IOM2 BSC207
salias IOM3 BSC208
salias IOM1 BSC209
salias IOL4 BSC210
salias IOL5 BSC211
salias IOL3 BSC212
salias IOL2 BSC213
salias IOL6 BSC214
salias IOL7 BSC215
salias IOK5 BSC216
salias IOK4 BSC217
salias IOK6 BSC218
salias IOJ1 BSC228
salias IOH6 BSC229
salias IOH5 BSC230
salias IOH4 BSC231
salias IOH3 BSC232
salias IOH2 BSC233
salias IOH1 BSC234
salias IOG6 BSC235
salias IOG5 BSC236
salias IOG4 BSC237
salias IOG3 BSC238
salias IOF7 BSC239
salias IOF6 BSC240
salias IOG2 BSC241
salias IOG1 BSC242
salias IOF5 BSC243
salias IOF4 BSC244
salias IOF3 BSC245
salias IOF2 BSC246
salias IOE5 BSC247
salias IOE4 BSC248
salias IOF1 BSC249
salias IOE2 BSC250
salias IOE3 BSC251
salias IOD1 BSC252
salias IOD4 BSC253
salias IOD2 BSC254
salias IOD3 BSC255
salias IOC2 BSC256
salias IOC3 BSC257

@ -0,0 +1,192 @@
#
# $Id$
#
# JTAG package script for EP1C12Q240
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
salias IO240 BSC0
salias IO239 BSC1
salias IO238 BSC2
salias IO237 BSC3
salias IO236 BSC4
salias IO235 BSC5
salias IO234 BSC6
salias IO233 BSC7
salias IO228 BSC8
salias IO227 BSC9
salias IO226 BSC10
salias IO225 BSC11
salias IO224 BSC12
salias IO223 BSC13
salias IO222 BSC14
salias IO219 BSC16
salias IO218 BSC17
salias IO217 BSC18
salias IO216 BSC19
salias IO215 BSC20
salias IO214 BSC21
salias IO213 BSC22
salias IO208 BSC30
salias IO207 BSC33
salias IO206 BSC34
salias IO203 BSC36
salias IO202 BSC37
salias IO201 BSC38
salias IO200 BSC39
salias IO197 BSC48
salias IO196 BSC49
salias IO195 BSC50
salias IO194 BSC51
salias IO193 BSC52
salias IO188 BSC53
salias IO187 BSC54
salias IO186 BSC55
salias IO185 BSC56
salias IO184 BSC57
salias IO183 BSC58
salias IO182 BSC59
salias IO181 BSC60
salias IO180 BSC61
salias IO179 BSC62
salias IO178 BSC63
salias IO177 BSC64
salias IO176 BSC65
salias IO175 BSC66
salias IO174 BSC67
salias IO173 BSC68
salias IO170 BSC69
salias IO169 BSC70
salias IO168 BSC71
salias IO167 BSC72
salias IO166 BSC73
salias IO165 BSC74
salias IO164 BSC75
salias IO163 BSC76
salias IO162 BSC77
salias IO161 BSC78
salias IO160 BSC79
salias IO159 BSC80
salias IO158 BSC81
salias IO156 BSC91
salias IO144 BSC96
salias IO143 BSC97
salias IO141 BSC108
salias IO140 BSC109
salias IO139 BSC110
salias IO138 BSC111
salias IO137 BSC112
salias IO136 BSC113
salias IO135 BSC114
salias IO134 BSC115
salias IO133 BSC116
salias IO132 BSC117
salias IO131 BSC118
salias IO128 BSC119
salias IO127 BSC120
salias IO126 BSC121
salias IO125 BSC122
salias IO124 BSC123
salias IO123 BSC124
salias IO122 BSC125
salias IO121 BSC126
salias IO120 BSC127
salias IO119 BSC128
salias IO118 BSC129
salias IO117 BSC130
salias IO116 BSC131
salias IO115 BSC132
salias IO114 BSC133
salias IO113 BSC134
salias IO108 BSC135
salias IO107 BSC136
salias IO106 BSC137
salias IO105 BSC138
salias IO104 BSC139
salias IO101 BSC148
salias IO100 BSC149
salias IO99 BSC150
salias IO98 BSC151
salias IO95 BSC153
salias IO94 BSC154
salias IO93 BSC157
salias IO88 BSC165
salias IO87 BSC166
salias IO86 BSC167
salias IO85 BSC168
salias IO84 BSC169
salias IO83 BSC170
salias IO82 BSC171
salias IO79 BSC173
salias IO78 BSC174
salias IO77 BSC175
salias IO76 BSC176
salias IO75 BSC177
salias IO74 BSC178
salias IO73 BSC179
salias IO68 BSC180
salias IO67 BSC181
salias IO66 BSC182
salias IO65 BSC183
salias IO64 BSC184
salias IO63 BSC185
salias IO62 BSC186
salias IO61 BSC187
salias IO60 BSC188
salias IO59 BSC189
salias IO58 BSC190
salias IO57 BSC191
salias IO56 BSC192
salias IO55 BSC193
salias IO54 BSC194
salias IO53 BSC195
salias IO50 BSC196
salias IO49 BSC197
salias IO48 BSC198
salias IO47 BSC199
salias IO46 BSC200
salias IO45 BSC201
salias IO44 BSC202
salias IO43 BSC203
salias IO42 BSC204
salias IO41 BSC205
salias IO39 BSC216
salias IO38 BSC217
salias IO37 BSC218
salias IO24 BSC228
salias IO23 BSC229
salias IO21 BSC239
salias IO20 BSC240
salias IO19 BSC241
salias IO18 BSC242
salias IO17 BSC243
salias IO16 BSC244
salias IO15 BSC245
salias IO14 BSC246
salias IO13 BSC247
salias IO12 BSC248
salias IO11 BSC249
salias IO8 BSC250
salias IO7 BSC251
salias IO6 BSC252
salias IO5 BSC253
salias IO4 BSC254
salias IO3 BSC255
salias IO2 BSC256
salias IO1 BSC257

@ -0,0 +1,23 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
#
# bits 31-28 of the Device Identification Register
0000 ep1c20f400 0

File diff suppressed because it is too large Load Diff

@ -0,0 +1,23 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Kent Palmkvist <kentp@isy.liu.se>
#
# bits 31-28 of the Device Identification Register
0000 ep1c6q240 0

@ -0,0 +1,818 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Kent Palmkvist <kentp@isy.liu.se>
#
# JTAG declarations for EP1C6Q240 idcode 00000010000010000010000011011101
# generated on Thu Jun 30 23:25:36 2005 by /home/tde/kentp/bsdl2jtag_kp.pl 0.1 from /home/tde/kentp/ep1c6q240_kp.bsd
signal IO13
signal IO93
signal IO113
signal IO203
signal IO174
signal IO41
signal IO38
signal IO127
signal IO73
signal IO64
signal TMS
signal IO83
signal IO7
signal IO85
signal IO107
signal IO118
signal IO2
signal IO234
signal IO239
signal IO135
signal IO218
signal IO98
signal IO167
signal IO137
signal IO236
signal IO14
signal MSEL0
signal IO221
signal IO58
signal IO184
signal IO49
signal IO18
signal IO97
signal TCK
signal IO143
signal IO186
signal CLK2
signal IO81
signal IO63
signal IO177
signal IO123
signal IO100
signal IO144
signal IO162
signal IO185
signal IO20
signal IO198
signal IO74
signal IO104
signal IO21
signal DCLK
signal IO217
signal IO68
signal IO164
signal IO139
signal IO45
signal IO228
signal IO238
signal IO114
signal IO188
signal IO205
signal IO116
signal IO102
signal GND
signal IO222
signal IO176
signal IO56
signal IO179
signal IO165
signal IO240
signal IO1
signal IO76
signal IO182
signal IO53
signal IO200
signal DATA0
signal IO161
signal IO24
signal IO78
signal IO94
signal IO43
signal IO4
signal IO195
signal IO16
signal CLK0
signal IO214
signal IO121
signal VCC
signal IO47
signal IO61
signal IO160
signal IO11
signal IO82
signal IO187
signal IO65
signal IO180
signal IO213
signal IO15
signal IO88
signal IO220
signal IO156
signal IO226
signal IO158
signal TDO
signal IO126
signal IO215
signal IO134
signal IO206
signal IO23
signal IO122
signal IO169
signal IO99
signal IO54
signal IO119
signal IO80
signal IO95
signal IO128
signal IO17
signal IO106
signal IO59
signal IO202
signal IO67
signal IO124
signal IO168
signal IO132
signal IO108
signal IO235
signal IO12
signal NCONFIG
signal NCE
signal IO224
signal IO233
signal IO199
signal IO183
signal NCEO
signal IO48
signal IO19
signal IO131
signal IO136
signal IO39
signal IO96
signal MSEL1
signal IO6
signal IO178
signal IO101
signal IO87
signal IO175
signal IO138
signal TDI
signal IO196
signal IO193
signal IO159
signal IO237
signal IO125
signal IO105
signal IO86
signal IO117
signal IO163
signal CLK3
signal IO140
signal IO194
signal IO5
signal IO75
signal IO50
signal IO84
signal IO181
signal IO225
signal IO170
signal NSTATUS
signal IO141
signal IO207
signal IO103
signal IO120
signal IO8
signal IO166
signal IO208
signal CONF_DONE
signal IO216
signal IO79
signal IO66
signal IO57
signal IO62
signal IO77
signal IO133
signal IO223
signal IO3
signal IO55
signal IO173
signal IO219
signal IO227
signal IO60
signal IO46
signal IO44
signal IO197
signal IO204
signal CLK1
signal IO42
signal IO115
signal IO37
signal IO201
register BYPASS 1
register BSR 582
register IOCSR 3366
register DEVICE_ID 32
instruction length 10
instruction BYPASS 1111111111 BYPASS
instruction IDCODE 0000000110 DEVICE_ID
# instruction USERCODE 0000000111 <unspecified>
instruction SAMPLE/PRELOAD 0000000101 BSR
instruction EXTEST 0000000000 BSR
# instruction CLAMP 0000001010 <unspecified>
# instruction HIGHZ 0000001011 <unspecified>
instruction CONFIG_IO 0000001101 IOCSR
bit 0 I ? IO240
bit 1 C 1 *
bit 2 O ? IO240 1 1 Z
bit 3 I ? IO239
bit 4 C 1 *
bit 5 O ? IO239 4 1 Z
bit 6 I ? IO238
bit 7 C 1 *
bit 8 O ? IO238 7 1 Z
bit 9 I ? IO237
bit 10 C 1 *
bit 11 O ? IO237 10 1 Z
bit 12 I ? IO236
bit 13 C 1 *
bit 14 O ? IO236 13 1 Z
bit 15 I ? IO235
bit 16 C 1 *
bit 17 O ? IO235 16 1 Z
bit 18 I ? IO234
bit 19 C 1 *
bit 20 O ? IO234 19 1 Z
bit 21 I ? IO233
bit 22 C 1 *
bit 23 O ? IO233 22 1 Z
bit 24 I ? IO228
bit 25 C 1 *
bit 26 O ? IO228 25 1 Z
bit 27 I ? IO227
bit 28 C 1 *
bit 29 O ? IO227 28 1 Z
bit 30 I ? IO226
bit 31 C 1 *
bit 32 O ? IO226 31 1 Z
bit 33 I ? IO225
bit 34 C 1 *
bit 35 O ? IO225 34 1 Z
bit 36 I ? IO224
bit 37 C 1 *
bit 38 O ? IO224 37 1 Z
bit 39 I ? IO223
bit 40 C 1 *
bit 41 O ? IO223 40 1 Z
bit 42 I ? IO222
bit 43 C 1 *
bit 44 O ? IO222 43 1 Z
bit 45 I ? IO221
bit 46 C 1 *
bit 47 O ? IO221 46 1 Z
bit 48 I ? IO220
bit 49 C 1 *
bit 50 O ? IO220 49 1 Z
bit 51 I ? IO219
bit 52 C 1 *
bit 53 O ? IO219 52 1 Z
bit 54 I ? IO218
bit 55 C 1 *
bit 56 O ? IO218 55 1 Z
bit 57 I ? IO217
bit 58 C 1 *
bit 59 O ? IO217 58 1 Z
bit 60 I ? IO216
bit 61 C 1 *
bit 62 O ? IO216 61 1 Z
bit 63 I ? IO215
bit 64 C 1 *
bit 65 O ? IO215 64 1 Z
bit 66 I ? IO214
bit 67 C 1 *
bit 68 O ? IO214 67 1 Z
bit 69 I ? IO213
bit 70 C 1 *
bit 71 O ? IO213 70 1 Z
bit 72 I ? IO208
bit 73 C 1 *
bit 74 O ? IO208 73 1 Z
bit 75 I ? IO207
bit 76 C 1 *
bit 77 O ? IO207 76 1 Z
bit 78 I ? IO206
bit 79 C 1 *
bit 80 O ? IO206 79 1 Z
bit 81 I ? IO205
bit 82 C 1 *
bit 83 O ? IO205 82 1 Z
bit 84 I ? IO204
bit 85 C 1 *
bit 86 O ? IO204 85 1 Z
bit 87 I ? IO203
bit 88 C 1 *
bit 89 O ? IO203 88 1 Z
bit 90 I ? IO202
bit 91 C 1 *
bit 92 O ? IO202 91 1 Z
bit 93 I ? IO201
bit 94 C 1 *
bit 95 O ? IO201 94 1 Z
bit 96 I ? IO200
bit 97 C 1 *
bit 98 O ? IO200 97 1 Z
bit 99 I ? IO199
bit 100 C 1 *
bit 101 O ? IO199 100 1 Z
bit 102 I ? IO198
bit 103 C 1 *
bit 104 O ? IO198 103 1 Z
bit 105 I ? IO197
bit 106 C 1 *
bit 107 O ? IO197 106 1 Z
bit 108 I ? IO196
bit 109 C 1 *
bit 110 O ? IO196 109 1 Z
bit 111 I ? IO195
bit 112 C 1 *
bit 113 O ? IO195 112 1 Z
bit 114 I ? IO194
bit 115 C 1 *
bit 116 O ? IO194 115 1 Z
bit 117 I ? IO193
bit 118 C 1 *
bit 119 O ? IO193 118 1 Z
bit 120 I ? IO188
bit 121 C 1 *
bit 122 O ? IO188 121 1 Z
bit 123 I ? IO187
bit 124 C 1 *
bit 125 O ? IO187 124 1 Z
bit 126 I ? IO186
bit 127 C 1 *
bit 128 O ? IO186 127 1 Z
bit 129 I ? IO185
bit 130 C 1 *
bit 131 O ? IO185 130 1 Z
bit 132 I ? IO184
bit 133 C 1 *
bit 134 O ? IO184 133 1 Z
bit 135 I ? IO183
bit 136 C 1 *
bit 137 O ? IO183 136 1 Z
bit 138 I ? IO182
bit 139 C 1 *
bit 140 O ? IO182 139 1 Z
bit 141 I ? IO181
bit 142 C 1 *
bit 143 O ? IO181 142 1 Z
bit 144 I ? IO180
bit 145 C 1 *
bit 146 O ? IO180 145 1 Z
bit 147 I ? IO179
bit 148 C 1 *
bit 149 O ? IO179 148 1 Z
bit 150 I ? IO178
bit 151 C 1 *
bit 152 O ? IO178 151 1 Z
bit 153 I ? IO177
bit 154 C 1 *
bit 155 O ? IO177 154 1 Z
bit 156 I ? IO176
bit 157 C 1 *
bit 158 O ? IO176 157 1 Z
bit 159 I ? IO175
bit 160 C 1 *
bit 161 O ? IO175 160 1 Z
bit 162 I ? IO174
bit 163 C 1 *
bit 164 O ? IO174 163 1 Z
bit 165 I ? IO173
bit 166 C 1 *
bit 167 O ? IO173 166 1 Z
bit 168 I ? IO170
bit 169 C 1 *
bit 170 O ? IO170 169 1 Z
bit 171 I ? IO169
bit 172 C 1 *
bit 173 O ? IO169 172 1 Z
bit 174 I ? IO168
bit 175 C 1 *
bit 176 O ? IO168 175 1 Z
bit 177 I ? IO167
bit 178 C 1 *
bit 179 O ? IO167 178 1 Z
bit 180 I ? IO166
bit 181 C 1 *
bit 182 O ? IO166 181 1 Z
bit 183 I ? IO165
bit 184 C 1 *
bit 185 O ? IO165 184 1 Z
bit 186 I ? IO164
bit 187 C 1 *
bit 188 O ? IO164 187 1 Z
bit 189 I ? IO163
bit 190 C 1 *
bit 191 O ? IO163 190 1 Z
bit 192 I ? IO162
bit 193 C 1 *
bit 194 O ? IO162 193 1 Z
bit 195 I ? IO161
bit 196 C 1 *
bit 197 O ? IO161 196 1 Z
bit 198 I ? IO160
bit 199 C 1 *
bit 200 O ? IO160 199 1 Z
bit 201 I ? IO159
bit 202 C 1 *
bit 203 O ? IO159 202 1 Z
bit 204 I ? IO158
bit 205 C 1 *
bit 206 O ? IO158 205 1 Z
bit 207 I ? IO156
bit 208 C 1 *
bit 209 O ? IO156 208 1 Z
bit 210 I ? CLK2
bit 211 X ? *
bit 212 X ? *
bit 213 X ? *
bit 214 X 1 *
bit 215 X ? *
bit 216 X ? *
bit 217 X 1 *
bit 218 X ? *
bit 219 X ? *
bit 220 X 1 *
bit 221 X ? *
bit 222 I ? IO144
bit 223 C 1 *
bit 224 O ? IO144 223 1 Z
bit 225 I ? IO143
bit 226 C 1 *
bit 227 O ? IO143 226 1 Z
bit 228 I ? IO141
bit 229 C 1 *
bit 230 O ? IO141 229 1 Z
bit 231 I ? IO140
bit 232 C 1 *
bit 233 O ? IO140 232 1 Z
bit 234 I ? IO139
bit 235 C 1 *
bit 236 O ? IO139 235 1 Z
bit 237 I ? IO138
bit 238 C 1 *
bit 239 O ? IO138 238 1 Z
bit 240 I ? IO137
bit 241 C 1 *
bit 242 O ? IO137 241 1 Z
bit 243 I ? IO136
bit 244 C 1 *
bit 245 O ? IO136 244 1 Z
bit 246 I ? IO135
bit 247 C 1 *
bit 248 O ? IO135 247 1 Z
bit 249 I ? IO134
bit 250 C 1 *
bit 251 O ? IO134 250 1 Z
bit 252 I ? IO133
bit 253 C 1 *
bit 254 O ? IO133 253 1 Z
bit 255 I ? IO132
bit 256 C 1 *
bit 257 O ? IO132 256 1 Z
bit 258 I ? IO131
bit 259 C 1 *
bit 260 O ? IO131 259 1 Z
bit 261 I ? IO128
bit 262 C 1 *
bit 263 O ? IO128 262 1 Z
bit 264 I ? IO127
bit 265 C 1 *
bit 266 O ? IO127 265 1 Z
bit 267 I ? IO126
bit 268 C 1 *
bit 269 O ? IO126 268 1 Z
bit 270 I ? IO125
bit 271 C 1 *
bit 272 O ? IO125 271 1 Z
bit 273 I ? IO124
bit 274 C 1 *
bit 275 O ? IO124 274 1 Z
bit 276 I ? IO123
bit 277 C 1 *
bit 278 O ? IO123 277 1 Z
bit 279 I ? IO122
bit 280 C 1 *
bit 281 O ? IO122 280 1 Z
bit 282 I ? IO121
bit 283 C 1 *
bit 284 O ? IO121 283 1 Z
bit 285 I ? IO120
bit 286 C 1 *
bit 287 O ? IO120 286 1 Z
bit 288 I ? IO119
bit 289 C 1 *
bit 290 O ? IO119 289 1 Z
bit 291 I ? IO118
bit 292 C 1 *
bit 293 O ? IO118 292 1 Z
bit 294 I ? IO117
bit 295 C 1 *
bit 296 O ? IO117 295 1 Z
bit 297 I ? IO116
bit 298 C 1 *
bit 299 O ? IO116 298 1 Z
bit 300 I ? IO115
bit 301 C 1 *
bit 302 O ? IO115 301 1 Z
bit 303 I ? IO114
bit 304 C 1 *
bit 305 O ? IO114 304 1 Z
bit 306 I ? IO113
bit 307 C 1 *
bit 308 O ? IO113 307 1 Z
bit 309 I ? IO108
bit 310 C 1 *
bit 311 O ? IO108 310 1 Z
bit 312 I ? IO107
bit 313 C 1 *
bit 314 O ? IO107 313 1 Z
bit 315 I ? IO106
bit 316 C 1 *
bit 317 O ? IO106 316 1 Z
bit 318 I ? IO105
bit 319 C 1 *
bit 320 O ? IO105 319 1 Z
bit 321 I ? IO104
bit 322 C 1 *
bit 323 O ? IO104 322 1 Z
bit 324 I ? IO103
bit 325 C 1 *
bit 326 O ? IO103 325 1 Z
bit 327 I ? IO102
bit 328 C 1 *
bit 329 O ? IO102 328 1 Z
bit 330 I ? IO101
bit 331 C 1 *
bit 332 O ? IO101 331 1 Z
bit 333 I ? IO100
bit 334 C 1 *
bit 335 O ? IO100 334 1 Z
bit 336 I ? IO99
bit 337 C 1 *
bit 338 O ? IO99 337 1 Z
bit 339 I ? IO98
bit 340 C 1 *
bit 341 O ? IO98 340 1 Z
bit 342 I ? IO97
bit 343 C 1 *
bit 344 O ? IO97 343 1 Z
bit 345 I ? IO96
bit 346 C 1 *
bit 347 O ? IO96 346 1 Z
bit 348 I ? IO95
bit 349 C 1 *
bit 350 O ? IO95 349 1 Z
bit 351 I ? IO94
bit 352 C 1 *
bit 353 O ? IO94 352 1 Z
bit 354 I ? IO93
bit 355 C 1 *
bit 356 O ? IO93 355 1 Z
bit 357 I ? IO88
bit 358 C 1 *
bit 359 O ? IO88 358 1 Z
bit 360 I ? IO87
bit 361 C 1 *
bit 362 O ? IO87 361 1 Z
bit 363 I ? IO86
bit 364 C 1 *
bit 365 O ? IO86 364 1 Z
bit 366 I ? IO85
bit 367 C 1 *
bit 368 O ? IO85 367 1 Z
bit 369 I ? IO84
bit 370 C 1 *
bit 371 O ? IO84 370 1 Z
bit 372 I ? IO83
bit 373 C 1 *
bit 374 O ? IO83 373 1 Z
bit 375 I ? IO82
bit 376 C 1 *
bit 377 O ? IO82 376 1 Z
bit 378 I ? IO81
bit 379 C 1 *
bit 380 O ? IO81 379 1 Z
bit 381 I ? IO80
bit 382 C 1 *
bit 383 O ? IO80 382 1 Z
bit 384 I ? IO79
bit 385 C 1 *
bit 386 O ? IO79 385 1 Z
bit 387 I ? IO78
bit 388 C 1 *
bit 389 O ? IO78 388 1 Z
bit 390 I ? IO77
bit 391 C 1 *
bit 392 O ? IO77 391 1 Z
bit 393 I ? IO76
bit 394 C 1 *
bit 395 O ? IO76 394 1 Z
bit 396 I ? IO75
bit 397 C 1 *
bit 398 O ? IO75 397 1 Z
bit 399 I ? IO74
bit 400 C 1 *
bit 401 O ? IO74 400 1 Z
bit 402 I ? IO73
bit 403 C 1 *
bit 404 O ? IO73 403 1 Z
bit 405 I ? IO68
bit 406 C 1 *
bit 407 O ? IO68 406 1 Z
bit 408 I ? IO67
bit 409 C 1 *
bit 410 O ? IO67 409 1 Z
bit 411 I ? IO66
bit 412 C 1 *
bit 413 O ? IO66 412 1 Z
bit 414 I ? IO65
bit 415 C 1 *
bit 416 O ? IO65 415 1 Z
bit 417 I ? IO64
bit 418 C 1 *
bit 419 O ? IO64 418 1 Z
bit 420 I ? IO63
bit 421 C 1 *
bit 422 O ? IO63 421 1 Z
bit 423 I ? IO62
bit 424 C 1 *
bit 425 O ? IO62 424 1 Z
bit 426 I ? IO61
bit 427 C 1 *
bit 428 O ? IO61 427 1 Z
bit 429 I ? IO60
bit 430 C 1 *
bit 431 O ? IO60 430 1 Z
bit 432 I ? IO59
bit 433 C 1 *
bit 434 O ? IO59 433 1 Z
bit 435 I ? IO58
bit 436 C 1 *
bit 437 O ? IO58 436 1 Z
bit 438 I ? IO57
bit 439 C 1 *
bit 440 O ? IO57 439 1 Z
bit 441 I ? IO56
bit 442 C 1 *
bit 443 O ? IO56 442 1 Z
bit 444 I ? IO55
bit 445 C 1 *
bit 446 O ? IO55 445 1 Z
bit 447 I ? IO54
bit 448 C 1 *
bit 449 O ? IO54 448 1 Z
bit 450 I ? IO53
bit 451 C 1 *
bit 452 O ? IO53 451 1 Z
bit 453 I ? IO50
bit 454 C 1 *
bit 455 O ? IO50 454 1 Z
bit 456 I ? IO49
bit 457 C 1 *
bit 458 O ? IO49 457 1 Z
bit 459 I ? IO48
bit 460 C 1 *
bit 461 O ? IO48 460 1 Z
bit 462 I ? IO47
bit 463 C 1 *
bit 464 O ? IO47 463 1 Z
bit 465 I ? IO46
bit 466 C 1 *
bit 467 O ? IO46 466 1 Z
bit 468 I ? IO45
bit 469 C 1 *
bit 470 O ? IO45 469 1 Z
bit 471 I ? IO44
bit 472 C 1 *
bit 473 O ? IO44 472 1 Z
bit 474 I ? IO43
bit 475 C 1 *
bit 476 O ? IO43 475 1 Z
bit 477 I ? IO42
bit 478 C 1 *
bit 479 O ? IO42 478 1 Z
bit 480 I ? IO41
bit 481 C 1 *
bit 482 O ? IO41 481 1 Z
bit 483 I ? IO39
bit 484 C 1 *
bit 485 O ? IO39 484 1 Z
bit 486 I ? IO38
bit 487 C 1 *
bit 488 O ? IO38 487 1 Z
bit 489 I ? IO37
bit 490 C 1 *
bit 491 O ? IO37 490 1 Z
bit 492 I ? DCLK
bit 493 C 1 *
bit 494 O ? DCLK 493 1 Z
bit 495 I ? MSEL1
bit 496 X ? *
bit 497 X ? *
bit 498 I ? MSEL0
bit 499 X ? *
bit 500 X ? *
bit 501 X ? *
bit 502 X 1 *
bit 503 X ? *
bit 504 X ? *
bit 505 X 1 *
bit 506 X ? *
bit 507 X ? *
bit 508 X 1 *
bit 509 X ? *
bit 510 I ? CLK0
bit 511 X ? *
bit 512 X ? *
bit 513 X ? *
bit 514 X 1 *
bit 515 X ? *
bit 516 I ? DATA0
bit 517 X ? *
bit 518 X ? *
bit 519 I ? IO24
bit 520 C 1 *
bit 521 O ? IO24 520 1 Z
bit 522 I ? IO23
bit 523 C 1 *
bit 524 O ? IO23 523 1 Z
bit 525 I ? IO21
bit 526 C 1 *
bit 527 O ? IO21 526 1 Z
bit 528 I ? IO20
bit 529 C 1 *
bit 530 O ? IO20 529 1 Z
bit 531 I ? IO19
bit 532 C 1 *
bit 533 O ? IO19 532 1 Z
bit 534 I ? IO18
bit 535 C 1 *
bit 536 O ? IO18 535 1 Z
bit 537 I ? IO17
bit 538 C 1 *
bit 539 O ? IO17 538 1 Z
bit 540 I ? IO16
bit 541 C 1 *
bit 542 O ? IO16 541 1 Z
bit 543 I ? IO15
bit 544 C 1 *
bit 545 O ? IO15 544 1 Z
bit 546 I ? IO14
bit 547 C 1 *
bit 548 O ? IO14 547 1 Z
bit 549 I ? IO13
bit 550 C 1 *
bit 551 O ? IO13 550 1 Z
bit 552 I ? IO12
bit 553 C 1 *
bit 554 O ? IO12 553 1 Z
bit 555 I ? IO11
bit 556 C 1 *
bit 557 O ? IO11 556 1 Z
bit 558 I ? IO8
bit 559 C 1 *
bit 560 O ? IO8 559 1 Z
bit 561 I ? IO7
bit 562 C 1 *
bit 563 O ? IO7 562 1 Z
bit 564 I ? IO6
bit 565 C 1 *
bit 566 O ? IO6 565 1 Z
bit 567 I ? IO5
bit 568 C 1 *
bit 569 O ? IO5 568 1 Z
bit 570 I ? IO4
bit 571 C 1 *
bit 572 O ? IO4 571 1 Z
bit 573 I ? IO3
bit 574 C 1 *
bit 575 O ? IO3 574 1 Z
bit 576 I ? IO2
bit 577 C 1 *
bit 578 O ? IO2 577 1 Z
bit 579 I ? IO1
bit 580 C 1 *
bit 581 O ? IO1 580 1 Z

@ -0,0 +1,23 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
#
# bits 31-28 of the Device Identification Register
0000 ep2c8 0

File diff suppressed because it is too large Load Diff

@ -0,0 +1,226 @@
#
# $Id$
#
# JTAG package script for EP2C8F256
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
#
# Note:
# The signals defined in this file as unused pad are specified as
# I/O pins in the main configuration file ep2c8.
#
salias IOC3 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
salias IOF4 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
salias IOC1 BSC196
salias IOC2 BSC195
salias IOD5 BSC194
salias IOE5 BSC193
salias IOF5 BSC192
# BSC191 # unused pad
salias IOD3 BSC190
salias IOD4 BSC189
salias IOF3 BSC188
salias IOD2 BSC187
salias IOD1 BSC186
salias IOE3 BSC185
salias IOE4 BSC184
salias IOG4 BSC183
salias IOJ6 BSC182
salias IOH6 BSC181
salias IOE1 BSC180
salias IOE2 BSC179
salias DATA0 BSC178 # Family-specific input pin F1
salias DCLK BSC177 # Family-specific input pin H4
# nCE BSC176 # untestable Family-specific pin G5
salias CLK0 BSC175 # Family-specific input pin H2
salias CLK1 BSC174 # Family-specific input pin H1
# nCONFIG BSC173 # untestable Family-specific pin J5
salias CLK2 BSC172 # Family-specific input pin J2
salias CLK3 BSC171 # Family-specific input pin J1
salias IOK2 BSC170
salias IOK1 BSC169
salias IOK4 BSC168
salias IOK5 BSC167
# BSC166 # unused pad
salias IOL1 BSC165
salias IOL2 BSC164
salias IOJ4 BSC163
salias IOM1 BSC162
salias IOM2 BSC161
salias IOM3 BSC160
salias IOL3 BSC159
salias ION1 BSC158
salias ION2 BSC157
salias IOP1 BSC156
salias IOP2 BSC155
# BSC154 # unused pad
salias ION3 BSC153
salias ION4 BSC152
salias IOP3 BSC151
salias IOL4 BSC150
salias IOM4 BSC149
salias IOR3 BSC148
salias IOT3 BSC147
salias IOP5 BSC146
salias IOP4 BSC145
salias IOT4 BSC144
salias IOR4 BSC143
salias IOT5 BSC142
salias IOR5 BSC141
salias ION7 BSC140
salias IOK7 BSC139
salias IOK6 BSC138
salias IOT6 BSC137
salias IOR6 BSC136
salias IOP6 BSC135
salias ION6 BSC134
salias ION8 BSC133
salias IOT7 BSC132
salias IOR7 BSC131
salias IOL7 BSC130
salias IOL8 BSC129
salias IOT8 BSC128
salias IOR8 BSC127
salias IOT9 BSC126
salias IOR9 BSC125
salias ION9 BSC124
salias ION10 BSC123
salias IOT11 BSC122
salias IOR11 BSC121
salias IOP11 BSC120
salias IOL9 BSC119
salias IOL10 BSC118
salias IOR10 BSC117
salias IOT10 BSC116
salias IOK11 BSC115
salias IOK10 BSC114
salias ION11 BSC113
salias IOP12 BSC112
salias IOP13 BSC111
salias IOT12 BSC110
salias IOR12 BSC109
# BSC108 # unused pad
salias IOT13 BSC107
salias IOR13 BSC106
salias IOT14 BSC105
salias IOR14 BSC104
salias IOM11 BSC103
salias IOL11 BSC102
salias ION12 BSC101
salias IOM12 BSC100
salias IOL12 BSC099
salias IOK13 BSC098
salias ION13 BSC097
salias ION14 BSC096
salias IOP15 BSC095
salias IOP16 BSC094
salias ION15 BSC093
salias ION16 BSC092
salias IOP14 BSC091
# BSC090 # unused pad
# BSC089 # unused pad
salias IOM14 BSC088
salias IOM15 BSC087
salias IOM16 BSC086
# BSC085 # unused pad
salias IOL14 BSC084
salias IOL15 BSC083
salias IOL16 BSC082
# nSTATUS BSC081 # untestable Family-specific pin M13
# CONF_DONE BSC080 # untestable Family-specific pin L13
salias MSEL1 BSC079 # Family-specific input pin K12
salias MSEL0 BSC078 # Family-specific input pin J13
salias IOK16 BSC077
salias IOK15 BSC076
salias CLK7 BSC075 # Family-specific input pin J16
salias CLK6 BSC074 # Family-specific input pin J15
salias CLK5 BSC073 # Family-specific input pin H15
salias CLK4 BSC072 # Family-specific input pin H16
salias IOH12 BSC071
salias IOJ12 BSC070
salias IOG16 BSC069
salias IOG15 BSC068
salias IOF15 BSC067
salias IOF16 BSC066
salias IOJ11 BSC065
salias IOH11 BSC064
salias IOG12 BSC063
salias IOG13 BSC062
salias IOE13 BSC061
salias IOF13 BSC060
salias IOH13 BSC059
salias IOD15 BSC058
salias IOD16 BSC057
salias IOE15 BSC056
salias IOE16 BSC055
salias IOF14 BSC054
salias IOC15 BSC053
salias IOC16 BSC052
salias IOC14 BSC051
salias IOD13 BSC050
salias IOE14 BSC049
salias IOD14 BSC048
salias IOB14 BSC047
salias IOA14 BSC046
salias IOC13 BSC045
salias IOC12 BSC044
salias IOB13 BSC043
salias IOA13 BSC042
salias IOB12 BSC041
salias IOA12 BSC040
salias IOC11 BSC039
salias IOB11 BSC038
salias IOA11 BSC037
salias IOG10 BSC036
salias IOG11 BSC035
salias IOB10 BSC034
salias IOA10 BSC033
salias IOF10 BSC032
salias IOF9 BSC031
salias IOD9 BSC030
salias IOD11 BSC029
salias IOD10 BSC028
salias IOA9 BSC027
salias IOB9 BSC026
salias IOA8 BSC025
salias IOB8 BSC024
salias IOA7 BSC023
salias IOB7 BSC022
salias IOF7 BSC021
salias IOF8 BSC020
# BSC019 # unused pad
# BSC018 # unused pad
salias IOD8 BSC017
salias IOB6 BSC016
salias IOA6 BSC015
salias IOG6 BSC014
salias IOG7 BSC013
salias IOD7 BSC012
salias IOD6 BSC011
salias IOC6 BSC010
salias IOC5 BSC009
salias IOC4 BSC008
salias IOB5 BSC007
salias IOA5 BSC006
salias IOB4 BSC005
salias IOA4 BSC004
salias IOA3 BSC003
salias IOB3 BSC002
salias IOE6 BSC001
salias IOF6 BSC000

@ -0,0 +1,226 @@
#
# $Id$
#
# JTAG package script for EP2C8Q208
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
#
# Note:
# The signals defined in this file as unused pad are specified as
# I/O pins in the main configuration file ep2c8.
#
salias IO1 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
salias IO2 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
salias IO3 BSC196
salias IO4 BSC195
salias IO5 BSC194
salias IO6 BSC193
salias IO8 BSC192
salias IO10 BSC191
salias IO11 BSC190
salias IO12 BSC189
salias IO13 BSC188
# BSC187 # unused pad
# BSC186 # unused pad
# BSC185 # unused pad
# BSC184 # unused pad
# BSC183 # unused pad
# BSC182 # unused pad
# BSC181 # unused pad
salias IO14 BSC180
salias IO15 BSC179
salias DATA0 BSC178 # Family-specific input pin 20
salias DCLK BSC177 # Family-specific input pin 21
# nCE BSC176 # untestable Family-specific pin 22
salias CLK0 BSC175 # Family-specific input pin 23
salias CLK1 BSC174 # Family-specific input pin 24
# nCONFIG BSC173 # untestable Family-specific pin 26
salias CLK2 BSC172 # Family-specific input pin 27
salias CLK3 BSC171 # Family-specific input pin 28
salias IO30 BSC170
salias IO31 BSC169
# BSC168 # unused pad
salias IO33 BSC167
salias IO34 BSC166
salias IO35 BSC165
# BSC164 # unused pad
salias IO37 BSC163
# BSC162 # unused pad
# BSC161 # unused pad
# BSC160 # unused pad
salias IO39 BSC159
salias IO40 BSC158
salias IO41 BSC157
# BSC156 # unused pad
# BSC155 # unused pad
salias IO43 BSC154
salias IO44 BSC153
salias IO45 BSC152
salias IO46 BSC151
salias IO47 BSC150
salias IO48 BSC149
salias IO56 BSC148
salias IO57 BSC147
salias IO58 BSC146
salias IO59 BSC145
salias IO60 BSC144
salias IO61 BSC143
salias IO63 BSC142
salias IO64 BSC141
# BSC140 # unused pad
# BSC139 # unused pad
# BSC138 # unused pad
# BSC137 # unused pad
# BSC136 # unused pad
# BSC135 # unused pad
# BSC134 # unused pad
salias IO67 BSC133
salias IO68 BSC132
salias IO69 BSC131
# BSC130 # unused pad
# BSC129 # unused pad
salias IO70 BSC128
salias IO72 BSC127
salias IO74 BSC126
salias IO75 BSC125
salias IO76 BSC124
salias IO77 BSC123
# BSC122 # unused pad
# BSC121 # unused pad
salias IO80 BSC120
salias IO81 BSC119
salias IO82 BSC118
salias IO84 BSC117
salias IO86 BSC116
salias IO87 BSC115
salias IO88 BSC114
salias IO89 BSC113
salias IO90 BSC112
salias IO92 BSC111
salias IO94 BSC110
salias IO95 BSC109
salias IO96 BSC108
salias IO97 BSC107
salias IO99 BSC106
salias IO101 BSC105
salias IO102 BSC104
salias IO103 BSC103
salias IO104 BSC102
salias IO105 BSC101
salias IO106 BSC100
# BSC099 # unused pad
# BSC098 # unused pad
salias IO107 BSC097
salias IO108 BSC096
salias IO110 BSC095
salias IO112 BSC094
salias IO113 BSC093
salias IO114 BSC092
# BSC091 # unused pad
salias IO115 BSC090
salias IO116 BSC089
salias IO117 BSC088
# BSC087 # unused pad
# BSC086 # unused pad
salias IO118 BSC085
# BSC084 # unused pad
# BSC083 # unused pad
# BSC082 # unused pad
# nSTATUS BSC081 # untestable Family-specific pin 121
# CONF_DONE BSC080 # untestable Family-specific pin 123
salias MSEL1 BSC079 # Family-specific input pin 125
salias MSEL0 BSC078 # Family-specific input pin 126
salias IO127 BSC077
salias IO128 BSC076
salias CLK7 BSC075 # Family-specific input pin 129
salias CLK6 BSC074 # Family-specific input pin 130
salias CLK5 BSC073 # Family-specific input pin 131
salias CLK4 BSC072 # Family-specific input pin 132
salias IO133 BSC071
salias IO134 BSC070
salias IO135 BSC069
salias IO137 BSC068
salias IO138 BSC067
salias IO139 BSC066
salias IO141 BSC065
salias IO142 BSC064
# BSC063 # unused pad
# BSC062 # unused pad
salias IO143 BSC061
salias IO144 BSC060
salias IO145 BSC059
# BSC058 # unused pad
# BSC057 # unused pad
# BSC056 # unused pad
# BSC055 # unused pad
# BSC054 # unused pad
salias IO146 BSC053
salias IO147 BSC052
salias IO149 BSC051
salias IO150 BSC050
salias IO151 BSC049
salias IO152 BSC048
salias IO160 BSC047
salias IO161 BSC046
salias IO162 BSC045
salias IO163 BSC044
salias IO164 BSC043
salias IO165 BSC042
salias IO168 BSC041
salias IO169 BSC040
salias IO170 BSC039
salias IO171 BSC038
salias IO173 BSC037
# BSC036 # unused pad
# BSC035 # unused pad
salias IO175 BSC034
salias IO176 BSC033
# BSC032 # unused pad
# BSC031 # unused pad
# BSC030 # unused pad
salias IO179 BSC029
salias IO180 BSC028
salias IO181 BSC027
salias IO182 BSC026
# BSC025 # unused pad
# BSC024 # unused pad
# BSC023 # unused pad
salias IO185 BSC022
salias IO187 BSC021
salias IO188 BSC020
salias IO189 BSC019
salias IO191 BSC018
salias IO192 BSC017
salias IO193 BSC016
salias IO195 BSC015
# BSC014 # unused pad
# BSC013 # unused pad
# BSC012 # unused pad
salias IO197 BSC011
salias IO198 BSC010
# BSC009 # unused pad
# BSC008 # unused pad
salias IO199 BSC007
salias IO200 BSC006
salias IO201 BSC005
salias IO203 BSC004
salias IO205 BSC003
salias IO206 BSC002
salias IO207 BSC001
salias IO208 BSC000

@ -0,0 +1,226 @@
#
# $Id$
#
# JTAG package script for EP2C8T144
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
#
# Note:
# The signals defined in this file as unused pad are specified as
# I/O pins in the main configuration file ep2c8.
#
salias IO1 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
salias IO2 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
salias IO3 BSC196
salias IO4 BSC195
# BSC194 # unused pad
# BSC193 # unused pad
# BSC192 # unused pad
# BSC191 # unused pad
# BSC190 # unused pad
# BSC189 # unused pad
salias IO7 BSC188
# BSC187 # unused pad
# BSC186 # unused pad
# BSC185 # unused pad
# BSC184 # unused pad
# BSC183 # unused pad
# BSC182 # unused pad
# BSC181 # unused pad
salias IO8 BSC180
salias IO9 BSC179
salias DATA0 BSC178 # Family-specific input pin 14
salias DCLK BSC177 # Family-specific input pin 15
# nCE BSC176 # untestable Family-specific pin 16
salias CLK0 BSC175 # Family-specific input pin 17
salias CLK1 BSC174 # Family-specific input pin 18
# nCONFIG BSC173 # untestable Family-specific pin 20
salias CLK2 BSC172 # Family-specific input pin 21
salias CLK3 BSC171 # Family-specific input pin 22
salias IO24 BSC170
salias IO25 BSC169
# BSC168 # unused pad
# BSC167 # unused pad
# BSC166 # unused pad
# BSC165 # unused pad
# BSC164 # unused pad
salias IO28 BSC163
# BSC162 # unused pad
# BSC161 # unused pad
# BSC160 # unused pad
# BSC159 # unused pad
# BSC158 # unused pad
# BSC157 # unused pad
# BSC156 # unused pad
# BSC155 # unused pad
# BSC154 # unused pad
# BSC153 # unused pad
# BSC152 # unused pad
salias IO30 BSC151
salias IO31 BSC150
salias IO32 BSC149
salias IO40 BSC148
salias IO41 BSC147
salias IO42 BSC146
salias IO43 BSC145
salias IO44 BSC144
salias IO45 BSC143
salias IO47 BSC142
salias IO48 BSC141
# BSC140 # unused pad
# BSC139 # unused pad
# BSC138 # unused pad
# BSC137 # unused pad
# BSC136 # unused pad
# BSC135 # unused pad
# BSC134 # unused pad
salias IO51 BSC133
salias IO52 BSC132
# BSC131 # unused pad
# BSC130 # unused pad
# BSC129 # unused pad
salias IO53 BSC128
salias IO55 BSC127
salias IO57 BSC126
salias IO58 BSC125
salias IO59 BSC124
salias IO60 BSC123
# BSC122 # unused pad
# BSC121 # unused pad
# BSC120 # unused pad
# BSC119 # unused pad
# BSC118 # unused pad
# BSC117 # unused pad
# BSC116 # unused pad
# BSC115 # unused pad
# BSC114 # unused pad
salias IO63 BSC113
# BSC112 # unused pad
# BSC111 # unused pad
salias IO64 BSC110
salias IO65 BSC109
# BSC108 # unused pad
# BSC107 # unused pad
salias IO67 BSC106
salias IO69 BSC105
salias IO70 BSC104
salias IO71 BSC103
salias IO72 BSC102
salias IO73 BSC101
salias IO74 BSC100
# BSC099 # unused pad
# BSC098 # unused pad
salias IO75 BSC097
salias IO76 BSC096
# BSC095 # unused pad
# BSC094 # unused pad
# BSC093 # unused pad
# BSC092 # unused pad
# BSC091 # unused pad
# BSC090 # unused pad
# BSC089 # unused pad
salias IO79 BSC088
# BSC087 # unused pad
# BSC086 # unused pad
# BSC085 # unused pad
# BSC084 # unused pad
# BSC083 # unused pad
# BSC082 # unused pad
# nSTATUS BSC081 # untestable Family-specific pin 82
# CONF_DONE BSC080 # untestable Family-specific pin 83
salias MSEL1 BSC079 # Family-specific input pin 84
salias MSEL0 BSC078 # Family-specific input pin 85
salias IO86 BSC077
salias IO87 BSC076
salias CLK7 BSC075 # Family-specific input pin 88
salias CLK6 BSC074 # Family-specific input pin 89
salias CLK5 BSC073 # Family-specific input pin 90
salias CLK4 BSC072 # Family-specific input pin 91
salias IO92 BSC071
salias IO93 BSC070
salias IO94 BSC069
salias IO96 BSC068
salias IO97 BSC067
# BSC066 # unused pad
# BSC065 # unused pad
# BSC064 # unused pad
# BSC063 # unused pad
# BSC062 # unused pad
# BSC061 # unused pad
# BSC060 # unused pad
salias IO99 BSC059
# BSC058 # unused pad
# BSC057 # unused pad
# BSC056 # unused pad
# BSC055 # unused pad
# BSC054 # unused pad
salias IO100 BSC053
salias IO101 BSC052
# BSC051 # unused pad
# BSC050 # unused pad
salias IO103 BSC049
salias IO104 BSC048
salias IO112 BSC047
salias IO113 BSC046
salias IO114 BSC045
salias IO115 BSC044
# BSC043 # unused pad
# BSC042 # unused pad
salias IO118 BSC041
salias IO119 BSC040
salias IO120 BSC039
salias IO121 BSC038
salias IO122 BSC037
# BSC036 # unused pad
# BSC035 # unused pad
# BSC034 # unused pad
# BSC033 # unused pad
# BSC032 # unused pad
# BSC031 # unused pad
# BSC030 # unused pad
salias IO125 BSC029
salias IO126 BSC028
# BSC027 # unused pad
# BSC026 # unused pad
# BSC025 # unused pad
# BSC024 # unused pad
# BSC023 # unused pad
salias IO129 BSC022
# BSC021 # unused pad
# BSC020 # unused pad
# BSC019 # unused pad
# BSC018 # unused pad
salias IO132 BSC017
salias IO133 BSC016
salias IO134 BSC015
# BSC014 # unused pad
# BSC013 # unused pad
# BSC012 # unused pad
# BSC011 # unused pad
# BSC010 # unused pad
# BSC009 # unused pad
# BSC008 # unused pad
salias IO135 BSC007
salias IO136 BSC006
salias IO137 BSC005
salias IO139 BSC004
salias IO141 BSC003
salias IO142 BSC002
salias IO143 BSC001
salias IO144 BSC000

@ -0,0 +1,23 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
# bits 31-28 of the Device Identification Register
0001 epm3064a 1

@ -0,0 +1,297 @@
#
# $Id$
#
# JTAG declarations for EPM3064A
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
# Note:
# The signals defined in this file are generic for any EPM3064A.
# Signalnames according to Altera's package tables are set in the
# package specific scripts.
#
register BYPASS 1
register BSR 192
register DEVICE_ID 32
register USERCODE 32
instruction length 10
instruction BYPASS 1111111111 BYPASS
instruction IDCODE 0001011001 DEVICE_ID
instruction USERCODE 0000000111 USERCODE
instruction SAMPLE/PRELOAD 0001010101 BSR
instruction EXTEST 0000000000 BSR
signal BSC0
signal BSC1
signal BSC10
signal BSC11
signal BSC12
signal BSC13
signal BSC14
signal BSC15
signal BSC16
signal BSC17
signal BSC18
signal BSC19
signal BSC2
signal BSC20
signal BSC21
signal BSC22
signal BSC23
signal BSC24
signal BSC25
signal BSC26
signal BSC27
signal BSC28
signal BSC29
signal BSC3
signal BSC30
signal BSC31
signal BSC32
signal BSC33
signal BSC34
signal BSC35
signal BSC36
signal BSC37
signal BSC38
signal BSC39
signal BSC4
signal BSC40
signal BSC41
signal BSC42
signal BSC43
signal BSC44
signal BSC45
signal BSC46
signal BSC47
signal BSC48
signal BSC49
signal BSC5
signal BSC50
signal BSC51
signal BSC52
signal BSC53
signal BSC54
signal BSC55
signal BSC56
signal BSC57
signal BSC58
signal BSC59
signal BSC6
signal BSC60
signal BSC61
signal BSC62
signal BSC63
signal BSC7
signal BSC8
signal BSC9
bit 0 I ? BSC0
bit 1 X ? *
bit 2 X ? *
bit 3 I ? BSC1
bit 4 X ? *
bit 5 X ? *
bit 6 I ? BSC2
bit 7 C 0 *
bit 8 O ? BSC2 7 0 Z
bit 9 I ? BSC3
bit 10 C 0 *
bit 11 O ? BSC3 10 0 Z
bit 12 I ? BSC4
bit 13 C 0 *
bit 14 O ? BSC4 13 0 Z
bit 15 I ? BSC5
bit 16 C 0 *
bit 17 O ? BSC5 16 0 Z
bit 18 I ? BSC6
bit 19 C 0 *
bit 20 O ? BSC6 19 0 Z
bit 21 I ? BSC7
bit 22 C 0 *
bit 23 O ? BSC7 22 0 Z
bit 24 I ? BSC8
bit 25 C 0 *
bit 26 O ? BSC8 25 0 Z
bit 27 I ? BSC9
bit 28 C 0 *
bit 29 O ? BSC9 28 0 Z
bit 30 I ? BSC10
bit 31 C 0 *
bit 32 O ? BSC10 31 0 Z
bit 33 I ? BSC11
bit 34 C 0 *
bit 35 O ? BSC11 34 0 Z
bit 36 I ? BSC12
bit 37 C 0 *
bit 38 O ? BSC12 37 0 Z
bit 39 I ? BSC13
bit 40 C 0 *
bit 41 O ? BSC13 40 0 Z
bit 42 I ? BSC14
bit 43 C 0 *
bit 44 O ? BSC14 43 0 Z
bit 45 I ? BSC15
bit 46 C 0 *
bit 47 O ? BSC15 46 0 Z
bit 48 I ? BSC16
bit 49 C 0 *
bit 50 O ? BSC16 49 0 Z
bit 51 I ? BSC17
bit 52 C 0 *
bit 53 O ? BSC17 52 0 Z
bit 54 I ? BSC18
bit 55 C 0 *
bit 56 O ? BSC18 55 0 Z
bit 57 I ? BSC19
bit 58 C 0 *
bit 59 O ? BSC19 58 0 Z
bit 60 I ? BSC20
bit 61 C 0 *
bit 62 O ? BSC20 61 0 Z
bit 63 I ? BSC21
bit 64 C 0 *
bit 65 O ? BSC21 64 0 Z
bit 66 I ? BSC22
bit 67 C 0 *
bit 68 O ? BSC22 67 0 Z
bit 69 I ? BSC23
bit 70 C 0 *
bit 71 O ? BSC23 70 0 Z
bit 72 I ? BSC24
bit 73 C 0 *
bit 74 O ? BSC24 73 0 Z
bit 75 I ? BSC25
bit 76 C 0 *
bit 77 O ? BSC25 76 0 Z
bit 78 I ? BSC26
bit 79 C 0 *
bit 80 O ? BSC26 79 0 Z
bit 81 I ? BSC27
bit 82 C 0 *
bit 83 O ? BSC27 82 0 Z
bit 84 I ? BSC28
bit 85 C 0 *
bit 86 O ? BSC28 85 0 Z
bit 87 I ? BSC29
bit 88 C 0 *
bit 89 O ? BSC29 88 0 Z
bit 90 I ? BSC30
bit 91 C 0 *
bit 92 O ? BSC30 91 0 Z
bit 93 I ? BSC31
bit 94 C 0 *
bit 95 O ? BSC31 94 0 Z
bit 96 I ? BSC32
bit 97 C 0 *
bit 98 O ? BSC32 97 0 Z
bit 99 I ? BSC33
bit 100 C 0 *
bit 101 O ? BSC33 100 0 Z
bit 102 I ? BSC34
bit 103 C 0 *
bit 104 O ? BSC34 103 0 Z
bit 105 I ? BSC35
bit 106 C 0 *
bit 107 O ? BSC35 106 0 Z
bit 108 I ? BSC36
bit 109 C 0 *
bit 110 O ? BSC36 109 0 Z
bit 111 I ? BSC37
bit 112 C 0 *
bit 113 O ? BSC37 112 0 Z
bit 114 I ? BSC38
bit 115 C 0 *
bit 116 O ? BSC38 115 0 Z
bit 117 I ? BSC39
bit 118 C 0 *
bit 119 O ? BSC39 118 0 Z
bit 120 I ? BSC40
bit 121 C 0 *
bit 122 O ? BSC40 121 0 Z
bit 123 I ? BSC41
bit 124 C 0 *
bit 125 O ? BSC41 124 0 Z
bit 126 I ? BSC42
bit 127 C 0 *
bit 128 O ? BSC42 127 0 Z
bit 129 I ? BSC43
bit 130 C 0 *
bit 131 O ? BSC43 130 0 Z
bit 132 I ? BSC44
bit 133 C 0 *
bit 134 O ? BSC44 133 0 Z
bit 135 I ? BSC45
bit 136 C 0 *
bit 137 O ? BSC45 136 0 Z
bit 138 I ? BSC46
bit 139 C 0 *
bit 140 O ? BSC46 139 0 Z
bit 141 I ? BSC47
bit 142 C 0 *
bit 143 O ? BSC47 142 0 Z
bit 144 I ? BSC48
bit 145 C 0 *
bit 146 O ? BSC48 145 0 Z
bit 147 I ? BSC49
bit 148 C 0 *
bit 149 O ? BSC49 148 0 Z
bit 150 I ? BSC50
bit 151 C 0 *
bit 152 O ? BSC50 151 0 Z
bit 153 I ? BSC51
bit 154 C 0 *
bit 155 O ? BSC51 154 0 Z
bit 156 I ? BSC52
bit 157 C 0 *
bit 158 O ? BCS52 157 0 Z
bit 159 I ? BSC53
bit 160 C 0 *
bit 161 O ? BSC53 160 0 Z
bit 162 I ? BSC54
bit 163 C 0 *
bit 164 O ? BSC54 163 0 Z
bit 165 I ? BSC55
bit 166 C 0 *
bit 167 O ? BSC55 166 0 Z
bit 168 I ? BSC56
bit 169 C 0 *
bit 170 O ? BSC56 169 0 Z
bit 171 I ? BSC57
bit 172 C 0 *
bit 173 O ? BSC57 172 0 Z
bit 174 I ? BSC58
bit 175 C 0 *
bit 176 O ? BSC58 175 0 Z
bit 177 I ? BSC59
bit 178 C 0 *
bit 179 O ? BSC59 178 0 Z
bit 180 I ? BSC60
bit 181 C 0 *
bit 182 O ? BSC60 181 0 Z
bit 183 I ? BSC61
bit 184 C 0 *
bit 185 O ? BSC61 184 0 Z
bit 186 I ? BSC62
bit 187 X ? *
bit 188 X ? *
bit 189 I ? BSC63
bit 190 X ? *
bit 191 X ? *

@ -0,0 +1,53 @@
#
# $Id$
#
# JTAG package script for EPM3064AL44
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
salias IN44 BSC0
salias IN43 BSC1
salias IO41 BSC2
salias IO40 BSC4
salias IO39 BSC9
salias IO37 BSC12
salias IO34 BSC14
salias IO33 BSC16
salias IO31 BSC18
salias IO29 BSC23
salias IO28 BSC24
salias IO27 BSC27
salias IO26 BSC28
salias IO25 BSC29
salias IO24 BSC31
salias IO21 BSC32
salias IO20 BSC34
salias IO19 BSC35
salias IO18 BSC36
salias IO16 BSC40
salias IO14 BSC45
salias IO12 BSC47
salias IO11 BSC49
salias IO9 BSC50
salias IO8 BSC51
salias IO6 BSC56
salias IO5 BSC59
salias IO4 BSC61
salias IN2 BSC62
salias IN1 BSC63

@ -0,0 +1,85 @@
#
# $Id$
#
# JTAG package script for EPM3064AT100
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
salias IN88 BSC0
salias IN87 BSC1
salias IO85 BSC2
salias IO84 BSC3
salias IO83 BSC4
salias IO81 BSC5
salias IO80 BSC6
salias IO79 BSC7
salias IO76 BSC8
salias IO75 BSC9
salias IO71 BSC10
salias IO69 BSC11
salias IO68 BSC12
salias IO67 BSC13
salias IO64 BSC15
salias IO63 BSC16
salias IO61 BSC17
salias IO60 BSC18
salias IO58 BSC19
salias IO57 BSC20
salias IO56 BSC21
salias IO54 BSC22
salias IO52 BSC23
salias IO48 BSC24
salias IO47 BSC25
salias IO46 BSC26
salias IO45 BSC27
salias IO44 BSC28
salias IO42 BSC29
salias IO41 BSC30
salias IO40 BSC31
salias IO37 BSC32
salias IO36 BSC33
salias IO35 BSC34
salias IO32 BSC36
salias IO31 BSC37
salias IO30 BSC38
salias IO29 BSC39
salias IO25 BSC40
salias IO23 BSC41
salias IO21 BSC42
salias IO20 BSC43
salias IO19 BSC44
salias IO17 BSC45
salias IO16 BSC46
salias IO14 BSC47
salias IO13 BSC48
salias IO12 BSC49
salias IO10 BSC50
salias IO9 BSC51
salias IO8 BSC52
salias IO6 BSC53
salias IO100 BSC54
salias IO99 BSC55
salias IO98 BSC56
salias IO97 BSC57
salias IO96 BSC58
salias IO94 BSC59
salias IO93 BSC60
salias IO92 BSC61
salias IN90 BSC62
salias IN89 BSC63

@ -0,0 +1,53 @@
#
# $Id$
#
# JTAG package script for EPM3064AT44
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Arnim Laeuger <arniml@users.sourceforge.net>
#
salias IN38 BSC0
salias IN37 BSC1
salias IO35 BSC2
salias IO34 BSC4
salias IO33 BSC9
salias IO31 BSC12
salias IO28 BSC14
salias IO27 BSC16
salias IO25 BSC18
salias IO23 BSC23
salias IO22 BSC24
salias IO21 BSC27
salias IO20 BSC28
salias IO19 BSC29
salias IO18 BSC31
salias IO15 BSC32
salias IO14 BSC34
salias IO13 BSC35
salias IO12 BSC36
salias IO10 BSC40
salias IO8 BSC45
salias IO6 BSC47
salias IO5 BSC49
salias IO3 BSC50
salias IO2 BSC51
salias IO44 BSC56
salias IO43 BSC59
salias IO42 BSC61
salias IN40 BSC62
salias IN39 BSC63

@ -0,0 +1,23 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
#
# bits 31-28 of the Device Identification Register
0001 epm7128aetc100 1

@ -0,0 +1,414 @@
#
# $Id$
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
#
signal tdi
signal tck
signal tms
signal tdo
signal IO1
signal IO2
signal IO5
signal IO6
signal IO7
signal IO8
signal IO9
signal IO10
signal IO12
signal IO13
signal IO14
signal IO16
signal IO17
signal IO19
signal IO20
signal IO21
signal IO22
signal IO23
signal IO24
signal IO25
signal IO27
signal IO28
signal IO29
signal IO30
signal IO31
signal IO32
signal IO33
signal IO35
signal IO36
signal IO37
signal IO40
signal IO41
signal IO42
signal IO44
signal IO45
signal IO46
signal IO47
signal IO48
signal IO49
signal IO50
signal IO52
signal IO53
signal IO54
signal IO55
signal IO56
signal IO57
signal IO58
signal IO60
signal IO61
signal IO63
signal IO64
signal IO65
signal IO67
signal IO68
signal IO69
signal IO70
signal IO71
signal IO72
signal IO75
signal IO76
signal IO77
signal IO78
signal IO79
signal IO80
signal IO81
signal IO83
signal IO84
signal IO85
signal IN87
signal IN88
signal IN89
signal IN90
signal IO92
signal IO93
signal IO94
signal IO96
signal IO97
signal IO98
signal IO99
signal IO100
# mandatory data registers
register BSR 288
register BR 1
# optional data registers
register DIR 32
# instructions
instruction length 10
# mandatory instructions
instruction EXTEST 0000000000 BSR
instruction SAMPLE/PRELOAD 0001010101 BSR
instruction BYPASS 1111111111 BR
instruction IDCODE 0001011001 DIR
instruction USERCODE 0000000111 DIR
bit 287 O 1 *
bit 286 O 1 *
bit 285 I 1 IN89
bit 284 O 1 *
bit 283 O 1 *
bit 282 I 1 IN90
bit 281 O 1 IO92 280 0 Z
bit 280 C 0 *
bit 279 I 1 IO92
bit 278 O 1 IO93 277 0 Z
bit 277 C 0 *
bit 276 I 1 IO93
bit 275 O 1 IO94 274 0 Z
bit 274 C 0 *
bit 273 I 1 IO94
bit 272 O 1 *
bit 271 O 0 *
bit 270 O 1 *
bit 269 O 1 IO96 268 0 Z
bit 268 C 0 *
bit 267 I 1 IO96
bit 266 O 1 IO97 265 0 Z
bit 265 C 0 *
bit 264 I 1 IO97
bit 263 O 1 IO98 262 0 Z
bit 262 C 0 *
bit 261 I 1 IO98
bit 260 O 1 IO99 259 0 Z
bit 259 C 0 *
bit 258 I 1 IO99
bit 257 O 1 IO100 256 0 Z
bit 256 C 0 *
bit 255 I 1 IO100
bit 254 O 1 *
bit 253 O 0 *
bit 252 O 1 *
bit 251 O 1 IO1 250 0 Z
bit 250 C 0 *
bit 249 I 1 IO1
bit 248 O 1 IO2 247 0 Z
bit 247 C 0 *
bit 246 I 1 IO2
bit 245 O 1 IO5 244 0 Z
bit 244 C 0 *
bit 243 I 1 IO5
bit 242 O 1 IO6 241 0 Z
bit 241 C 0 *
bit 240 I 1 IO6
bit 239 O 1 *
bit 238 O 0 *
bit 237 O 1 *
bit 236 O 1 IO7 235 0 Z
bit 235 C 0 *
bit 234 I 1 IO7
bit 233 O 1 IO8 232 0 Z
bit 232 C 0 *
bit 231 I 1 IO8
bit 230 O 1 IO9 229 0 Z
bit 229 C 0 *
bit 228 I 1 IO9
bit 227 O 1 IO10 226 0 Z
bit 226 C 0 *
bit 225 I 1 IO10
bit 224 O 1 IO12 223 0 Z
bit 223 C 0 *
bit 222 I 1 IO12
bit 221 O 1 *
bit 220 O 0 *
bit 219 O 1 *
bit 218 O 1 IO13 217 0 Z
bit 217 C 0 *
bit 216 I 1 IO13
bit 215 O 1 IO14 214 0 Z
bit 214 C 0 *
bit 213 I 1 IO14
bit 212 O 1 IO16 211 0 Z
bit 211 C 0 *
bit 210 I 1 IO16
bit 209 O 1 IO17 208 0 Z
bit 208 C 0 *
bit 207 I 1 IO17
bit 206 O 1 *
bit 205 O 0 *
bit 204 O 1 *
bit 203 O 1 IO19 202 0 Z
bit 202 C 0 *
bit 201 I 1 IO19
bit 200 O 1 IO20 199 0 Z
bit 199 C 0 *
bit 198 I 1 IO20
bit 197 O 1 IO21 196 0 Z
bit 196 C 0 *
bit 195 I 1 IO21
bit 194 O 1 IO22 193 0 Z
bit 193 C 0 *
bit 192 I 1 IO22
bit 191 O 1 IO23 190 0 Z
bit 190 C 0 *
bit 189 I 1 IO23
bit 188 O 1 *
bit 187 O 0 *
bit 186 O 1 *
bit 185 O 1 IO24 184 0 Z
bit 184 C 0 *
bit 183 I 1 IO24
bit 182 O 1 IO25 181 0 Z
bit 181 C 0 *
bit 180 I 1 IO25
bit 179 O 1 IO27 178 0 Z
bit 178 C 0 *
bit 177 I 1 IO27
bit 176 O 1 IO28 175 0 Z
bit 175 C 0 *
bit 174 I 1 IO28
bit 173 O 1 IO29 172 0 Z
bit 172 C 0 *
bit 171 I 1 IO29
bit 170 O 1 *
bit 169 O 0 *
bit 168 O 1 *
bit 167 O 1 IO30 166 0 Z
bit 166 C 0 *
bit 165 I 1 IO30
bit 164 O 1 IO31 163 0 Z
bit 163 C 0 *
bit 162 I 1 IO31
bit 161 O 1 IO32 160 0 Z
bit 160 C 0 *
bit 159 I 1 IO32
bit 158 O 1 IO33 157 0 Z
bit 157 C 0 *
bit 156 I 1 IO33
bit 155 O 1 IO35 154 0 Z
bit 154 C 0 *
bit 153 I 1 IO35
bit 152 O 1 *
bit 151 O 0 *
bit 150 O 1 *
bit 149 O 1 IO36 148 0 Z
bit 148 C 0 *
bit 147 I 1 IO36
bit 146 O 1 IO37 145 0 Z
bit 145 C 0 *
bit 144 I 1 IO37
bit 143 O 1 IO40 142 0 Z
bit 142 C 0 *
bit 141 I 1 IO40
bit 140 O 1 IO41 139 0 Z
bit 139 C 0 *
bit 138 I 1 IO41
bit 137 O 1 *
bit 136 O 0 *
bit 135 O 1 *
bit 134 O 1 IO42 133 0 Z
bit 133 C 0 *
bit 132 I 1 IO42
bit 131 O 1 IO44 130 0 Z
bit 130 C 0 *
bit 129 I 1 IO44
bit 128 O 1 IO45 127 0 Z
bit 127 C 0 *
bit 126 I 1 IO45
bit 125 O 1 IO46 124 0 Z
bit 124 C 0 *
bit 123 I 1 IO46
bit 122 O 1 IO47 121 0 Z
bit 121 C 0 *
bit 120 I 1 IO47
bit 119 O 1 *
bit 118 O 0 *
bit 117 O 1 *
bit 116 O 1 IO48 115 0 Z
bit 115 C 0 *
bit 114 I 1 IO48
bit 113 O 1 IO49 112 0 Z
bit 112 C 0 *
bit 111 I 1 IO49
bit 110 O 1 IO50 109 0 Z
bit 109 C 0 *
bit 108 I 1 IO50
bit 107 O 1 IO52 106 0 Z
bit 106 C 0 *
bit 105 I 1 IO52
bit 104 O 1 IO53 103 0 Z
bit 103 C 0 *
bit 102 I 1 IO53
bit 101 O 1 *
bit 100 O 0 *
bit 99 O 1 *
bit 98 O 1 IO54 97 0 Z
bit 97 C 0 *
bit 96 I 1 IO54
bit 95 O 1 IO55 94 0 Z
bit 94 C 0 *
bit 93 I 1 IO55
bit 92 O 1 IO56 91 0 Z
bit 91 C 0 *
bit 90 I 1 IO56
bit 89 O 1 IO57 88 0 Z
bit 88 C 0 *
bit 87 I 1 IO57
bit 86 O 1 IO58 85 0 Z
bit 85 C 0 *
bit 84 I 1 IO58
bit 83 O 1 *
bit 82 O 0 *
bit 81 O 1 *
bit 80 O 1 IO60 79 0 Z
bit 79 C 0 *
bit 78 I 1 IO60
bit 77 O 1 IO61 76 0 Z
bit 76 C 0 *
bit 75 I 1 IO61
bit 74 O 1 IO63 73 0 Z
bit 73 C 0 *
bit 72 I 1 IO63
bit 71 O 1 IO64 70 0 Z
bit 70 C 0 *
bit 69 I 1 IO64
bit 68 O 1 *
bit 67 O 0 *
bit 66 O 1 *
bit 65 O 1 IO65 64 0 Z
bit 64 C 0 *
bit 63 I 1 IO65
bit 62 O 1 IO67 61 0 Z
bit 61 C 0 *
bit 60 I 1 IO67
bit 59 O 1 IO68 58 0 Z
bit 58 C 0 *
bit 57 I 1 IO68
bit 56 O 1 IO69 55 0 Z
bit 55 C 0 *
bit 54 I 1 IO69
bit 53 O 1 IO70 52 0 Z
bit 52 C 0 *
bit 51 I 1 IO70
bit 50 O 1 *
bit 49 O 0 *
bit 48 O 1 *
bit 47 O 1 IO71 46 0 Z
bit 46 C 0 *
bit 45 I 1 IO71
bit 44 O 1 IO72 43 0 Z
bit 43 C 0 *
bit 42 I 1 IO72
bit 41 O 1 IO75 40 0 Z
bit 40 C 0 *
bit 39 I 1 IO75
bit 38 O 1 IO76 37 0 Z
bit 37 C 0 *
bit 36 I 1 IO76
bit 35 O 1 *
bit 34 O 0 *
bit 33 O 1 *
bit 32 O 1 IO77 31 0 Z
bit 31 C 0 *
bit 30 I 1 IO77
bit 29 O 1 IO78 28 0 Z
bit 28 C 0 *
bit 27 I 1 IO78
bit 26 O 1 IO79 25 0 Z
bit 25 C 0 *
bit 24 I 1 IO79
bit 23 O 1 IO80 22 0 Z
bit 22 C 0 *
bit 21 I 1 IO80
bit 20 O 1 IO81 19 0 Z
bit 19 C 0 *
bit 18 I 1 IO81
bit 17 O 1 *
bit 16 O 0 *
bit 15 O 1 *
bit 14 O 1 IO83 13 0 Z
bit 13 C 0 *
bit 12 I 1 IO83
bit 11 O 1 IO84 10 0 Z
bit 10 C 0 *
bit 9 I 1 IO84
bit 8 O 1 IO85 7 0 Z
bit 7 C 0 *
bit 6 I 1 IO85
bit 5 O 1 *
bit 4 O 1 *
bit 3 I 1 IN87
bit 2 O 1 *
bit 1 O 1 *
bit 0 I 1 IN88

@ -0,0 +1,33 @@
#
# $Id: PARTS,v 1.1.1.1 2005/03/18 15:02:50 klingler Exp $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 27-12 of the Device Identification Register
0010011110100111 sharc21065l SHARC
0010011111101000 bf518 BF518
0010011111100100 bf527 BF526
0010011111100000 bf527 BF527
0010011110100101 bf533 BF533
0010011111000110 bf537 BF534
0010011111001000 bf537 BF537
0010011111000100 bf538 BF538
0010011111011110 bf548 BF548
0010011111101010 bf548 BF548M
0010011110111011 bf561 BF561

@ -0,0 +1,22 @@
#
# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
#
# bits 31-28 of the Device Identification Register
0000 bf518 0

@ -0,0 +1,545 @@
signal ADDR1
signal ADDR2
signal ADDR3
signal ADDR4
signal ADDR5
signal ADDR6
signal ADDR7
signal ADDR8
signal ADDR9
signal ADDR10
signal ADDR11
signal ADDR12
signal ADDR13
signal ADDR14
signal ADDR15
signal ADDR16
signal ADDR17
signal ADDR18
signal ADDR19
signal DATA0
signal DATA1
signal DATA2
signal DATA3
signal DATA4
signal DATA5
signal DATA6
signal DATA7
signal DATA8
signal DATA9
signal DATA10
signal DATA11
signal DATA12
signal DATA13
signal DATA14
signal DATA15
signal PF0
signal PF1
signal PF2
signal PF3
signal PF4
signal PF5
signal PF6
signal PF7
signal PF8
signal PF9
signal PF10
signal PF11
signal PF12
signal PF13
signal PF14
signal PF15
signal PG0
signal PG1
signal PG2
signal PG3
signal PG4
signal PG5
signal PG6
signal PG7
signal PG8
signal PG9
signal PG10
signal PG11
signal PG12
signal PG13
signal PG14
signal PG15
signal PH0
signal PH1
signal PH2
signal PH3
signal PH4
signal PH5
signal PH6
signal PH7
signal PH8
signal PH9
signal PH10
signal PH11
signal PH12
signal PH13
signal PH14
signal PH15
signal BMODE0
signal BMODE1
signal BMODE2
signal BMODE3
signal PJ1
signal PJ0
signal PJ2
signal PJ3
signal NMI_B
signal RESET_B
signal CLKOUT
signal AMS_B0
signal AMS_B1
signal AMS_B2
signal AMS_B3
signal AOE_B
signal ARE_B
signal AWE_B
signal ARDY
signal SCKE
signal SMS_B
signal SRAS_B
signal SCAS_B
signal SWE_B
signal SA10
signal ABE_B0
signal ABE_B1
signal TCK
signal TDI
signal TDO
signal TMS
signal TRST_B
signal GND0
signal GND1
signal GND2
signal GND3
signal GND4
signal GND5
signal GND6
signal GND7
signal GND8
signal GND9
signal GND10
signal GND11
signal GND12
signal GND13
signal GND14
signal GND15
signal GND16
signal GND17
signal GND18
signal GND19
signal GND20
signal GND21
signal GND22
signal GND23
signal GND24
signal GND25
signal GND26
signal GND27
signal GND28
signal GND29
signal GND30
signal GND31
signal GND32
signal GND33
signal GND34
signal GND35
signal GND36
signal GND37
signal GND38
signal GND39
signal GND40
signal GND41
signal GND42
signal GND43
signal GND44
signal GND45
signal GND46
signal GND47
signal GND48
signal GND49
signal GND50
signal GND51
signal GND52
signal GND53
signal GND54
signal VDDOTP
signal OTPVPP
signal USB_ID
signal USB_RSET
signal VDDUSB0
signal VDDUSB1
signal USB_VREF
signal USB_XTALIN
signal USB_XTALOUT
signal VDDEXT0
signal VDDEXT1
signal VDDEXT2
signal VDDEXT3
signal VDDEXT4
signal VDDEXT5
signal VDDEXT6
signal VDDEXT7
signal VDDEXT8
signal VDDEXT9
signal VDDEXT10
signal VDDEXT11
signal VDDEXT12
signal VDDEXT13
signal VDDEXT14
signal VDDEXT15
signal VDDEXT16
signal VDDEXT17
signal VDDEXT18
signal VDDEXT19
signal RTXI
signal RTXO
signal SSPG
signal CLKIN
signal VROUT
signal EXT_WAKE
signal USB_DM
signal USB_DP
signal USB_VBUS
signal CLKBUF
signal VDDRTC
signal VDDMEM0
signal VDDMEM1
signal VDDMEM2
signal VDDMEM3
signal VDDMEM4
signal VDDMEM5
signal VDDMEM6
signal VDDMEM7
signal VDDMEM8
signal VDDMEM9
signal VDDMEM10
signal VDDMEM11
signal VDDMEM12
signal VDDMEM13
signal VDDMEM14
signal VDDMEM15
signal VDDMEM16
signal VDDMEM17
signal VDDINT0
signal VDDINT1
signal VDDINT2
signal VDDINT3
signal VDDINT4
signal VDDINT5
signal VDDINT6
signal VDDINT7
signal VDDINT8
signal VDDINT9
signal VDDINT10
signal VDDINT11
signal VDDINT12
signal VDDINT13
signal VDDINT14
signal VDDINT15
signal VDDINT16
signal VDDINT17
signal VDDINT18
signal VDDINT19
signal VDDINT20
signal VDDINT21
signal VDDINT22
signal VDDINT23
signal VDDINT24
signal VDDINT25
signal VDDINT26
signal VDDINT27
signal VDDINT28
signal VDDINT29
signal VDDINT30
signal VDDINT31
signal VDDINT32
signal VRSEL
signal XTAL
signal ADCLRC
signal ADCDAT
signal DACLRC
signal DACDAT
signal BCLK
signal XTO
signal XTI_MCLK
signal LHPOUT
signal RHPOUT
signal CSCL
signal CSDA
signal CCLKOUT
signal CSB
signal CMODE
signal LLINEIN
signal LOUT
signal RLINEIN
signal ROUT
signal VMID
signal MICBIAS
signal MICIN
signal AVDD0
signal AVDD1
signal AGND0
signal AGND1
register BSR 233
register BR 1
register DIR 32
register DBGSTAT 16
register DBGCTL 16
register EMUIR 32
register EMUIR64 64
register EMUDAT 32
register EMUPC 32
instruction length 5
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
instruction IDCODE 00010 DIR
instruction BYPASS 11111 BR
instruction DBGSTAT_SCAN 01100 DBGSTAT
instruction DBGCTL_SCAN 00100 DBGCTL
instruction EMUIR_SCAN 01000 EMUIR
instruction EMUIR64_SCAN 01000 EMUIR64
instruction EMUDAT_SCAN 10100 EMUDAT
instruction EMUPC_SCAN 11110 EMUPC
bit 232 C 0 *
bit 231 O 1 ADDR14 8 0 Z
bit 230 O 1 ADDR15 8 0 Z
bit 229 O 1 ADDR16 8 0 Z
bit 228 O 1 ADDR17 8 0 Z
bit 227 O 1 ADDR18 8 0 Z
bit 226 O 1 ADDR19 8 0 Z
bit 225 O 1 DATA0 232 0 Z
bit 224 I 1 DATA0
bit 223 O 1 DATA1 232 0 Z
bit 222 I 1 DATA1
bit 221 O 1 DATA2 232 0 Z
bit 220 I 1 DATA2
bit 219 O 1 DATA3 232 0 Z
bit 218 I 1 DATA3
bit 217 O 1 DATA4 232 0 Z
bit 216 I 1 DATA4
bit 215 O 1 DATA5 232 0 Z
bit 214 I 1 DATA5
bit 213 O 1 DATA6 232 0 Z
bit 212 I 1 DATA6
bit 211 O 1 DATA7 232 0 Z
bit 210 I 1 DATA7
bit 209 O 1 DATA8 232 0 Z
bit 208 I 1 DATA8
bit 207 O 1 DATA9 232 0 Z
bit 206 I 1 DATA9
bit 205 O 1 DATA10 232 0 Z
bit 204 I 1 DATA10
bit 203 O 1 DATA11 232 0 Z
bit 202 I 1 DATA11
bit 201 O 1 DATA12 232 0 Z
bit 200 I 1 DATA12
bit 199 O 1 DATA13 232 0 Z
bit 198 I 1 DATA13
bit 197 O 1 DATA14 232 0 Z
bit 196 I 1 DATA14
bit 195 O 1 DATA15 232 0 Z
bit 194 I 1 DATA15
bit 193 C 0 *
bit 192 O 1 PG0 193 0 Z
bit 191 I 1 PG0
bit 190 C 0 *
bit 189 O 1 PG1 190 0 Z
bit 188 I 1 PG1
bit 187 C 0 *
bit 186 O 1 PG2 187 0 Z
bit 185 I 1 PG2
bit 184 C 0 *
bit 183 O 1 PG3 184 0 Z
bit 182 I 1 PG3
bit 181 I 1 BMODE0
bit 180 I 1 BMODE1
bit 179 I 1 BMODE2
bit 178 I 1 BMODE3
bit 177 C 0 *
bit 176 O 1 PG4 177 0 Z
bit 175 I 1 PG4
bit 174 C 0 *
bit 173 O 1 PG5 174 0 Z
bit 172 I 1 PG5
bit 171 C 0 *
bit 170 O 1 PG6 171 0 Z
bit 169 I 1 PG6
bit 168 C 0 *
bit 167 O 1 PG7 168 0 Z
bit 166 I 1 PG7
bit 165 C 0 *
bit 164 O 1 PG8 165 0 Z
bit 163 I 1 PG8
bit 162 C 0 *
bit 161 O 1 PG9 162 0 Z
bit 160 I 1 PG9
bit 159 C 0 *
bit 158 O 1 PG10 159 0 Z
bit 157 I 1 PG10
bit 156 C 0 *
bit 155 O 1 PG11 156 0 Z
bit 154 I 1 PG11
bit 153 C 0 *
bit 152 O 1 PG12 153 0 Z
bit 151 I 1 PG12
bit 150 C 0 *
bit 149 O 1 PG13 150 0 Z
bit 148 I 1 PG13
bit 147 C 0 *
bit 146 O 1 PG14 147 0 Z
bit 145 I 1 PG14
bit 144 C 0 *
bit 143 O 1 PG15 144 0 Z
bit 142 I 1 PG15
bit 141 I 1 PJ1
bit 140 C 0 *
bit 139 O 1 PJ0 140 0 Z
bit 138 I 1 PJ0
bit 137 C 0 *
bit 136 O 1 PF0 137 0 Z
bit 135 I 1 PF0
bit 134 C 0 *
bit 133 O 1 PF1 134 0 Z
bit 132 I 1 PF1
bit 131 C 0 *
bit 130 O 1 PF2 131 0 Z
bit 129 I 1 PF2
bit 128 C 0 *
bit 127 O 1 PF3 128 0 Z
bit 126 I 1 PF3
bit 125 C 0 *
bit 124 O 1 PF4 125 0 Z
bit 123 I 1 PF4
bit 122 C 0 *
bit 121 O 1 PF5 122 0 Z
bit 120 I 1 PF5
bit 119 C 0 *
bit 118 O 1 PF6 119 0 Z
bit 117 I 1 PF6
bit 116 C 0 *
bit 115 O 1 PF7 116 0 Z
bit 114 I 1 PF7
bit 113 C 0 *
bit 112 O 1 PF8 113 0 Z
bit 111 I 1 PF8
bit 110 C 0 *
bit 109 O 1 PF9 110 0 Z
bit 108 I 1 PF9
bit 107 C 0 *
bit 106 O 1 PF10 107 0 Z
bit 105 I 1 PF10
bit 104 C 0 *
bit 103 O 1 PF11 104 0 Z
bit 102 I 1 PF11
bit 101 O 1 *
bit 100 O 1 PJ2 100 1 Z
bit 99 I 1 PJ2
bit 98 O 1 *
bit 97 O 1 PJ3 97 1 Z
bit 96 I 1 PJ3
bit 95 C 0 *
bit 94 O 1 PF12 95 0 Z
bit 93 I 1 PF12
bit 92 C 0 *
bit 91 O 1 PF13 92 0 Z
bit 90 I 1 PF13
bit 89 C 0 *
bit 88 O 1 PF14 89 0 Z
bit 87 I 1 PF14
bit 86 C 0 *
bit 85 O 1 PF15 86 0 Z
bit 84 I 1 PF15
bit 83 C 0 *
bit 82 O 1 PH0 83 0 Z
bit 81 I 1 PH0
bit 80 C 0 *
bit 79 O 1 PH1 80 0 Z
bit 78 I 1 PH1
bit 77 C 0 *
bit 76 O 1 PH2 77 0 Z
bit 75 I 1 PH2
bit 74 C 0 *
bit 73 O 1 PH3 74 0 Z
bit 72 I 1 PH3
bit 71 C 0 *
bit 70 O 1 PH4 71 0 Z
bit 69 I 1 PH4
bit 68 C 0 *
bit 67 O 1 PH5 68 0 Z
bit 66 I 1 PH5
bit 65 C 0 *
bit 64 O 1 PH6 65 0 Z
bit 63 I 1 PH6
bit 62 C 0 *
bit 61 O 1 PH7 62 0 Z
bit 60 I 1 PH7
bit 59 C 0 *
bit 58 O 1 PH8 59 0 Z
bit 57 I 1 PH8
bit 56 O 0 *
bit 55 C 0 *
bit 54 O 1 PH9 55 0 Z
bit 53 I 1 PH9
bit 52 C 0 *
bit 51 O 1 PH10 52 0 Z
bit 50 I 1 PH10
bit 49 C 0 *
bit 48 O 1 PH11 49 0 Z
bit 47 I 1 PH11
bit 46 C 0 *
bit 45 O 1 PH12 46 0 Z
bit 44 I 1 PH12
bit 43 C 0 *
bit 42 O 1 PH13 43 0 Z
bit 41 I 1 PH13
bit 40 C 0 *
bit 39 O 1 PH14 40 0 Z
bit 38 I 1 PH14
bit 37 C 0 *
bit 36 O 1 PH15 37 0 Z
bit 35 I 1 PH15
bit 34 I 1 NMI_B
bit 33 I 1 RESET_B
bit 32 C 0 *
bit 31 O 1 CLKOUT 32 0 Z
bit 30 O 1 AMS_B0 25 0 Z
bit 29 O 1 AMS_B1 25 0 Z
bit 28 O 1 AMS_B2 25 0 Z
bit 27 O 1 AMS_B3 25 0 Z
bit 26 O 1 AOE_B 25 0 Z
bit 25 C 0 *
bit 24 O 1 ARE_B 25 0 Z
bit 23 O 1 AWE_B 25 0 Z
bit 22 I 1 ARDY
bit 21 O 1 SCKE 32 0 Z
bit 20 O 1 SMS_B 32 0 Z
bit 19 O 1 SRAS_B 32 0 Z
bit 18 O 1 SCAS_B 32 0 Z
bit 17 O 1 SWE_B 32 0 Z
bit 16 O 1 SA10 32 0 Z
bit 15 O 1 ABE_B0 8 0 Z
bit 14 O 1 ABE_B1 8 0 Z
bit 13 O 1 ADDR1 8 0 Z
bit 12 O 1 ADDR2 8 0 Z
bit 11 O 1 ADDR3 8 0 Z
bit 10 O 1 ADDR4 8 0 Z
bit 9 O 1 ADDR5 8 0 Z
bit 8 C 0 *
bit 7 O 1 ADDR6 8 0 Z
bit 6 O 1 ADDR7 8 0 Z
bit 5 O 1 ADDR8 8 0 Z
bit 4 O 1 ADDR9 8 0 Z
bit 3 O 1 ADDR10 8 0 Z
bit 2 O 1 ADDR11 8 0 Z
bit 1 O 1 ADDR12 8 0 Z
bit 0 O 1 ADDR13 8 0 Z

@ -0,0 +1,24 @@
#
# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
#
# bits 31-28 of the Device Identification Register
0000 bf527 0
0001 bf527 1
0010 bf527 2

@ -0,0 +1,533 @@
signal ADDR1
signal ADDR2
signal ADDR3
signal ADDR4
signal ADDR5
signal ADDR6
signal ADDR7
signal ADDR8
signal ADDR9
signal ADDR10
signal ADDR11
signal ADDR12
signal ADDR13
signal ADDR14
signal ADDR15
signal ADDR16
signal ADDR17
signal ADDR18
signal ADDR19
signal DATA0
signal DATA1
signal DATA2
signal DATA3
signal DATA4
signal DATA5
signal DATA6
signal DATA7
signal DATA8
signal DATA9
signal DATA10
signal DATA11
signal DATA12
signal DATA13
signal DATA14
signal DATA15
signal PF0
signal PF1
signal PF2
signal PF3
signal PF4
signal PF5
signal PF6
signal PF7
signal PF8
signal PF9
signal PF10
signal PF11
signal PF12
signal PF13
signal PF14
signal PF15
signal PG0
signal PG1
signal PG2
signal PG3
signal PG4
signal PG5
signal PG6
signal PG7
signal PG8
signal PG9
signal PG10
signal PG11
signal PG12
signal PG13
signal PG14
signal PG15
signal PH0
signal PH1
signal PH2
signal PH3
signal PH4
signal PH5
signal PH6
signal PH7
signal PH8
signal PH9
signal PH10
signal PH11
signal PH12
signal PH13
signal PH14
signal PH15
signal BMODE0
signal BMODE1
signal BMODE2
signal BMODE3
signal PJ1
signal PJ0
signal PJ2
signal PJ3
signal NMI_B
signal RESET_B
signal CLKOUT
signal AMS_B0
signal AMS_B1
signal AMS_B2
signal AMS_B3
signal AOE_B
signal ARE_B
signal AWE_B
signal ARDY
signal SCKE
signal SMS_B
signal SRAS_B
signal SCAS_B
signal SWE_B
signal SA10
signal ABE_B0
signal ABE_B1
signal TCK
signal TDI
signal TDO
signal TMS
signal TRST_B
signal GND0
signal GND1
signal GND2
signal GND3
signal GND4
signal GND5
signal GND6
signal GND7
signal GND8
signal GND9
signal GND10
signal GND11
signal GND12
signal GND13
signal GND14
signal GND15
signal GND16
signal GND17
signal GND18
signal GND19
signal GND20
signal GND21
signal GND22
signal GND23
signal GND24
signal GND25
signal GND26
signal GND27
signal GND28
signal GND29
signal GND30
signal GND31
signal GND32
signal GND33
signal GND34
signal GND35
signal GND36
signal GND37
signal GND38
signal GND39
signal GND40
signal GND41
signal GND42
signal GND43
signal GND44
signal GND45
signal GND46
signal GND47
signal GND48
signal GND49
signal GND50
signal GND51
signal GND52
signal GND53
signal GND54
signal VDDOTP
signal OTPVPP
signal USB_ID
signal USB_RSET
signal VDDUSB0
signal VDDUSB1
signal USB_VREF
signal USB_XTALIN
signal USB_XTALOUT
signal VDDEXT0
signal VDDEXT1
signal VDDEXT2
signal VDDEXT3
signal VDDEXT4
signal VDDEXT5
signal VDDEXT6
signal VDDEXT7
signal VDDEXT8
signal VDDEXT9
signal VDDEXT10
signal VDDEXT11
signal VDDEXT12
signal VDDEXT13
signal VDDEXT14
signal VDDEXT15
signal VDDEXT16
signal VDDEXT17
signal VDDEXT18
signal VDDEXT19
signal RTXI
signal RTXO
signal SSPG
signal CLKIN
signal VROUT
signal EXT_WAKE
signal USB_DM
signal USB_DP
signal USB_VBUS
signal CLKBUF
signal VDDRTC
signal VDDMEM0
signal VDDMEM1
signal VDDMEM2
signal VDDMEM3
signal VDDMEM4
signal VDDMEM5
signal VDDMEM6
signal VDDMEM7
signal VDDMEM8
signal VDDMEM9
signal VDDMEM10
signal VDDMEM11
signal VDDMEM12
signal VDDMEM13
signal VDDMEM14
signal VDDMEM15
signal VDDMEM16
signal VDDMEM17
signal VDDINT0
signal VDDINT1
signal VDDINT2
signal VDDINT3
signal VDDINT4
signal VDDINT5
signal VDDINT6
signal VDDINT7
signal VDDINT8
signal VDDINT9
signal VDDINT10
signal VDDINT11
signal VDDINT12
signal VDDINT13
signal VDDINT14
signal VDDINT15
signal VDDINT16
signal VDDINT17
signal VDDINT18
signal VDDINT19
signal VDDINT20
signal VDDINT21
signal VDDINT22
signal VDDINT23
signal VDDINT24
signal VDDINT25
signal VDDINT26
signal VDDINT27
signal VDDINT28
signal VDDINT29
signal VDDINT30
signal VDDINT31
signal VDDINT32
signal VRSEL
signal XTAL
signal ADCLRC
signal ADCDAT
signal DACLRC
signal DACDAT
signal BCLK
signal XTO
signal XTI_MCLK
signal LHPOUT
signal RHPOUT
signal CSCL
signal CSDA
signal CCLKOUT
signal CSB
signal CMODE
signal LLINEIN
signal LOUT
signal RLINEIN
signal ROUT
signal VMID
signal MICBIAS
signal MICIN
signal AVDD0
signal AVDD1
signal AGND0
signal AGND1
register BSR 233
register BR 1
register DIR 32
instruction length 5
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
instruction IDCODE 00010 DIR
instruction BYPASS 11111 BR
bit 232 C 0 *
bit 231 O 1 ADDR14 8 0 Z
bit 230 O 1 ADDR15 8 0 Z
bit 229 O 1 ADDR16 8 0 Z
bit 228 O 1 ADDR17 8 0 Z
bit 227 O 1 ADDR18 8 0 Z
bit 226 O 1 ADDR19 8 0 Z
bit 225 O 1 DATA0 232 0 Z
bit 224 I 1 DATA0
bit 223 O 1 DATA1 232 0 Z
bit 222 I 1 DATA1
bit 221 O 1 DATA2 232 0 Z
bit 220 I 1 DATA2
bit 219 O 1 DATA3 232 0 Z
bit 218 I 1 DATA3
bit 217 O 1 DATA4 232 0 Z
bit 216 I 1 DATA4
bit 215 O 1 DATA5 232 0 Z
bit 214 I 1 DATA5
bit 213 O 1 DATA6 232 0 Z
bit 212 I 1 DATA6
bit 211 O 1 DATA7 232 0 Z
bit 210 I 1 DATA7
bit 209 O 1 DATA8 232 0 Z
bit 208 I 1 DATA8
bit 207 O 1 DATA9 232 0 Z
bit 206 I 1 DATA9
bit 205 O 1 DATA10 232 0 Z
bit 204 I 1 DATA10
bit 203 O 1 DATA11 232 0 Z
bit 202 I 1 DATA11
bit 201 O 1 DATA12 232 0 Z
bit 200 I 1 DATA12
bit 199 O 1 DATA13 232 0 Z
bit 198 I 1 DATA13
bit 197 O 1 DATA14 232 0 Z
bit 196 I 1 DATA14
bit 195 O 1 DATA15 232 0 Z
bit 194 I 1 DATA15
bit 193 C 0 *
bit 192 O 1 PG0 193 0 Z
bit 191 I 1 PG0
bit 190 C 0 *
bit 189 O 1 PG1 190 0 Z
bit 188 I 1 PG1
bit 187 C 0 *
bit 186 O 1 PG2 187 0 Z
bit 185 I 1 PG2
bit 184 C 0 *
bit 183 O 1 PG3 184 0 Z
bit 182 I 1 PG3
bit 181 I 1 BMODE0
bit 180 I 1 BMODE1
bit 179 I 1 BMODE2
bit 178 I 1 BMODE3
bit 177 C 0 *
bit 176 O 1 PG4 177 0 Z
bit 175 I 1 PG4
bit 174 C 0 *
bit 173 O 1 PG5 174 0 Z
bit 172 I 1 PG5
bit 171 C 0 *
bit 170 O 1 PG6 171 0 Z
bit 169 I 1 PG6
bit 168 C 0 *
bit 167 O 1 PG7 168 0 Z
bit 166 I 1 PG7
bit 165 C 0 *
bit 164 O 1 PG8 165 0 Z
bit 163 I 1 PG8
bit 162 C 0 *
bit 161 O 1 PG9 162 0 Z
bit 160 I 1 PG9
bit 159 C 0 *
bit 158 O 1 PG10 159 0 Z
bit 157 I 1 PG10
bit 156 C 0 *
bit 155 O 1 PG11 156 0 Z
bit 154 I 1 PG11
bit 153 C 0 *
bit 152 O 1 PG12 153 0 Z
bit 151 I 1 PG12
bit 150 C 0 *
bit 149 O 1 PG13 150 0 Z
bit 148 I 1 PG13
bit 147 C 0 *
bit 146 O 1 PG14 147 0 Z
bit 145 I 1 PG14
bit 144 C 0 *
bit 143 O 1 PG15 144 0 Z
bit 142 I 1 PG15
bit 141 I 1 PJ1
bit 140 C 0 *
bit 139 O 1 PJ0 140 0 Z
bit 138 I 1 PJ0
bit 137 C 0 *
bit 136 O 1 PF0 137 0 Z
bit 135 I 1 PF0
bit 134 C 0 *
bit 133 O 1 PF1 134 0 Z
bit 132 I 1 PF1
bit 131 C 0 *
bit 130 O 1 PF2 131 0 Z
bit 129 I 1 PF2
bit 128 C 0 *
bit 127 O 1 PF3 128 0 Z
bit 126 I 1 PF3
bit 125 C 0 *
bit 124 O 1 PF4 125 0 Z
bit 123 I 1 PF4
bit 122 C 0 *
bit 121 O 1 PF5 122 0 Z
bit 120 I 1 PF5
bit 119 C 0 *
bit 118 O 1 PF6 119 0 Z
bit 117 I 1 PF6
bit 116 C 0 *
bit 115 O 1 PF7 116 0 Z
bit 114 I 1 PF7
bit 113 C 0 *
bit 112 O 1 PF8 113 0 Z
bit 111 I 1 PF8
bit 110 C 0 *
bit 109 O 1 PF9 110 0 Z
bit 108 I 1 PF9
bit 107 C 0 *
bit 106 O 1 PF10 107 0 Z
bit 105 I 1 PF10
bit 104 C 0 *
bit 103 O 1 PF11 104 0 Z
bit 102 I 1 PF11
bit 101 O 1 *
bit 100 O 1 PJ2 100 1 Z
bit 99 I 1 PJ2
bit 98 O 1 *
bit 97 O 1 PJ3 97 1 Z
bit 96 I 1 PJ3
bit 95 C 0 *
bit 94 O 1 PF12 95 0 Z
bit 93 I 1 PF12
bit 92 C 0 *
bit 91 O 1 PF13 92 0 Z
bit 90 I 1 PF13
bit 89 C 0 *
bit 88 O 1 PF14 89 0 Z
bit 87 I 1 PF14
bit 86 C 0 *
bit 85 O 1 PF15 86 0 Z
bit 84 I 1 PF15
bit 83 C 0 *
bit 82 O 1 PH0 83 0 Z
bit 81 I 1 PH0
bit 80 C 0 *
bit 79 O 1 PH1 80 0 Z
bit 78 I 1 PH1
bit 77 C 0 *
bit 76 O 1 PH2 77 0 Z
bit 75 I 1 PH2
bit 74 C 0 *
bit 73 O 1 PH3 74 0 Z
bit 72 I 1 PH3
bit 71 C 0 *
bit 70 O 1 PH4 71 0 Z
bit 69 I 1 PH4
bit 68 C 0 *
bit 67 O 1 PH5 68 0 Z
bit 66 I 1 PH5
bit 65 C 0 *
bit 64 O 1 PH6 65 0 Z
bit 63 I 1 PH6
bit 62 C 0 *
bit 61 O 1 PH7 62 0 Z
bit 60 I 1 PH7
bit 59 C 0 *
bit 58 O 1 PH8 59 0 Z
bit 57 I 1 PH8
bit 56 O 0 *
bit 55 C 0 *
bit 54 O 1 PH9 55 0 Z
bit 53 I 1 PH9
bit 52 C 0 *
bit 51 O 1 PH10 52 0 Z
bit 50 I 1 PH10
bit 49 C 0 *
bit 48 O 1 PH11 49 0 Z
bit 47 I 1 PH11
bit 46 C 0 *
bit 45 O 1 PH12 46 0 Z
bit 44 I 1 PH12
bit 43 C 0 *
bit 42 O 1 PH13 43 0 Z
bit 41 I 1 PH13
bit 40 C 0 *
bit 39 O 1 PH14 40 0 Z
bit 38 I 1 PH14
bit 37 C 0 *
bit 36 O 1 PH15 37 0 Z
bit 35 I 1 PH15
bit 34 I 1 NMI_B
bit 33 I 1 RESET_B
bit 32 C 0 *
bit 31 O 1 CLKOUT 32 0 Z
bit 30 O 1 AMS_B0 25 0 Z
bit 29 O 1 AMS_B1 25 0 Z
bit 28 O 1 AMS_B2 25 0 Z
bit 27 O 1 AMS_B3 25 0 Z
bit 26 O 1 AOE_B 25 0 Z
bit 25 C 0 *
bit 24 O 1 ARE_B 25 0 Z
bit 23 O 1 AWE_B 25 0 Z
bit 22 I 1 ARDY
bit 21 O 1 SCKE 32 0 Z
bit 20 O 1 SMS_B 32 0 Z
bit 19 O 1 SRAS_B 32 0 Z
bit 18 O 1 SCAS_B 32 0 Z
bit 17 O 1 SWE_B 32 0 Z
bit 16 O 1 SA10 32 0 Z
bit 15 O 1 ABE_B0 8 0 Z
bit 14 O 1 ABE_B1 8 0 Z
bit 13 O 1 ADDR1 8 0 Z
bit 12 O 1 ADDR2 8 0 Z
bit 11 O 1 ADDR3 8 0 Z
bit 10 O 1 ADDR4 8 0 Z
bit 9 O 1 ADDR5 8 0 Z
bit 8 C 0 *
bit 7 O 1 ADDR6 8 0 Z
bit 6 O 1 ADDR7 8 0 Z
bit 5 O 1 ADDR8 8 0 Z
bit 4 O 1 ADDR9 8 0 Z
bit 3 O 1 ADDR10 8 0 Z
bit 2 O 1 ADDR11 8 0 Z
bit 1 O 1 ADDR12 8 0 Z
bit 0 O 1 ADDR13 8 0 Z

@ -0,0 +1,29 @@
#
# $Id: STEPPINGS,v 1.3 2005/07/08 15:05:41 rgetz Exp $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 31-28 of the Device Identification Register
0000 bf533 0
0001 bf533 1
0010 bf533 2
0011 bf533 3
0100 bf533 4
0101 bf533 5
0110 bf533 6

@ -0,0 +1,368 @@
signal ADDR[1]
signal ADDR[2]
signal ADDR[3]
signal ADDR[4]
signal ADDR[5]
signal ADDR[6]
signal ADDR[7]
signal ADDR[8]
signal ADDR[9]
signal ADDR[10]
signal ADDR[11]
signal ADDR[12]
signal ADDR[13]
signal ADDR[14]
signal ADDR[15]
signal ADDR[16]
signal ADDR[17]
signal ADDR[18]
signal ADDR[19]
signal AMS_B0
signal AMS_B1
signal AMS_B2
signal AMS_B3
signal AOE_B
signal ARDY
signal ARE_B
signal AWE_B
signal ABE_B0
signal ABE_B1
signal BG_B
signal BGH_B
signal BMODE0
signal BMODE1
signal BR_B
signal DATA[0]
signal DATA[1]
signal DATA[2]
signal DATA[3]
signal DATA[4]
signal DATA[5]
signal DATA[6]
signal DATA[7]
signal DATA[8]
signal DATA[9]
signal DATA[10]
signal DATA[11]
signal DATA[12]
signal DATA[13]
signal DATA[14]
signal DATA[15]
signal DR0PRI
signal DR0SEC
signal DR1PRI
signal DR1SEC
signal DT0PRI
signal DT0SEC
signal DT1PRI
signal DT1SEC
signal MISO
signal MOSI
signal NMI
signal PF0
signal PF1
signal PF2
signal PF3
signal PF4
signal PF5
signal PF6
signal PF7
signal PF8
signal PF9
signal PF10
signal PF11
signal PF12
signal PF13
signal PF14
signal PF15
signal PP_CLK
signal PP0
signal PP1
signal PP2
signal PP3
signal RESET_B
signal RFS0
signal RFS1
signal RSCLK0
signal RSCLK1
signal TSCLK0
signal TSCLK1
signal CLKOUT
signal RX
signal TX
signal SA10
signal SCAS_B
signal SCK
signal SCKE
signal SMS_B
signal SRAS_B
signal SWE_B
signal TCK
signal TDI
signal TDO
signal TMS
signal TRST_B
signal EMU_B
signal TEST
signal TFS0
signal TFS1
signal TMR0
signal TMR1
signal TMR2
signal RTXI
signal RTXO
signal VDD_INT0
signal VDD_INT1
signal VDD_INT2
signal VDD_INT3
signal VDD_INT4
signal VDD_INT5
signal VDD_EXT0
signal VDD_EXT1
signal VDD_EXT2
signal VDD_EXT3
signal VDD_EXT4
signal VDD_EXT5
signal VDD_EXT6
signal VDD_EXT7
signal VDD_EXT8
signal VDD_EXT9
signal VDD_EXT10
signal VDD_EXT11
signal GND0
signal GND1
signal GND2
signal GND3
signal GND4
signal GND5
signal GND6
signal GND7
signal GND8
signal GND9
signal GND10
signal GND11
signal GND12
signal GND13
signal GND14
signal GND15
signal GND16
signal GND17
signal GND18
signal GND19
signal GND20
signal GND21
signal GND22
signal GND23
signal VDD_RTC
signal CLKIN
signal XTAL
signal VROUT0
register BSR 197
register BR 1
register DIR 32
instruction length 5
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
instruction IDCODE 00010 DIR
instruction BYPASS 11111 BR
bit 196 C 0 *
bit 195 O 1 DATA[0] 196 0 Z
bit 194 I 1 DATA[0]
bit 193 O 1 DATA[1] 196 0 Z
bit 192 I 1 DATA[1]
bit 191 O 1 DATA[2] 196 0 Z
bit 190 I 1 DATA[2]
bit 189 O 1 DATA[3] 196 0 Z
bit 188 I 1 DATA[3]
bit 187 O 1 DATA[4] 196 0 Z
bit 186 I 1 DATA[4]
bit 185 O 1 DATA[5] 196 0 Z
bit 184 I 1 DATA[5]
bit 183 O 1 DATA[6] 196 0 Z
bit 182 I 1 DATA[6]
bit 181 O 1 DATA[7] 196 0 Z
bit 180 I 1 DATA[7]
bit 179 O 1 DATA[8] 196 0 Z
bit 178 I 1 DATA[8]
bit 177 O 1 DATA[9] 196 0 Z
bit 176 I 1 DATA[9]
bit 175 O 1 DATA[10] 196 0 Z
bit 174 I 1 DATA[10]
bit 173 O 1 DATA[11] 196 0 Z
bit 172 I 1 DATA[11]
bit 171 O 1 DATA[12] 196 0 Z
bit 170 I 1 DATA[12]
bit 169 O 1 DATA[13] 196 0 Z
bit 168 I 1 DATA[13]
bit 167 O 1 DATA[14] 196 0 Z
bit 166 I 1 DATA[14]
bit 165 O 1 DATA[15] 196 0 Z
bit 164 I 1 DATA[15]
bit 163 I 1 TEST
bit 162 I 1 BMODE0
bit 161 I 1 BMODE1
bit 160 I 1 RX
bit 159 O 1 TX
bit 158 C 0 *
bit 157 O 1 TMR0 158 0 Z
bit 156 I 1 TMR0
bit 155 C 0 *
bit 154 O 1 TMR1 155 0 Z
bit 153 I 1 TMR1
bit 152 C 0 *
bit 151 O 1 TMR2 152 0 Z
bit 150 I 1 TMR2
bit 149 C 0 *
bit 148 O 1 RSCLK0 149 0 Z
bit 147 I 1 RSCLK0
bit 146 C 0 *
bit 145 O 1 RFS0 146 0 Z
bit 144 I 1 RFS0
bit 143 I 1 DR0PRI
bit 142 I 1 DR0SEC
bit 141 C 0 *
bit 140 O 1 TSCLK0 141 0 Z
bit 139 I 1 TSCLK0
bit 138 C 0 *
bit 137 O 1 TFS0 138 0 Z
bit 136 I 1 TFS0
bit 135 C 0 *
bit 134 O 1 DT0PRI 135 0 Z
bit 133 C 0 *
bit 132 O 1 DT0SEC 133 0 Z
bit 131 C 0 *
bit 130 O 1 RSCLK1 131 0 Z
bit 129 I 1 RSCLK1
bit 128 C 0 *
bit 127 O 1 RFS1 128 0 Z
bit 126 I 1 RFS1
bit 125 I 1 DR1PRI
bit 124 I 1 DR1SEC
bit 123 C 0 *
bit 122 O 1 TSCLK1 123 0 Z
bit 121 I 1 TSCLK1
bit 120 C 0 *
bit 119 O 1 TFS1 120 0 Z
bit 118 I 1 TFS1
bit 117 C 0 *
bit 116 O 1 DT1PRI 117 0 Z
bit 115 C 0 *
bit 114 O 1 DT1SEC 115 0 Z
bit 113 C 0 *
bit 112 O 1 MOSI 113 0 Z
bit 111 I 1 MOSI
bit 110 C 0 *
bit 109 O 1 MISO 110 0 Z
bit 108 I 1 MISO
bit 107 C 0 *
bit 106 O 1 SCK 107 0 Z
bit 105 I 1 SCK
bit 104 C 0 *
bit 103 O 1 PF0 104 0 Z
bit 102 I 1 PF0
bit 101 C 0 *
bit 100 O 1 PF1 101 0 Z
bit 99 I 1 PF1
bit 98 C 0 *
bit 97 O 1 PF2 98 0 Z
bit 96 I 1 PF2
bit 95 C 0 *
bit 94 O 1 PF3 95 0 Z
bit 93 I 1 PF3
bit 92 C 0 *
bit 91 O 1 PF4 92 0 Z
bit 90 I 1 PF4
bit 89 C 0 *
bit 88 O 1 PF5 89 0 Z
bit 87 I 1 PF5
bit 86 C 0 *
bit 85 O 1 PF6 86 0 Z
bit 84 I 1 PF6
bit 83 C 0 *
bit 82 O 1 PF7 83 0 Z
bit 81 I 1 PF7
bit 80 C 0 *
bit 79 O 1 PF8 80 0 Z
bit 78 I 1 PF8
bit 77 C 0 *
bit 76 O 1 PF9 77 0 Z
bit 75 I 1 PF9
bit 74 C 0 *
bit 73 O 1 PF10 74 0 Z
bit 72 I 1 PF10
bit 71 C 0 *
bit 70 O 1 PF11 71 0 Z
bit 69 I 1 PF11
bit 68 C 0 *
bit 67 O 1 PF12 68 0 Z
bit 66 I 1 PF12
bit 65 C 0 *
bit 64 O 1 PF13 65 0 Z
bit 63 I 1 PF13
bit 62 C 0 *
bit 61 O 1 PF14 62 0 Z
bit 60 I 1 PF14
bit 59 C 0 *
bit 58 O 1 PF15 59 0 Z
bit 57 I 1 PF15
bit 56 C 0 *
bit 55 O 1 PP3 56 0 Z
bit 54 I 1 PP3
bit 53 C 0 *
bit 52 O 1 PP2 53 0 Z
bit 51 I 1 PP2
bit 50 C 0 *
bit 49 O 1 PP1 50 0 Z
bit 48 I 1 PP1
bit 47 C 0 *
bit 46 O 1 PP0 47 0 Z
bit 45 I 1 PP0
bit 44 I 1 PP_CLK
bit 43 I 1 NMI
bit 42 I 1 RESET_B
bit 41 O 1 SCKE 39 0 Z
bit 40 O 1 SMS_B 39 0 Z
bit 39 C 0 *
bit 38 O 1 CLKOUT 39 0 Z
bit 37 O 1 SRAS_B 39 0 Z
bit 36 O 1 SCAS_B 39 0 Z
bit 35 O 1 SWE_B 39 0 Z
bit 34 O 1 SA10 39 0 Z
bit 33 I 1 BR_B
bit 32 I 1 ARDY
bit 31 O 1 AMS_B0 27 0 Z
bit 30 O 1 AMS_B1 27 0 Z
bit 29 O 1 AMS_B2 27 0 Z
bit 28 O 1 AMS_B3 27 0 Z
bit 27 C 0 *
bit 26 O 1 AOE_B 27 0 Z
bit 25 O 1 ARE_B 27 0 Z
bit 24 O 1 AWE_B 27 0 Z
bit 23 O 1 ABE_B0 17 0 Z
bit 22 O 1 ABE_B1 17 0 Z
bit 21 O 1 ADDR[1] 17 0 Z
bit 20 O 1 ADDR[2] 17 0 Z
bit 19 O 1 ADDR[3] 17 0 Z
bit 18 O 1 ADDR[4] 17 0 Z
bit 17 C 0 *
bit 16 O 1 ADDR[5] 17 0 Z
bit 15 O 1 ADDR[6] 17 0 Z
bit 14 O 1 ADDR[7] 17 0 Z
bit 13 O 1 ADDR[8] 17 0 Z
bit 12 O 1 ADDR[9] 17 0 Z
bit 11 O 1 ADDR[10] 17 0 Z
bit 10 O 1 ADDR[11] 17 0 Z
bit 9 O 1 ADDR[12] 17 0 Z
bit 8 O 1 ADDR[13] 17 0 Z
bit 7 O 1 ADDR[14] 17 0 Z
bit 6 O 1 ADDR[15] 17 0 Z
bit 5 O 1 ADDR[16] 17 0 Z
bit 4 O 1 ADDR[17] 17 0 Z
bit 3 O 1 ADDR[18] 17 0 Z
bit 2 O 1 ADDR[19] 17 0 Z
bit 1 O 1 BGH_B
bit 0 O 1 BG_B

@ -0,0 +1,26 @@
#
# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 31-28 of the Device Identification Register
0000 bf537 0
0001 bf537 1
0010 bf537 2
0011 bf537 3

@ -0,0 +1,454 @@
signal ADDR1
signal ADDR2
signal ADDR3
signal ADDR4
signal ADDR5
signal ADDR6
signal ADDR7
signal ADDR8
signal ADDR9
signal ADDR10
signal ADDR11
signal ADDR12
signal ADDR13
signal ADDR14
signal ADDR15
signal ADDR16
signal ADDR17
signal ADDR18
signal ADDR19
signal AMS_B0
signal AMS_B1
signal AMS_B2
signal AMS_B3
signal AOE_B
signal ARDY
signal ARE_B
signal AWE_B
signal ABE_B0
signal ABE_B1
signal BG_B
signal BGH_B
signal BMODE0
signal BMODE1
signal BMODE2
signal BR_B
signal DATA0
signal DATA1
signal DATA2
signal DATA3
signal DATA4
signal DATA5
signal DATA6
signal DATA7
signal DATA8
signal DATA9
signal DATA10
signal DATA11
signal DATA12
signal DATA13
signal DATA14
signal DATA15
signal NMI
signal PF0
signal PF1
signal PF2
signal PF3
signal PF4
signal PF5
signal PF6
signal PF7
signal PF8
signal PF9
signal PF10
signal PF11
signal PF12
signal PF13
signal PF14
signal PF15
signal PG0
signal PG1
signal PG2
signal PG3
signal PG4
signal PG5
signal PG6
signal PG7
signal PG8
signal PG9
signal PG10
signal PG11
signal PG12
signal PG13
signal PG14
signal PG15
signal PH0
signal PH1
signal PH2
signal PH3
signal PH4
signal PH5
signal PH6
signal PH7
signal PH8
signal PH9
signal PH10
signal PH11
signal PH12
signal PH13
signal PH14
signal PH15
signal PJ0
signal PJ1
signal PJ2
signal PJ3
signal PJ4
signal PJ5
signal PJ6
signal PJ7
signal PJ8
signal PJ9
signal PJ10
signal PJ11
signal RESET_B
signal CLKOUT
signal SA10
signal SCAS_B
signal SCKE
signal SMS_B
signal SRAS_B
signal SWE_B
signal TDI
signal TDO
signal TCK
signal TMS
signal TRST_B
signal TEST
signal EMU_B
signal RTXI
signal RTXO
signal VDD_INT0
signal VDD_INT1
signal VDD_INT2
signal VDD_INT3
signal VDD_INT4
signal VDD_INT5
signal VDD_INT6
signal VDD_EXT0
signal VDD_EXT1
signal VDD_EXT2
signal VDD_EXT3
signal VDD_EXT4
signal VDD_EXT5
signal VDD_EXT6
signal VDD_EXT7
signal VDD_EXT8
signal VDD_EXT9
signal VDD_EXT10
signal VDD_EXT11
signal VDD_EXT12
signal VDD_EXT13
signal VDD_EXT14
signal VDD_EXT15
signal GND0
signal GND1
signal GND2
signal GND3
signal GND4
signal GND5
signal GND6
signal GND7
signal GND8
signal GND9
signal GND10
signal GND11
signal GND12
signal GND13
signal GND14
signal GND15
signal GND16
signal GND17
signal GND18
signal GND19
signal GND20
signal GND21
signal GND22
signal GND23
signal VDD_RTC
signal CLKIN
signal XTAL
signal CLKBUF
signal VROUT0
register BSR 261
register BR 1
register DIR 32
instruction length 5
instruction BYPASS 11111 BR
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
instruction IDCODE 00010 DIR
bit 260 C 0 *
bit 259 O 1 DATA0 260 0 Z
bit 258 I 1 DATA0
bit 257 O 1 DATA1 260 0 Z
bit 256 I 1 DATA1
bit 255 O 1 DATA2 260 0 Z
bit 254 I 1 DATA2
bit 253 O 1 DATA3 260 0 Z
bit 252 I 1 DATA3
bit 251 O 1 DATA4 260 0 Z
bit 250 I 1 DATA4
bit 249 O 1 DATA5 260 0 Z
bit 248 I 1 DATA5
bit 247 O 1 DATA6 260 0 Z
bit 246 I 1 DATA6
bit 245 O 1 DATA7 260 0 Z
bit 244 I 1 DATA7
bit 243 O 1 DATA8 260 0 Z
bit 242 I 1 DATA8
bit 241 O 1 DATA9 260 0 Z
bit 240 I 1 DATA9
bit 239 O 1 DATA10 260 0 Z
bit 238 I 1 DATA10
bit 237 O 1 DATA11 260 0 Z
bit 236 I 1 DATA11
bit 235 O 1 DATA12 260 0 Z
bit 234 I 1 DATA12
bit 233 O 1 DATA13 260 0 Z
bit 232 I 1 DATA13
bit 231 O 1 DATA14 260 0 Z
bit 230 I 1 DATA14
bit 229 O 1 DATA15 260 0 Z
bit 228 I 1 DATA15
bit 227 I 1 TEST
bit 226 I 1 BMODE0
bit 225 I 1 BMODE1
bit 224 I 1 BMODE2
bit 223 C 0 *
bit 222 O 1 PF0 223 0 Z
bit 221 I 1 PF0
bit 220 C 0 *
bit 219 O 1 PF1 220 0 Z
bit 218 I 1 PF1
bit 217 C 0 *
bit 216 O 1 PF2 217 0 Z
bit 215 I 1 PF2
bit 214 C 0 *
bit 213 O 1 PF3 214 0 Z
bit 212 I 1 PF3
bit 211 C 0 *
bit 210 O 1 PF4 211 0 Z
bit 209 I 1 PF4
bit 208 C 0 *
bit 207 O 1 PF5 208 0 Z
bit 206 I 1 PF5
bit 205 C 0 *
bit 204 O 1 PF6 205 0 Z
bit 203 I 1 PF6
bit 202 C 0 *
bit 201 O 1 PF7 202 0 Z
bit 200 I 1 PF7
bit 199 C 0 *
bit 198 O 1 PF8 199 0 Z
bit 197 I 1 PF8
bit 196 C 0 *
bit 195 O 1 PF9 196 0 Z
bit 194 I 1 PF9
bit 193 C 0 *
bit 192 O 1 PF10 193 0 Z
bit 191 I 1 PF10
bit 190 C 0 *
bit 189 O 1 PF11 190 0 Z
bit 188 I 1 PF11
bit 187 C 0 *
bit 186 O 1 PF12 187 0 Z
bit 185 I 1 PF12
bit 184 C 0 *
bit 183 O 1 PF13 184 0 Z
bit 182 I 1 PF13
bit 181 C 0 *
bit 180 O 1 PF14 181 0 Z
bit 179 I 1 PF14
bit 178 C 0 *
bit 177 O 1 PF15 178 0 Z
bit 176 I 1 PF15
bit 175 C 0 *
bit 174 O 1 PG0 175 0 Z
bit 173 I 1 PG0
bit 172 C 0 *
bit 171 O 1 PG1 172 0 Z
bit 170 I 1 PG1
bit 169 C 0 *
bit 168 O 1 PG2 169 0 Z
bit 167 I 1 PG2
bit 166 C 0 *
bit 165 O 1 PG3 166 0 Z
bit 164 I 1 PG3
bit 163 C 0 *
bit 162 O 1 PG4 163 0 Z
bit 161 I 1 PG4
bit 160 C 0 *
bit 159 O 1 PG5 160 0 Z
bit 158 I 1 PG5
bit 157 C 0 *
bit 156 O 1 PG6 157 0 Z
bit 155 I 1 PG6
bit 154 C 0 *
bit 153 O 1 PG7 154 0 Z
bit 152 I 1 PG7
bit 151 C 0 *
bit 150 O 1 PG10 151 0 Z
bit 149 I 1 PG10
bit 148 C 0 *
bit 147 O 1 PG11 148 0 Z
bit 146 I 1 PG11
bit 145 C 0 *
bit 144 O 1 PG12 145 0 Z
bit 143 I 1 PG12
bit 142 C 0 *
bit 141 O 1 PG8 142 0 Z
bit 140 I 1 PG8
bit 139 C 0 *
bit 138 O 1 PG9 139 0 Z
bit 137 I 1 PG9
bit 136 C 0 *
bit 135 O 1 PG13 136 0 Z
bit 134 I 1 PG13
bit 133 C 0 *
bit 132 O 1 PG14 133 0 Z
bit 131 I 1 PG14
bit 130 C 0 *
bit 129 O 1 PG15 130 0 Z
bit 128 I 1 PG15
bit 127 C 0 *
bit 126 O 1 PH0 127 0 Z
bit 125 I 1 PH0
bit 124 C 0 *
bit 123 O 1 PH1 124 0 Z
bit 122 I 1 PH1
bit 121 C 0 *
bit 120 O 1 PH2 121 0 Z
bit 119 I 1 PH2
bit 118 C 0 *
bit 117 O 1 PH3 118 0 Z
bit 116 I 1 PH3
bit 115 C 0 *
bit 114 O 1 PH4 115 0 Z
bit 113 I 1 PH4
bit 112 C 0 *
bit 111 O 1 PH5 112 0 Z
bit 110 I 1 PH5
bit 109 C 0 *
bit 108 O 1 PH6 109 0 Z
bit 107 I 1 PH6
bit 106 C 0 *
bit 105 O 1 PH7 106 0 Z
bit 104 I 1 PH7
bit 103 C 0 *
bit 102 O 1 PH8 103 0 Z
bit 101 I 1 PH8
bit 100 C 0 *
bit 99 O 1 PH9 100 0 Z
bit 98 I 1 PH9
bit 97 C 0 *
bit 96 O 1 PH10 97 0 Z
bit 95 I 1 PH10
bit 94 C 0 *
bit 93 O 1 PH11 94 0 Z
bit 92 I 1 PH11
bit 91 C 0 *
bit 90 O 1 PH12 91 0 Z
bit 89 I 1 PH12
bit 88 C 0 *
bit 87 O 1 PH13 88 0 Z
bit 86 I 1 PH13
bit 85 C 0 *
bit 84 O 1 PH14 85 0 Z
bit 83 I 1 PH14
bit 82 C 0 *
bit 81 O 1 PH15 82 0 Z
bit 80 I 1 PH15
bit 79 C 0 *
bit 78 O 1 PJ0 79 0 Z
bit 77 I 1 PJ0
bit 76 C 0 *
bit 75 O 1 PJ1 76 0 Z
bit 74 I 1 PJ1
bit 73 C 0 *
bit 72 O 1 PJ6 73 0 Z
bit 71 I 1 PJ6
bit 70 C 0 *
bit 69 O 1 PJ7 70 0 Z
bit 68 I 1 PJ7
bit 67 C 0 *
bit 66 O 1 PJ8 67 0 Z
bit 65 I 1 PJ8
bit 64 C 0 *
bit 63 O 1 PJ4 64 0 Z
bit 62 I 1 PJ4
bit 61 C 0 *
bit 60 O 1 PJ5 61 0 Z
bit 59 I 1 PJ5
bit 58 C 0 *
bit 57 O 1 PJ9 58 0 Z
bit 56 I 1 PJ9
bit 55 C 0 *
bit 54 O 1 PJ10 55 0 Z
bit 53 I 1 PJ10
bit 52 C 0 *
bit 51 O 1 PJ11 52 0 Z
bit 50 I 1 PJ11
bit 49 C 0 *
bit 48 O 1 PJ2 49 0 Z
bit 47 I 1 PJ2
bit 46 C 0 *
bit 45 O 1 PJ3 46 0 Z
bit 44 I 1 PJ3
bit 43 I 1 NMI
bit 42 I 1 RESET_B
bit 41 O 1 SCKE 39 0 Z
bit 40 O 1 SMS_B 39 0 Z
bit 39 C 0 *
bit 38 O 1 CLKOUT 39 0 Z
bit 37 O 1 SRAS_B 39 0 Z
bit 36 O 1 SCAS_B 39 0 Z
bit 35 O 1 SWE_B 39 0 Z
bit 34 O 1 SA10 39 0 Z
bit 33 I 1 BR_B
bit 32 I 1 ARDY
bit 31 O 1 AMS_B0 27 0 Z
bit 30 O 1 AMS_B1 27 0 Z
bit 29 O 1 AMS_B2 27 0 Z
bit 28 O 1 AMS_B3 27 0 Z
bit 27 C 0 *
bit 26 O 1 AOE_B 27 0 Z
bit 25 O 1 ARE_B 27 0 Z
bit 24 O 1 AWE_B 27 0 Z
bit 23 O 1 ABE_B0 17 0 Z
bit 22 O 1 ABE_B1 17 0 Z
bit 21 O 1 ADDR1 17 0 Z
bit 20 O 1 ADDR2 17 0 Z
bit 19 O 1 ADDR3 17 0 Z
bit 18 O 1 ADDR4 17 0 Z
bit 17 C 0 *
bit 16 O 1 ADDR5 17 0 Z
bit 15 O 1 ADDR6 17 0 Z
bit 14 O 1 ADDR7 17 0 Z
bit 13 O 1 ADDR8 17 0 Z
bit 12 O 1 ADDR9 17 0 Z
bit 11 O 1 ADDR10 17 0 Z
bit 10 O 1 ADDR11 17 0 Z
bit 9 O 1 ADDR12 17 0 Z
bit 8 O 1 ADDR13 17 0 Z
bit 7 O 1 ADDR14 17 0 Z
bit 6 O 1 ADDR15 17 0 Z
bit 5 O 1 ADDR16 17 0 Z
bit 4 O 1 ADDR17 17 0 Z
bit 3 O 1 ADDR18 17 0 Z
bit 2 O 1 ADDR19 17 0 Z
bit 1 O 1 BGH_B
bit 0 O 1 BG_B

@ -0,0 +1,28 @@
#
# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 31-28 of the Device Identification Register
0000 bf538 0
0001 bf538 1
0010 bf538 2
0011 bf538 3
0100 bf538 4
0101 bf538 5

@ -0,0 +1,651 @@
signal ABE_B0
signal ABE_B1
signal ADDR1
signal ADDR2
signal ADDR3
signal ADDR4
signal ADDR5
signal ADDR6
signal ADDR7
signal ADDR8
signal ADDR9
signal ADDR10
signal ADDR11
signal ADDR12
signal ADDR13
signal ADDR14
signal ADDR15
signal ADDR16
signal ADDR17
signal ADDR18
signal ADDR19
signal AMS_B0
signal AMS_B1
signal AMS_B2
signal AMS_B3
signal AOE_B
signal ARDY
signal ARE_B
signal AWE_B
signal BG_B
signal BGH_B
signal BMODE0
signal BMODE1
signal BR_B
signal CANRX
signal CANTX
signal CLKIN
signal CLKOUT
signal DATA0
signal DATA1
signal DATA2
signal DATA3
signal DATA4
signal DATA5
signal DATA6
signal DATA7
signal DATA8
signal DATA9
signal DATA10
signal DATA11
signal DATA12
signal DATA13
signal DATA14
signal DATA15
signal DR0PRI
signal DR0SEC
signal DR1PRI
signal DR1SEC
signal DR2PRI
signal DR2SEC
signal DR3PRI
signal DR3SEC
signal DT0PRI
signal DT0SEC
signal DT1PRI
signal DT1SEC
signal DT2PRI
signal DT2SEC
signal DT3PRI
signal DT3SEC
signal EMU_B
signal FCE_B
signal FRESET_B
signal GND0
signal GND1
signal GND2
signal GND3
signal GND4
signal GND5
signal GND6
signal GND7
signal GND8
signal GND9
signal GND10
signal GND11
signal GND12
signal GND13
signal GND14
signal GND15
signal GND16
signal GND17
signal GND18
signal GND19
signal GND20
signal GND21
signal GND22
signal GND23
signal GND24
signal GND25
signal GND26
signal GND27
signal GND28
signal GND29
signal GND30
signal GND31
signal GND32
signal GND33
signal GND34
signal GND35
signal GND36
signal GND37
signal GND38
signal GND39
signal GND40
signal GND41
signal GND42
signal GND43
signal GND44
signal GND45
signal GND46
signal GND47
signal GND48
signal GND49
signal GND50
signal GND51
signal GND52
signal GND53
signal GND54
signal GND55
signal GND56
signal GND57
signal GND58
signal GND59
signal GND60
signal GND61
signal GND62
signal GND63
signal GND64
signal GND65
signal GND66
signal GND67
signal GND68
signal GND69
signal GND70
signal GND71
signal GND72
signal GND73
signal GND74
signal GND75
signal GND76
signal GND77
signal GND78
signal GND79
signal GND80
signal GND81
signal GND82
signal GND83
signal GND84
signal GND85
signal GND86
signal GND87
signal GND88
signal GND89
signal GND90
signal GND91
signal GND92
signal GND93
signal GND94
signal GND95
signal GND96
signal GND97
signal GND98
signal GND99
signal GND100
signal GND101
signal GND102
signal GND103
signal GND104
signal GND105
signal GND106
signal GND107
signal GND108
signal GND109
signal GND110
signal GND111
signal GND112
signal GND113
signal GND114
signal GND115
signal GND116
signal GND117
signal GND118
signal GP
signal GPW_B
signal MISO0
signal MISO1
signal MISO2
signal MOSI0
signal MOSI1
signal MOSI2
signal PC4
signal PC6
signal PC7
signal PC8
signal PC5
signal NC
signal NMI_B
signal PC9
signal PF0
signal PF1
signal PF2
signal PF3
signal PF4
signal PF5
signal PF6
signal PF7
signal PF8
signal PF9
signal PF10
signal PF11
signal PF12
signal PF13
signal PF14
signal PF15
signal PPI_CLK
signal PPI0
signal PPI1
signal PPI2
signal PPI3
signal RESET_B
signal RFS0
signal RFS1
signal RFS2
signal RFS3
signal RSCLK0
signal RSCLK1
signal RSCLK2
signal RSCLK3
signal RTXI
signal RTXO
signal RX0
signal RX1
signal RX2
signal SA10
signal SCAS_B
signal SCK0
signal SCK1
signal SCK2
signal SCKE
signal SCL0
signal SCL1
signal SDA0
signal SDA1
signal SMS_B
signal SPI1SS_B
signal SPI1SEL1_B
signal SPI2SS_B
signal SPI2SEL1_B
signal SRAS_B
signal SWE_B
signal TCK
signal TDI
signal TDO
signal TFS0
signal TFS1
signal TFS2
signal TFS3
signal TMR0
signal TMR1
signal TMR2
signal TMS
signal TRST_B
signal TSCLK0
signal TSCLK1
signal TSCLK2
signal TSCLK3
signal TX0
signal TX1
signal TX2
signal VDDEXT0
signal VDDEXT1
signal VDDEXT2
signal VDDEXT3
signal VDDEXT4
signal VDDEXT5
signal VDDEXT6
signal VDDEXT7
signal VDDEXT8
signal VDDEXT9
signal VDDEXT10
signal VDDEXT11
signal VDDEXT12
signal VDDEXT13
signal VDDEXT14
signal VDDEXT15
signal VDDEXT16
signal VDDEXT17
signal VDDEXT18
signal VDDEXT19
signal VDDINT0
signal VDDINT1
signal VDDINT2
signal VDDINT3
signal VDDINT4
signal VDDINT5
signal VDDINT6
signal VDDINT7
signal VDDINT8
signal VDDINT9
signal VDDINT10
signal VDDINT11
signal VDDRTC
signal VROUT0
signal VROUT1
register BSR 325
register BR 1
register DIR 32
instruction length 5
instruction BYPASS 11111 BR
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
instruction IDCODE 00010 DIR
bit 324 C 0 *
bit 323 O 1 DATA0 324 0 Z
bit 322 I 1 DATA0
bit 321 O 1 DATA1 324 0 Z
bit 320 I 1 DATA1
bit 319 O 1 DATA2 324 0 Z
bit 318 I 1 DATA2
bit 317 C 0 *
bit 316 O 1 TSCLK2 317 0 Z
bit 315 I 1 TSCLK2
bit 314 C 0 *
bit 313 O 1 DR2SEC 314 0 Z
bit 312 I 1 DR2SEC
bit 311 C 0 *
bit 310 O 1 DR2PRI 311 0 Z
bit 309 I 1 DR2PRI
bit 308 O 1 DATA3 324 0 Z
bit 307 I 1 DATA3
bit 306 O 1 DATA4 324 0 Z
bit 305 I 1 DATA4
bit 304 O 1 DATA5 324 0 Z
bit 303 I 1 DATA5
bit 302 O 1 DATA6 324 0 Z
bit 301 I 1 DATA6
bit 300 C 0 *
bit 299 O 1 RFS2 300 0 Z
bit 298 I 1 RFS2
bit 297 O 1 DATA7 324 0 Z
bit 296 I 1 DATA7
bit 295 O 1 DATA8 324 0 Z
bit 294 I 1 DATA8
bit 293 O 1 DATA9 324 0 Z
bit 292 I 1 DATA9
bit 291 O 1 DATA10 324 0 Z
bit 290 I 1 DATA10
bit 289 O 1 DATA11 324 0 Z
bit 288 I 1 DATA11
bit 287 C 0 *
bit 286 O 1 RSCLK2 287 0 Z
bit 285 I 1 RSCLK2
bit 284 C 0 *
bit 283 O 1 RX2 284 0 Z
bit 282 I 1 RX2
bit 281 O 1 DATA12 324 0 Z
bit 280 I 1 DATA12
bit 279 O 1 DATA13 324 0 Z
bit 278 I 1 DATA13
bit 277 O 1 DATA14 324 0 Z
bit 276 I 1 DATA14
bit 275 O 1 DATA15 324 0 Z
bit 274 I 1 DATA15
bit 273 I 1 BMODE0
bit 272 I 1 BMODE1
bit 271 I 1 RX0
bit 270 O 1 TX0
bit 269 C 0 *
bit 268 O 1 RSCLK1 269 0 Z
bit 267 I 1 RSCLK1
bit 266 C 0 *
bit 265 O 1 TMR0 266 0 Z
bit 264 I 1 TMR0
bit 263 C 0 *
bit 262 O 1 TMR1 263 0 Z
bit 261 I 1 TMR1
bit 260 C 0 *
bit 259 O 1 TMR2 260 0 Z
bit 258 I 1 TMR2
bit 257 C 0 *
bit 256 O 1 RSCLK0 257 0 Z
bit 255 I 1 RSCLK0
bit 254 C 0 *
bit 253 O 1 RFS0 254 0 Z
bit 252 I 1 RFS0
bit 251 I 1 DR0PRI
bit 250 I 1 DR0SEC
bit 249 C 0 *
bit 248 O 1 RFS1 249 0 Z
bit 247 I 1 RFS1
bit 246 I 1 DR1PRI
bit 245 I 1 DR1SEC
bit 244 C 0 *
bit 243 O 1 TSCLK0 244 0 Z
bit 242 I 1 TSCLK0
bit 241 C 0 *
bit 240 O 1 TFS0 241 0 Z
bit 239 I 1 TFS0
bit 238 C 0 *
bit 237 O 1 DT0PRI 238 0 Z
bit 236 C 0 *
bit 235 O 1 DT0SEC 236 0 Z
bit 234 C 0 *
bit 233 O 1 PF0 234 0 Z
bit 232 I 1 PF0
bit 231 C 0 *
bit 230 O 1 PF1 231 0 Z
bit 229 I 1 PF1
bit 228 C 0 *
bit 227 O 1 PF2 228 0 Z
bit 226 I 1 PF2
bit 225 C 0 *
bit 224 O 1 PF3 225 0 Z
bit 223 I 1 PF3
bit 222 C 0 *
bit 221 O 1 PF4 222 0 Z
bit 220 I 1 PF4
bit 219 C 0 *
bit 218 O 1 PF5 219 0 Z
bit 217 I 1 PF5
bit 216 C 0 *
bit 215 O 1 TSCLK1 216 0 Z
bit 214 I 1 TSCLK1
bit 213 C 0 *
bit 212 O 1 TFS1 213 0 Z
bit 211 I 1 TFS1
bit 210 C 0 *
bit 209 O 1 DT1PRI 210 0 Z
bit 208 C 0 *
bit 207 O 1 PF6 208 0 Z
bit 206 I 1 PF6
bit 205 C 0 *
bit 204 O 1 MOSI0 205 0 Z
bit 203 I 1 MOSI0
bit 202 C 0 *
bit 201 O 1 MISO0 202 0 Z
bit 200 I 1 MISO0
bit 199 C 0 *
bit 198 O 1 DT1SEC 199 0 Z
bit 197 C 0 *
bit 196 O 1 SCK0 197 0 Z
bit 195 I 1 SCK0
bit 194 C 0 *
bit 193 O 1 PF7 194 0 Z
bit 192 I 1 PF7
bit 191 C 0 *
bit 190 O 1 PF8 191 0 Z
bit 189 I 1 PF8
bit 188 C 0 *
bit 187 O 1 PF9 188 0 Z
bit 186 I 1 PF9
bit 185 C 0 *
bit 184 O 1 PF10 185 0 Z
bit 183 I 1 PF10
bit 182 C 0 *
bit 181 O 1 PF11 182 0 Z
bit 180 I 1 PF11
bit 179 C 0 *
bit 178 O 1 PF12 179 0 Z
bit 177 I 1 PF12
bit 176 C 0 *
bit 175 O 1 PF13 176 0 Z
bit 174 I 1 PF13
bit 173 C 0 *
bit 172 O 1 PF14 173 0 Z
bit 171 I 1 PF14
bit 170 C 0 *
bit 169 O 1 PF15 170 0 Z
bit 168 I 1 PF15
bit 167 C 0 *
bit 166 O 1 PPI3 167 0 Z
bit 165 I 1 PPI3
bit 164 C 0 *
bit 163 O 1 PPI2 164 0 Z
bit 162 I 1 PPI2
bit 161 C 0 *
bit 160 O 1 PPI1 161 0 Z
bit 159 I 1 PPI1
bit 158 C 0 *
bit 157 O 1 PPI0 158 0 Z
bit 156 I 1 PPI0
bit 155 C 0 *
bit 154 O 1 RX1 155 0 Z
bit 153 I 1 RX1
bit 152 C 0 *
bit 151 O 1 TX1 152 0 Z
bit 150 I 1 TX1
bit 149 I 1 PPI_CLK
bit 148 C 0 *
bit 147 O 1 SCL0 148 0 Z
bit 146 I 1 SCL0
bit 145 C 0 *
bit 144 O 1 SDA0 145 0 Z
bit 143 I 1 SDA0
bit 142 O 0 *
bit 141 O 0 *
bit 140 I 1 CANRX
bit 139 C 0 *
bit 138 O 1 CANTX 139 0 Z
bit 137 I 1 CANTX
bit 136 C 0 *
bit 135 O 1 SPI2SEL1_B 136 0 Z
bit 134 I 1 SPI2SEL1_B
bit 133 C 0 *
bit 132 O 1 SPI2SS_B 133 0 Z
bit 131 I 1 SPI2SS_B
bit 130 C 0 *
bit 129 O 1 MOSI2 130 0 Z
bit 128 I 1 MOSI2
bit 127 C 0 *
bit 126 O 1 MISO2 127 0 Z
bit 125 I 1 MISO2
bit 124 I 1 NMI_B
bit 123 I 1 RESET_B
bit 122 C 0 *
bit 121 O 1 SCK2 122 0 Z
bit 120 I 1 SCK2
bit 119 C 0 *
bit 118 O 1 SPI1SEL1_B 119 0 Z
bit 117 I 1 SPI1SEL1_B
bit 116 C 0 *
bit 115 O 1 SPI1SS_B 116 0 Z
bit 114 I 1 SPI1SS_B
bit 113 C 0 *
bit 112 O 1 MOSI1 113 0 Z
bit 111 I 1 MOSI1
bit 110 C 0 *
bit 109 O 1 MISO1 110 0 Z
bit 108 I 1 MISO1
bit 107 C 0 *
bit 106 O 1 SCK1 107 0 Z
bit 105 I 1 SCK1
bit 104 C 0 *
bit 103 O 1 SCL1 104 0 Z
bit 102 I 1 SCL1
bit 101 C 0 *
bit 100 O 1 SDA1 101 0 Z
bit 99 I 1 SDA1
bit 98 C 0 *
bit 97 O 1 PC9 98 0 Z
bit 96 I 1 PC9
bit 95 O 0 *
bit 94 O 0 *
bit 93 I 1 GPW_B
bit 92 O 1 SCKE 84 0 Z
bit 91 O 1 SMS_B 84 0 Z
bit 90 C 0 *
bit 89 O 1 PC6 90 0 Z
bit 88 I 1 PC6
bit 87 C 0 *
bit 86 O 1 PC7 87 0 Z
bit 85 I 1 PC7
bit 84 C 0 *
bit 83 O 1 CLKOUT 84 0 Z
bit 82 I 1 ARDY
bit 81 I 1 BR_B
bit 80 C 0 *
bit 79 O 1 DT3SEC 80 0 Z
bit 78 I 1 DT3SEC
bit 77 C 0 *
bit 76 O 1 DT3PRI 77 0 Z
bit 75 I 1 DT3PRI
bit 74 C 0 *
bit 73 O 1 TFS3 74 0 Z
bit 72 I 1 TFS3
bit 71 O 1 SRAS_B 84 0 Z
bit 70 O 1 SCAS_B 84 0 Z
bit 69 O 1 SWE_B 84 0 Z
bit 68 O 1 SA10 84 0 Z
bit 67 C 0 *
bit 66 O 1 PC8 67 0 Z
bit 65 I 1 PC8
bit 64 C 0 *
bit 63 O 1 PC5 64 0 Z
bit 62 I 1 PC5
bit 61 O 0 *
bit 60 O 0 *
bit 59 I 1 PC4
bit 58 O 1 AMS_B0 45 0 Z
bit 57 C 0 *
bit 56 O 1 TSCLK3 57 0 Z
bit 55 I 1 TSCLK3
bit 54 C 0 *
bit 53 O 1 DR3SEC 54 0 Z
bit 52 I 1 DR3SEC
bit 51 C 0 *
bit 50 O 1 DR3PRI 51 0 Z
bit 49 I 1 DR3PRI
bit 48 O 1 AMS_B1 45 0 Z
bit 47 O 1 AMS_B2 45 0 Z
bit 46 O 1 AMS_B3 45 0 Z
bit 45 C 0 *
bit 44 O 1 AOE_B 45 0 Z
bit 43 O 1 ARE_B 45 0 Z
bit 42 O 1 AWE_B 45 0 Z
bit 41 O 1 ABE_B0 26 0 Z
bit 40 O 1 ABE_B1 26 0 Z
bit 39 C 0 *
bit 38 O 1 RFS3 39 0 Z
bit 37 I 1 RFS3
bit 36 C 0 *
bit 35 O 1 RSCLK3 36 0 Z
bit 34 I 1 RSCLK3
bit 33 C 0 *
bit 32 O 1 TX2 33 0 Z
bit 31 I 1 TX2
bit 30 O 1 ADDR1 26 0 Z
bit 29 O 1 ADDR2 26 0 Z
bit 28 O 1 ADDR3 26 0 Z
bit 27 O 1 ADDR4 26 0 Z
bit 26 C 0 *
bit 25 O 1 ADDR5 26 0 Z
bit 24 O 1 ADDR6 26 0 Z
bit 23 O 1 ADDR7 26 0 Z
bit 22 O 1 ADDR8 26 0 Z
bit 21 O 1 ADDR9 26 0 Z
bit 20 O 1 ADDR10 26 0 Z
bit 19 O 1 ADDR11 26 0 Z
bit 18 O 1 ADDR12 26 0 Z
bit 17 O 1 ADDR13 26 0 Z
bit 16 O 1 ADDR14 26 0 Z
bit 15 C 0 *
bit 14 O 1 DT2SEC 15 0 Z
bit 13 I 1 DT2SEC
bit 12 C 0 *
bit 11 O 1 DT2PRI 12 0 Z
bit 10 I 1 DT2PRI
bit 9 O 1 ADDR15 26 0 Z
bit 8 O 1 ADDR16 26 0 Z
bit 7 O 1 ADDR17 26 0 Z
bit 6 O 1 ADDR18 26 0 Z
bit 5 O 1 ADDR19 26 0 Z
bit 4 C 0 *
bit 3 O 1 TFS2 4 0 Z
bit 2 I 1 TFS2
bit 1 O 1 BGH_B
bit 0 O 1 BG_B

@ -0,0 +1,26 @@
#
# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 31-28 of the Device Identification Register
0000 bf548 0
0001 bf548 1
0010 bf548 2
0011 bf548 3

File diff suppressed because it is too large Load Diff

@ -0,0 +1,25 @@
#
# $Id: STEPPINGS 82 2006-11-06 04:22:52Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 31-28 of the Device Identification Register
0010 bf561 2
0011 bf561 3
0101 bf561 5

@ -0,0 +1,600 @@
signal ADDR2
signal ADDR3
signal ADDR4
signal ADDR5
signal ADDR6
signal ADDR7
signal ADDR8
signal ADDR9
signal ADDR10
signal ADDR11
signal ADDR12
signal ADDR13
signal ADDR14
signal ADDR15
signal ADDR16
signal ADDR17
signal ADDR18
signal ADDR19
signal ADDR20
signal ADDR21
signal ADDR22
signal ADDR23
signal ADDR24
signal ADDR25
signal DATA0
signal DATA1
signal DATA2
signal DATA3
signal DATA4
signal DATA5
signal DATA6
signal DATA7
signal DATA8
signal DATA9
signal DATA10
signal DATA11
signal DATA12
signal DATA13
signal DATA14
signal DATA15
signal DATA16
signal DATA17
signal DATA18
signal DATA19
signal DATA20
signal DATA21
signal DATA22
signal DATA23
signal DATA24
signal DATA25
signal DATA26
signal DATA27
signal DATA28
signal DATA29
signal DATA30
signal DATA31
signal AMS_B0
signal AMS_B1
signal AMS_B2
signal AMS_B3
signal AOE_B
signal ARDY
signal ARE_B
signal AWE_B
signal ABE_B0
signal ABE_B1
signal ABE_B2
signal ABE_B3
signal BG_B
signal BGH_B
signal BMODE0
signal BMODE1
signal BR_B
signal BY_PASS
signal PPI1_DATA0
signal PPI1_DATA1
signal PPI1_DATA2
signal PPI1_DATA3
signal PPI1_DATA4
signal PPI1_DATA5
signal PPI1_DATA6
signal PPI1_DATA7
signal PPI1_DATA8
signal PPI1_DATA9
signal PPI1_DATA10
signal PPI1_DATA11
signal PPI1_DATA12
signal PPI1_DATA13
signal PPI1_DATA14
signal PPI1_DATA15
signal PPI2_DATA0
signal PPI2_DATA1
signal PPI2_DATA2
signal PPI2_DATA3
signal PPI2_DATA4
signal PPI2_DATA5
signal PPI2_DATA6
signal PPI2_DATA7
signal PPI2_DATA8
signal PPI2_DATA9
signal PPI2_DATA10
signal PPI2_DATA11
signal PPI2_DATA12
signal PPI2_DATA13
signal PPI2_DATA14
signal PPI2_DATA15
signal DR0PRI
signal DR0SEC
signal DR1PRI
signal DR1SEC
signal DT0PRI
signal DT0SEC
signal DT1PRI
signal DT1SEC
signal MISO
signal MOSI
signal NMI_0
signal NMI_1
signal PF0
signal PF1
signal PF2
signal PF3
signal PF4
signal PF5
signal PF6
signal PF7
signal PF8
signal PF9
signal PF10
signal PF11
signal PF12
signal PF13
signal PF14
signal PF15
signal RESET_B
signal RFS0
signal RFS1
signal RSCLK0
signal RSCLK1
signal TSCLK0
signal TSCLK1
signal RX
signal TX
signal SA10
signal SCAS_B
signal SCK
signal SCKE
signal SLEEP
signal SMS_B0
signal SMS_B1
signal SMS_B2
signal SMS_B3
signal SRAS_B
signal SWE_B
signal SCLK0
signal SCLK1
signal TCK
signal TDI
signal TDO
signal TMS
signal TRST_B
signal EMU_B
signal TEST
signal TFS0
signal TFS1
signal PPI1_CLK
signal PPI2_CLK
signal PPI1_SYNC1
signal PPI1_SYNC2
signal PPI1_SYNC3
signal PPI2_SYNC1
signal PPI2_SYNC2
signal PPI2_SYNC3
signal VDD_INT0
signal VDD_INT1
signal VDD_INT2
signal VDD_INT3
signal VDD_INT4
signal VDD_INT5
signal VDD_INT6
signal VDD_INT7
signal VDD_INT8
signal GND_INT0
signal GND_INT1
signal GND_INT2
signal GND_INT3
signal GND_INT4
signal GND_INT5
signal GND_INT6
signal VDD_EXT0
signal VDD_EXT1
signal VDD_EXT2
signal VDD_EXT3
signal VDD_EXT4
signal VDD_EXT5
signal VDD_EXT6
signal VDD_EXT7
signal VDD_EXT8
signal VDD_EXT9
signal VDD_EXT10
signal VDD_EXT11
signal VDD_EXT12
signal VDD_EXT13
signal VDD_EXT14
signal VDD_EXT15
signal VDD_EXT16
signal VDD_EXT17
signal VDD_EXT18
signal CLKIN
signal XTAL
signal VREF_FLT
signal VREG
signal PSMON_VDD
signal PSMON_GND
signal GND_EXT0
signal GND_EXT1
signal GND_EXT2
signal GND_EXT3
signal GND_EXT4
signal GND_EXT5
signal GND_EXT6
signal GND_EXT7
signal GND_EXT8
signal GND_EXT9
signal GND_EXT10
signal GND_EXT11
signal GND_EXT12
signal GND_EXT13
signal GND_EXT14
signal GND_EXT15
signal GND_EXT16
signal GND_EXT17
signal GND_EXT18
register BSR 355
register BR 1
register DIR 32
instruction length 5
instruction BYPASS 11111 BR
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
instruction IDCODE 00010 DIR
bit 354 I 1 TEST
bit 353 I 1 BMODE1
bit 352 I 1 BMODE0
bit 351 O 1 SLEEP
bit 350 I 1 NMI_0
bit 349 C 0 *
bit 348 O 1 MISO 349 0 Z
bit 347 I 1 MISO
bit 346 C 0 *
bit 345 O 1 MOSI 346 0 Z
bit 344 I 1 MOSI
bit 343 C 0 *
bit 342 O 1 SCK 343 0 Z
bit 341 I 1 SCK
bit 340 C 0 *
bit 339 O 1 RX 340 0 Z
bit 338 I 1 RX
bit 337 C 0 *
bit 336 O 1 TX 337 0 Z
bit 335 I 1 TX
bit 334 C 0 *
bit 333 O 1 RSCLK1 334 0 Z
bit 332 I 1 RSCLK1
bit 331 C 0 *
bit 330 O 1 RFS1 331 0 Z
bit 329 I 1 RFS1
bit 328 C 0 *
bit 327 O 1 DR1SEC 328 0 Z
bit 326 I 1 DR1SEC
bit 325 C 0 *
bit 324 O 1 DR1PRI 325 0 Z
bit 323 I 1 DR1PRI
bit 322 C 0 *
bit 321 O 1 TSCLK1 322 0 Z
bit 320 I 1 TSCLK1
bit 319 C 0 *
bit 318 O 1 TFS1 319 0 Z
bit 317 I 1 TFS1
bit 316 C 0 *
bit 315 O 1 DT1SEC 316 0 Z
bit 314 I 1 DT1SEC
bit 313 C 0 *
bit 312 O 1 DT1PRI 313 0 Z
bit 311 I 1 DT1PRI
bit 310 C 0 *
bit 309 O 1 RSCLK0 310 0 Z
bit 308 I 1 RSCLK0
bit 307 C 0 *
bit 306 O 1 RFS0 307 0 Z
bit 305 I 1 RFS0
bit 304 C 0 *
bit 303 O 1 DR0SEC 304 0 Z
bit 302 I 1 DR0SEC
bit 301 C 0 *
bit 300 O 1 DR0PRI 301 0 Z
bit 299 I 1 DR0PRI
bit 298 C 0 *
bit 297 O 1 TSCLK0 298 0 Z
bit 296 I 1 TSCLK0
bit 295 C 0 *
bit 294 O 1 TFS0 295 0 Z
bit 293 I 1 TFS0
bit 292 C 0 *
bit 291 O 1 DT0SEC 292 0 Z
bit 290 I 1 DT0SEC
bit 289 C 0 *
bit 288 O 1 DT0PRI 289 0 Z
bit 287 I 1 DT0PRI
bit 286 O 1 DATA31 254 0 Z
bit 285 I 1 DATA31
bit 284 O 1 DATA30 254 0 Z
bit 283 I 1 DATA30
bit 282 O 1 DATA29 254 0 Z
bit 281 I 1 DATA29
bit 280 O 1 DATA28 254 0 Z
bit 279 I 1 DATA28
bit 278 O 1 DATA27 254 0 Z
bit 277 I 1 DATA27
bit 276 O 1 DATA26 254 0 Z
bit 275 I 1 DATA26
bit 274 O 1 DATA25 254 0 Z
bit 273 I 1 DATA25
bit 272 O 1 DATA24 254 0 Z
bit 271 I 1 DATA24
bit 270 O 1 DATA23 254 0 Z
bit 269 I 1 DATA23
bit 268 O 1 DATA22 254 0 Z
bit 267 I 1 DATA22
bit 266 O 1 DATA21 254 0 Z
bit 265 I 1 DATA21
bit 264 O 1 DATA20 254 0 Z
bit 263 I 1 DATA20
bit 262 O 1 DATA19 254 0 Z
bit 261 I 1 DATA19
bit 260 O 1 DATA18 254 0 Z
bit 259 I 1 DATA18
bit 258 O 1 DATA17 254 0 Z
bit 257 I 1 DATA17
bit 256 O 1 DATA16 254 0 Z
bit 255 I 1 DATA16
bit 254 C 0 *
bit 253 O 1 DATA15 221 0 Z
bit 252 I 1 DATA15
bit 251 O 1 DATA14 221 0 Z
bit 250 I 1 DATA14
bit 249 O 1 DATA13 221 0 Z
bit 248 I 1 DATA13
bit 247 O 1 DATA12 221 0 Z
bit 246 I 1 DATA12
bit 245 O 1 DATA11 221 0 Z
bit 244 I 1 DATA11
bit 243 O 1 DATA10 221 0 Z
bit 242 I 1 DATA10
bit 241 O 1 DATA9 221 0 Z
bit 240 I 1 DATA9
bit 239 O 1 DATA8 221 0 Z
bit 238 I 1 DATA8
bit 237 O 1 DATA7 221 0 Z
bit 236 I 1 DATA7
bit 235 O 1 DATA6 221 0 Z
bit 234 I 1 DATA6
bit 233 O 1 DATA5 221 0 Z
bit 232 I 1 DATA5
bit 231 O 1 DATA4 221 0 Z
bit 230 I 1 DATA4
bit 229 O 1 DATA3 221 0 Z
bit 228 I 1 DATA3
bit 227 O 1 DATA2 221 0 Z
bit 226 I 1 DATA2
bit 225 O 1 DATA1 221 0 Z
bit 224 I 1 DATA1
bit 223 O 1 DATA0 221 0 Z
bit 222 I 1 DATA0
bit 221 C 0 *
bit 220 O 1 ADDR2 219 0 Z
bit 219 C 0 *
bit 218 O 1 ADDR3 219 0 Z
bit 217 O 1 ADDR4 219 0 Z
bit 216 O 1 ADDR5 219 0 Z
bit 215 O 1 ADDR6 219 0 Z
bit 214 O 1 ADDR7 219 0 Z
bit 213 O 1 ADDR8 219 0 Z
bit 212 O 1 ABE_B3 219 0 Z
bit 211 O 1 ABE_B2 219 0 Z
bit 210 O 1 ABE_B1 219 0 Z
bit 209 O 1 ABE_B0 219 0 Z
bit 208 O 1 BGH_B
bit 207 O 1 BG_B
bit 206 I 1 BR_B
bit 205 O 1 SA10 194 0 Z
bit 204 O 1 SCLK1 194 0 Z
bit 203 O 1 SCLK0 194 0 Z
bit 202 O 1 SWE_B 194 0 Z
bit 201 O 1 SCAS_B 194 0 Z
bit 200 O 1 SCKE 194 0 Z
bit 199 O 1 SRAS_B 194 0 Z
bit 198 O 1 SMS_B3 194 0 Z
bit 197 O 1 SMS_B2 194 0 Z
bit 196 O 1 SMS_B1 194 0 Z
bit 195 O 1 SMS_B0 194 0 Z
bit 194 C 0 *
bit 193 I 1 ARDY
bit 192 O 1 ARE_B 189 0 Z
bit 191 O 1 AOE_B 189 0 Z
bit 190 O 1 AWE_B 189 0 Z
bit 189 C 0 *
bit 188 O 1 AMS_B0 189 0 Z
bit 187 O 1 AMS_B1 189 0 Z
bit 186 O 1 AMS_B2 189 0 Z
bit 185 O 1 AMS_B3 189 0 Z
bit 184 O 1 ADDR9 175 0 Z
bit 183 O 1 ADDR10 175 0 Z
bit 182 O 1 ADDR11 175 0 Z
bit 181 O 1 ADDR12 175 0 Z
bit 180 O 1 ADDR13 175 0 Z
bit 179 O 1 ADDR14 175 0 Z
bit 178 O 1 ADDR15 175 0 Z
bit 177 O 1 ADDR16 175 0 Z
bit 176 O 1 ADDR17 175 0 Z
bit 175 C 0 *
bit 174 O 1 ADDR18 175 0 Z
bit 173 O 1 ADDR19 175 0 Z
bit 172 O 1 ADDR20 175 0 Z
bit 171 O 1 ADDR21 175 0 Z
bit 170 O 1 ADDR22 175 0 Z
bit 169 O 1 ADDR23 175 0 Z
bit 168 O 1 ADDR24 175 0 Z
bit 167 O 1 ADDR25 175 0 Z
bit 166 I 1 PPI2_CLK
bit 165 I 1 PPI1_CLK
bit 164 C 0 *
bit 163 O 1 PPI1_SYNC3 164 0 Z
bit 162 I 1 PPI1_SYNC3
bit 161 C 0 *
bit 160 O 1 PPI1_SYNC2 161 0 Z
bit 159 I 1 PPI1_SYNC2
bit 158 C 0 *
bit 157 O 1 PPI1_SYNC1 158 0 Z
bit 156 I 1 PPI1_SYNC1
bit 155 C 0 *
bit 154 O 1 PPI1_DATA15 155 0 Z
bit 153 I 1 PPI1_DATA15
bit 152 C 0 *
bit 151 O 1 PPI1_DATA14 152 0 Z
bit 150 I 1 PPI1_DATA14
bit 149 C 0 *
bit 148 O 1 PPI1_DATA13 149 0 Z
bit 147 I 1 PPI1_DATA13
bit 146 C 0 *
bit 145 O 1 PPI1_DATA12 146 0 Z
bit 144 I 1 PPI1_DATA12
bit 143 C 0 *
bit 142 O 1 PPI1_DATA11 143 0 Z
bit 141 I 1 PPI1_DATA11
bit 140 C 0 *
bit 139 O 1 PPI1_DATA10 140 0 Z
bit 138 I 1 PPI1_DATA10
bit 137 I 1 RESET_B
bit 136 I 1 BY_PASS
bit 135 C 0 *
bit 134 O 1 PPI1_DATA9 135 0 Z
bit 133 I 1 PPI1_DATA9
bit 132 C 0 *
bit 131 O 1 PPI1_DATA8 132 0 Z
bit 130 I 1 PPI1_DATA8
bit 129 C 0 *
bit 128 O 1 PPI1_DATA7 129 0 Z
bit 127 I 1 PPI1_DATA7
bit 126 C 0 *
bit 125 O 1 PPI1_DATA6 126 0 Z
bit 124 I 1 PPI1_DATA6
bit 123 C 0 *
bit 122 O 1 PPI1_DATA5 123 0 Z
bit 121 I 1 PPI1_DATA5
bit 120 C 0 *
bit 119 O 1 PPI1_DATA4 120 0 Z
bit 118 I 1 PPI1_DATA4
bit 117 C 0 *
bit 116 O 1 PPI1_DATA3 117 0 Z
bit 115 I 1 PPI1_DATA3
bit 114 C 0 *
bit 113 O 1 PPI1_DATA2 114 0 Z
bit 112 I 1 PPI1_DATA2
bit 111 C 0 *
bit 110 O 1 PPI1_DATA1 111 0 Z
bit 109 I 1 PPI1_DATA1
bit 108 C 0 *
bit 107 O 1 PPI1_DATA0 108 0 Z
bit 106 I 1 PPI1_DATA0
bit 105 C 0 *
bit 104 O 1 PPI2_SYNC3 105 0 Z
bit 103 I 1 PPI2_SYNC3
bit 102 C 0 *
bit 101 O 1 PPI2_SYNC2 102 0 Z
bit 100 I 1 PPI2_SYNC2
bit 99 C 0 *
bit 98 O 1 PPI2_SYNC1 99 0 Z
bit 97 I 1 PPI2_SYNC1
bit 96 C 0 *
bit 95 O 1 PPI2_DATA15 96 0 Z
bit 94 I 1 PPI2_DATA15
bit 93 C 0 *
bit 92 O 1 PPI2_DATA14 93 0 Z
bit 91 I 1 PPI2_DATA14
bit 90 C 0 *
bit 89 O 1 PPI2_DATA13 90 0 Z
bit 88 I 1 PPI2_DATA13
bit 87 C 0 *
bit 86 O 1 PPI2_DATA12 87 0 Z
bit 85 I 1 PPI2_DATA12
bit 84 C 0 *
bit 83 O 1 PPI2_DATA11 84 0 Z
bit 82 I 1 PPI2_DATA11
bit 81 C 0 *
bit 80 O 1 PPI2_DATA10 81 0 Z
bit 79 I 1 PPI2_DATA10
bit 78 C 0 *
bit 77 O 1 PPI2_DATA9 78 0 Z
bit 76 I 1 PPI2_DATA9
bit 75 C 0 *
bit 74 O 1 PPI2_DATA8 75 0 Z
bit 73 I 1 PPI2_DATA8
bit 72 C 0 *
bit 71 O 1 PPI2_DATA7 72 0 Z
bit 70 I 1 PPI2_DATA7
bit 69 C 0 *
bit 68 O 1 PPI2_DATA6 69 0 Z
bit 67 I 1 PPI2_DATA6
bit 66 C 0 *
bit 65 O 1 PPI2_DATA5 66 0 Z
bit 64 I 1 PPI2_DATA5
bit 63 C 0 *
bit 62 O 1 PPI2_DATA4 63 0 Z
bit 61 I 1 PPI2_DATA4
bit 60 C 0 *
bit 59 O 1 PPI2_DATA3 60 0 Z
bit 58 I 1 PPI2_DATA3
bit 57 C 0 *
bit 56 O 1 PPI2_DATA2 57 0 Z
bit 55 I 1 PPI2_DATA2
bit 54 C 0 *
bit 53 O 1 PPI2_DATA1 54 0 Z
bit 52 I 1 PPI2_DATA1
bit 51 C 0 *
bit 50 O 1 PPI2_DATA0 51 0 Z
bit 49 I 1 PPI2_DATA0
bit 48 C 0 *
bit 47 O 1 PF0 48 0 Z
bit 46 I 1 PF0
bit 45 C 0 *
bit 44 O 1 PF1 45 0 Z
bit 43 I 1 PF1
bit 42 C 0 *
bit 41 O 1 PF2 42 0 Z
bit 40 I 1 PF2
bit 39 C 0 *
bit 38 O 1 PF3 39 0 Z
bit 37 I 1 PF3
bit 36 C 0 *
bit 35 O 1 PF4 36 0 Z
bit 34 I 1 PF4
bit 33 C 0 *
bit 32 O 1 PF5 33 0 Z
bit 31 I 1 PF5
bit 30 C 0 *
bit 29 O 1 PF6 30 0 Z
bit 28 I 1 PF6
bit 27 C 0 *
bit 26 O 1 PF7 27 0 Z
bit 25 I 1 PF7
bit 24 C 0 *
bit 23 O 1 PF8 24 0 Z
bit 22 I 1 PF8
bit 21 C 0 *
bit 20 O 1 PF9 21 0 Z
bit 19 I 1 PF9
bit 18 C 0 *
bit 17 O 1 PF10 18 0 Z
bit 16 I 1 PF10
bit 15 C 0 *
bit 14 O 1 PF11 15 0 Z
bit 13 I 1 PF11
bit 12 C 0 *
bit 11 O 1 PF12 12 0 Z
bit 10 I 1 PF12
bit 9 C 0 *
bit 8 O 1 PF13 9 0 Z
bit 7 I 1 PF13
bit 6 C 0 *
bit 5 O 1 PF14 6 0 Z
bit 4 I 1 PF14
bit 3 C 0 *
bit 2 O 1 PF15 3 0 Z
bit 1 I 1 PF15
bit 0 I 1 NMI_1

@ -0,0 +1,32 @@
#
# $Id: STEPPINGS v 1.0 20/09/2006 $
#
# Copyright (C) 2006 Kila Medical Systems.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Lesly A.M <leslyam@kila.com>, 2006
#
# Documentation:
# [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
#
#
# bits 31-28 of the Device Identification Register
0000 sharc21065l 0
0001 sharc21065l 1
0010 sharc21065l 2
0011 sharc21065l 3

@ -0,0 +1,515 @@
#
# $Id: sharc21065l,v 1.0 20/09/2006 $
#
# JTAG declarations for ADSP SHARC 21065L
# Copyright (C) 2006 Kila Medical Systems.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Lesly A.M <leslyam@kila.com>, 2006
#
# Documentation:
# [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
# [2] Analog Devices Inc.,"BSDL Description for ADSP-21065L: MBGA Package", BSDL rev 1.1
# http://www.analog.com/UploadedFiles/BSDL_Files/435954194035486111591903bsdl_21065l_bga.txt
#
#
signal ADDR0
signal ADDR1
signal ADDR2
signal ADDR3
signal ADDR4
signal ADDR5
signal ADDR6
signal ADDR7
signal ADDR8
signal ADDR9
signal ADDR10
signal ADDR11
signal ADDR12
signal ADDR13
signal ADDR14
signal ADDR15
signal ADDR16
signal ADDR17
signal ADDR18
signal ADDR19
signal ADDR20
signal ADDR21
signal ADDR22
signal ADDR23
signal DATA0
signal DATA1
signal DATA2
signal DATA3
signal DATA4
signal DATA5
signal DATA6
signal DATA7
signal DATA8
signal DATA9
signal DATA10
signal DATA11
signal DATA12
signal DATA13
signal DATA14
signal DATA15
signal DATA16
signal DATA17
signal DATA18
signal DATA19
signal DATA20
signal DATA21
signal DATA22
signal DATA23
signal DATA24
signal DATA25
signal DATA26
signal DATA27
signal DATA28
signal DATA29
signal DATA30
signal DATA31
signal MS0
signal MS1
signal MS2
signal MS3
signal RD_B
signal WR_B
signal SW_B
signal ACK
signal TS_B
signal IRQ0_B
signal IRQ1_B
signal IRQ2_B
signal FLAG0
signal FLAG1
signal FLAG2
signal FLAG3
signal FLAG4
signal FLAG5
signal FLAG6
signal FLAG7
signal FLAG8
signal FLAG9
signal FLAG10
signal FLAG11
signal HBR_B
signal HBG_B
signal CS_B
signal REDY
signal DMAR1_B
signal DMAR2_B
signal DMAG1_B
signal DMAG2_B
signal BR1
signal BR2
signal ID0
signal ID1
signal CPA_B
signal DT0A
signal DT0B
signal DR0A
signal DR0B
signal TCLK0
signal RCLK0
signal TFS0
signal RFS0
signal DT1A
signal DT1B
signal DR1A
signal DR1B
signal TCLK1
signal RCLK1
signal TFS1
signal RFS1
signal BSEL
signal BMS_B
signal CLKIN
signal RESET_B
signal TCK
signal TMS
signal TDI
signal TDO
signal TRST
signal EMU
signal BMSTR
signal SDWE_B
signal SDA10
signal CAS_B
signal RAS_B
signal DQM
signal SDCKE
signal SDCLK0
signal SDCLK1
signal PWM_EVENT0
signal PWM_EVENT1
signal VDD0
signal VDD1
signal VDD2
signal VDD3
signal VDD4
signal VDD5
signal VDD6
signal VDD7
signal VDD8
signal VDD9
signal VDD10
signal VDD11
signal VDD12
signal VDD13
signal VDD14
signal VDD15
signal VDD16
signal VDD17
signal VDD18
signal VDD19
signal VDD20
signal VDD21
signal GND0
signal GND1
signal GND2
signal GND3
signal GND4
signal GND5
signal GND6
signal GND7
signal GND8
signal GND9
signal GND10
signal GND11
signal GND12
signal GND13
signal GND14
signal GND15
signal GND16
signal GND17
signal GND18
signal GND19
signal GND20
signal GND21
signal GND22
signal GND23
signal GND24
signal GND25
signal GND26
signal GND27
signal GND28
signal GND29
signal GND30
signal GND31
signal GND32
signal GND33
register BSR 285
register BR 1
register DIR 32
instruction length 5
instruction BYPASS 11111 BR
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
bit 284 O 1 EMU 278 0 Z
bit 283 I 1 ID0
bit 282 I 1 ID1
bit 281 O 1 *
bit 280 O 1 *
bit 279 O 1 *
bit 278 C 0 *
bit 277 C 0 *
bit 276 I 1 FLAG4
bit 275 O 1 FLAG4 277 0 Z
bit 274 I 1 FLAG5
bit 273 O 1 FLAG5 270 0 Z
bit 272 I 1 FLAG6
bit 271 O 1 FLAG6 269 0 Z
bit 270 C 0 *
bit 269 C 0 *
bit 268 C 0 *
bit 267 I 1 FLAG7
bit 266 O 1 FLAG7 268 0 Z
bit 265 I 1 DATA31
bit 264 O 1 DATA31 243 0 Z
bit 263 I 1 DATA30
bit 262 O 1 DATA30 243 0 Z
bit 261 I 1 DATA29
bit 260 O 1 DATA29 243 0 Z
bit 259 I 1 DATA28
bit 258 O 1 DATA28 243 0 Z
bit 257 I 1 DATA27
bit 256 O 1 DATA27 243 0 Z
bit 255 I 1 DATA26
bit 254 O 1 DATA26 243 0 Z
bit 253 I 1 DATA25
bit 252 O 1 DATA25 243 0 Z
bit 251 I 1 DATA24
bit 250 O 1 DATA24 243 0 Z
bit 249 I 1 DATA23
bit 248 O 1 DATA23 243 0 Z
bit 247 I 1 DATA22
bit 246 O 1 DATA22 243 0 Z
bit 245 I 1 DATA21
bit 244 O 1 DATA21 243 0 Z
bit 243 C 0 *
bit 242 O 1 *
bit 241 O 1 *
bit 240 O 1 *
bit 239 I 1 DATA20
bit 238 O 1 DATA20 243 0 Z
bit 237 I 1 DATA19
bit 236 O 1 DATA19 243 0 Z
bit 235 I 1 DATA18
bit 234 O 1 DATA18 243 0 Z
bit 233 I 1 DATA17
bit 232 O 1 DATA17 243 0 Z
bit 231 I 1 DATA16
bit 230 O 1 DATA16 243 0 Z
bit 229 I 1 DATA15
bit 228 O 1 DATA15 243 0 Z
bit 227 I 1 DATA14
bit 226 O 1 DATA14 243 0 Z
bit 225 O 1 *
bit 224 O 1 *
bit 223 O 1 *
bit 222 O 1 *
bit 221 O 1 *
bit 220 O 1 *
bit 219 I 1 DATA13
bit 218 O 1 DATA13 209 0 Z
bit 217 I 1 DATA12
bit 216 O 1 DATA12 209 0 Z
bit 215 I 1 DATA11
bit 214 O 1 DATA11 209 0 Z
bit 213 I 1 DATA10
bit 212 O 1 DATA10 209 0 Z
bit 211 I 1 DATA9
bit 210 O 1 DATA9 209 0 Z
bit 209 C 0 *
bit 208 I 1 DATA8
bit 207 O 1 DATA8 209 0 Z
bit 206 I 1 DATA7
bit 205 O 1 DATA7 209 0 Z
bit 204 I 1 DATA6
bit 203 O 1 DATA6 209 0 Z
bit 202 I 1 DATA5
bit 201 O 1 DATA5 209 0 Z
bit 200 I 1 DATA4
bit 199 O 1 DATA4 209 0 Z
bit 198 I 1 DATA3
bit 197 O 1 DATA3 209 0 Z
bit 196 I 1 DATA2
bit 195 O 1 DATA2 209 0 Z
bit 194 I 1 DATA1
bit 193 O 1 DATA1 209 0 Z
bit 192 I 1 DATA0
bit 191 O 1 DATA0 209 0 Z
bit 190 C 0 *
bit 189 I 1 FLAG8
bit 188 O 1 FLAG8 190 0 Z
bit 187 I 1 FLAG9
bit 186 O 1 FLAG9 183 0 Z
bit 185 I 1 FLAG10
bit 184 O 1 FLAG10 182 0 Z
bit 183 C 0 *
bit 182 C 0 *
bit 181 C 0 *
bit 180 I 1 FLAG11
bit 179 O 1 FLAG11 181 0 Z
bit 178 I 1 MS3
bit 177 O 1 MS3 153 0 Z
bit 176 I 1 MS2
bit 175 O 1 MS2 153 0 Z
bit 174 I 1 MS1
bit 173 O 1 MS1 153 0 Z
bit 172 I 1 MS0
bit 171 O 1 MS0 153 0 Z
bit 170 I 1 ACK
bit 169 O 1 ACK 167 0 Z
bit 168 O 1 *
bit 167 C 0 *
bit 166 I 1 CPA_B
bit 165 O 1 CPA_B 165 1 Z
bit 164 I 1 SW_B
bit 163 O 1 SW_B 153 0 Z
bit 162 O 1 REDY 161 0 Z
bit 161 C 0 *
bit 160 I 1 RD_B
bit 159 O 1 RD_B 153 0 Z
bit 158 I 1 WR_B
bit 157 O 1 WR_B 153 0 Z
bit 156 O 1 *
bit 155 I 1 TS_B
bit 154 I 1 CS_B
bit 153 C 0 *
bit 152 O 1 BMSTR
bit 151 I 1 HBG_B
bit 150 O 1 HBG_B 147 0 Z
bit 149 O 1 DMAG2_B 153 0 Z
bit 148 O 1 DMAG1_B 153 0 Z
bit 147 C 0 *
bit 146 O 1 SDA10 131 0 Z
bit 145 I 1 SDCKE
bit 144 O 1 SDCKE 131 0 Z
bit 143 O 1 DQM 131 0 Z
bit 142 I 1 SDWE_B
bit 141 O 1 SDWE_B 131 0 Z
bit 140 I 1 CAS_B
bit 139 O 1 CAS_B 131 0 Z
bit 138 I 1 RAS_B
bit 137 O 1 RAS_B 131 0 Z
bit 136 I 1 HBR_B
bit 135 I 1 DMAR2_B
bit 134 I 1 DMAR1_B
bit 133 I 1 SDCLK0
bit 132 O 1 SDCLK0 131 0 Z
bit 131 C 0 *
bit 130 I 1 SDCLK1
bit 129 O 1 SDCLK1 128 0 Z
bit 128 C 0 *
bit 127 I 1 CLKIN
bit 126 I 1 BR2
bit 125 O 1 BR2 120 0 Z
bit 124 I 1 BR1
bit 123 O 1 BR1 119 0 Z
bit 122 I 1 PWM_EVENT0
bit 121 O 1 PWM_EVENT0 118 0 Z
bit 120 C 0 *
bit 119 C 0 *
bit 118 C 0 *
bit 117 C 0 *
bit 116 I 1 PWM_EVENT1
bit 115 O 1 PWM_EVENT1 117 0 Z
bit 114 O 1 DT1B 112 0 Z
bit 113 O 1 DT1A 111 0 Z
bit 112 C 0 *
bit 111 C 0 *
bit 110 C 0 *
bit 109 I 1 TCLK1
bit 108 O 1 TCLK1 110 0 Z
bit 107 I 1 TFS1
bit 106 O 1 TFS1 101 0 Z
bit 105 I 1 DR1B
bit 104 I 1 DR1A
bit 103 I 1 RCLK1
bit 102 O 1 RCLK1 100 0 Z
bit 101 C 0 *
bit 100 C 0 *
bit 99 C 0 *
bit 98 I 1 RFS1
bit 97 O 1 RFS1 99 0 Z
bit 96 O 1 DT0B 94 0 Z
bit 95 O 1 DT0A 93 0 Z
bit 94 C 0 *
bit 93 C 0 *
bit 92 C 0 *
bit 91 I 1 TCLK0
bit 90 O 1 TCLK0 92 0 Z
bit 89 I 1 TFS0
bit 88 O 1 TFS0 83 0 Z
bit 87 I 1 DR0B
bit 86 I 1 DR0A
bit 85 I 1 RCLK0
bit 84 O 1 RCLK0 82 0 Z
bit 83 C 0 *
bit 82 C 0 *
bit 81 C 0 *
bit 80 I 1 RFS0
bit 79 O 1 RFS0 81 0 Z
bit 78 O 1 *
bit 77 O 1 *
bit 76 O 1 *
bit 75 I 1 IRQ2_B
bit 74 I 1 IRQ1_B
bit 73 I 1 IRQ0_B
bit 72 O 1 *
bit 71 O 1 *
bit 70 O 1 *
bit 69 O 1 *
bit 68 O 1 *
bit 67 O 1 *
bit 66 I 1 FLAG3
bit 65 O 1 FLAG3 64 0 Z
bit 64 C 0 *
bit 63 C 0 *
bit 62 I 1 FLAG2
bit 61 O 1 FLAG2 63 0 Z
bit 60 I 1 FLAG1
bit 59 O 1 FLAG1 56 0 Z
bit 58 I 1 FLAG0
bit 57 O 1 FLAG0 55 0 Z
bit 56 C 0 *
bit 55 C 0 *
bit 54 I 1 ADDR0
bit 53 O 1 ADDR0 36 0 Z
bit 52 I 1 ADDR1
bit 51 O 1 ADDR1 36 0 Z
bit 50 I 1 ADDR2
bit 49 O 1 ADDR2 36 0 Z
bit 48 I 1 ADDR3
bit 47 O 1 ADDR3 36 0 Z
bit 46 I 1 ADDR4
bit 45 O 1 ADDR4 36 0 Z
bit 44 I 1 ADDR5
bit 43 O 1 ADDR5 36 0 Z
bit 42 I 1 ADDR6
bit 41 O 1 ADDR6 36 0 Z
bit 40 I 1 ADDR7
bit 39 O 1 ADDR7 36 0 Z
bit 38 I 1 ADDR8
bit 37 O 1 ADDR8 36 0 Z
bit 36 C 0 *
bit 35 I 1 ADDR9
bit 34 O 1 ADDR9 36 0 Z
bit 33 I 1 ADDR10
bit 32 O 1 ADDR10 36 0 Z
bit 31 I 1 ADDR11
bit 30 O 1 ADDR11 36 0 Z
bit 29 I 1 ADDR12
bit 28 O 1 ADDR12 36 0 Z
bit 27 I 1 ADDR13
bit 26 O 1 ADDR13 36 0 Z
bit 25 I 1 ADDR14
bit 24 O 1 ADDR14 36 0 Z
bit 23 I 1 ADDR15
bit 22 O 1 ADDR15 36 0 Z
bit 21 I 1 ADDR16
bit 20 O 1 ADDR16 36 0 Z
bit 19 I 1 ADDR17
bit 18 O 1 ADDR17 36 0 Z
bit 17 I 1 ADDR18
bit 16 O 1 ADDR18 36 0 Z
bit 15 I 1 ADDR19
bit 14 O 1 ADDR19 36 0 Z
bit 13 I 1 ADDR20
bit 12 O 1 ADDR20 36 0 Z
bit 11 I 1 ADDR21
bit 10 O 1 ADDR21 36 0 Z
bit 9 I 1 ADDR22
bit 8 O 1 ADDR22 36 0 Z
bit 7 I 1 ADDR23
bit 6 O 1 ADDR23 36 0 Z
bit 5 I 1 RESET_B
bit 4 C 0 *
bit 3 O 1 *
bit 2 I 1 BMS_B
bit 1 O 1 BMS_B 4 0 Z
bit 0 I 1 BSEL
initbus SHARC_21065L

@ -0,0 +1,52 @@
#
# $Id$
#
# JTAG declarations for Atheros AR2312
# Copyright (C) 2005 Marek Michalkiewicz
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
#
register BR 1
register BSR 1
register DIR 32
register EJIMPCODE 32
register EJADDRESS 32
register EJDATA 32
register EJCONTROL 32
register EJALL 96
register EJFASTDATA 33
instruction length 5
instruction BYPASS 11111 BR
instruction SAMPLE/PRELOAD 00010 BSR
instruction IDCODE 00001 DIR
instruction EJTAG_IMPCODE 00011 EJIMPCODE
instruction EJTAG_ADDRESS 01000 EJADDRESS
instruction EJTAG_DATA 01001 EJDATA
instruction EJTAG_CONTROL 01010 EJCONTROL
instruction EJTAG_ALL 01011 EJALL
instruction EJTAGBOOT 01100 BR
instruction NORMALBOOT 01101 BR
instruction EJTAG_FASTDATA 01110 EJFASTDATA
initbus ejtag
endian big
#Enable flash read/write
poke 0x58400000 0x100e3ce1

@ -0,0 +1,45 @@
#
# $Id$
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002.
# Modified by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007.
#
# Documentation:
# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
#
# [2] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
# ATF1504ASV/ASVL
#
# [3] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
#
# bits 27-12 of the Device Identification Register
1001011100000010 atmega128 ATmega128 # see Table 100 in [1]
0101101100000110 at91sam7s64 AT91SAM7S64
0101101100000111 at91sam7s32 AT91SAM7S32
0101101100001001 at91sam7s256 AT91SAM7S256
0101101100001010 at91sam7s128 AT91SAM7S128
0101101100001100 at91sam7s321 AT91SAM7S321
0001010100010100 atf15xx ATF1504ASV # see 1504ASV_J44.bsd
# in [2]
0001111010000010 at32ap7000 AT32AP7000 # see Table 38-11 in [3]

@ -0,0 +1,30 @@
#
# $Id$
#
# Copyright (c) 2008 Gabor Juhos <juhosg@openwrt.org>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Documentation:
# [1] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
#
# bits 31-28 of the Device Identification Register
# see Table 38-11 in [1]
0000 at32ap7000 A
0001 at32ap7000 B
0010 at32ap7000 C

@ -0,0 +1,732 @@
#
# $Id$
#
# Copyright (c) 2008 Gabor Juhos <juhosg@openwrt.org>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Documentation:
# [1] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
# http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
#
# mandatory data registers
register BSR 388 # Boundary Scan Register
register BR 1 # Bypass Register
# optional data registers
register DIR 32 # Device Identification Register
# user-defined registers
register ARR 5 # AVR Reset Register
register NAR 34 # Nexus Access Register
register MWAR 35 # Memory Word Access Register
register MBAR 34 # Memory Block Access Register
register CAR 1 # Cancel Access Register
register SYR 16 # Sync Register
# see page 909 in [1]
instruction length 5
# mandatory instructions
instruction EXTEST 00000 BSR # see page 914 in [1]
instruction IDCODE 00001 DIR # see page 914 in [1]
instruction SAMPLE/PRELOAD 00010 BSR # see page 914 in [1]
instruction BYPASS 01111 BR # see page 915 in [1]
# optional instructions
instruction INTEST 00100 BSR # see page 914 in [1]
instruction CLAMP 00110 BR # see page 915 in [1]
# user-defined instructions
instruction AVR_RESET 01100 ARR # see page 919 in [1]
instruction NEXUS_ACCESS 10000 NAR # see page 916 in [1]
instruction MEMORY_WORD_ACCESS 10001 MWAR # see page 917 in [1]
instruction MEMORY_BLOCK_ACCESS 10010 MBAR # see page 918 in [1]
instruction CANCEL_ACCESS 10011 CAR # see page 918 in [1]
instruction SYNC 10111 SYR # see page 919 in [1]
# undocumented instructions, detected by the "discovery" command:
#Detecting DR length for IR 11000 ... 35
#Detecting DR length for IR 11001 ... 32
#Detecting DR length for IR 11010 ... 35
#Detecting DR length for IR 11011 ... 64
#Detecting DR length for IR 11111 ... 1 # probably BYPASS
signal AGNDOSC
signal AGNDPLL
signal AGNDUSB
signal AVDDOSC
signal AVDDPLL
signal AVDDUSB
signal EVTI_N
signal FSDM
signal FSDP
signal GNDCORE_0
signal GNDCORE_1
signal GNDCORE_2
signal GNDCORE_3
signal GNDCORE_4
signal GNDCORE_5
signal GNDIOP_CBL
signal GNDIOP_CBR
signal GNDIOP_CUL
signal GNDIOP_CUR
signal GNDIOP_0
signal GNDIOP_1
signal GNDIOP_2
signal GNDIOP_3
signal GNDIOP_4a
signal GNDIOP_4b
signal GNDIOP_6a
signal GNDIOP_6b
signal GNDIOP_7
signal GNDIOP_8a
signal GNDIOP_8b
signal GNDIOP_9a
signal GNDIOP_9b
signal GNDIOP_10
signal HSDM
signal HSDP
signal OSCEN_N
signal PA00
signal PA01
signal PA02
signal PA03
signal PA04
signal PA05
signal PA06
signal PA07
signal PA08
signal PA09
signal PA10
signal PA11
signal PA12
signal PA13
signal PA14
signal PA15
signal PA16
signal PA17
signal PA18
signal PA19
signal PA20
signal PA21
signal PA22
signal PA23
signal PA24
signal PA25
signal PA26
signal PA27
signal PA28
signal PA29
signal PA30
signal PA31
signal PB00
signal PB01
signal PB02
signal PB03
signal PB04
signal PB05
signal PB06
signal PB07
signal PB08
signal PB09
signal PB10
signal PB11
signal PB12
signal PB13
signal PB14
signal PB15
signal PB16
signal PB17
signal PB18
signal PB19
signal PB20
signal PB21
signal PB22
signal PB23
signal PB24
signal PB25
signal PB26
signal PB27
signal PB28
signal PB29
signal PB30
signal PC00
signal PC01
signal PC02
signal PC03
signal PC04
signal PC05
signal PC06
signal PC07
signal PC08
signal PC09
signal PC10
signal PC11
signal PC12
signal PC13
signal PC14
signal PC15
signal PC16
signal PC17
signal PC18
signal PC19
signal PC20
signal PC21
signal PC22
signal PC23
signal PC24
signal PC25
signal PC26
signal PC27
signal PC28
signal PC29
signal PC30
signal PC31
signal PD00
signal PD01
signal PD02
signal PD03
signal PD04
signal PD05
signal PD06
signal PD07
signal PD08
signal PD09
signal PD10
signal PD11
signal PD12
signal PD13
signal PD14
signal PD15
signal PD16
signal PD17
signal PE00
signal PE01
signal PE02
signal PE03
signal PE04
signal PE05
signal PE06
signal PE07
signal PE08
signal PE09
signal PE10
signal PE11
signal PE12
signal PE13
signal PE14
signal PE15
signal PE16
signal PE17
signal PE18
signal PE19
signal PE20
signal PE21
signal PE22
signal PE23
signal PE24
signal PE25
signal PE26
signal PLL0
signal PLL1
signal PX00
signal PX01
signal PX02
signal PX03
signal PX04
signal PX05
signal PX06
signal PX07
signal PX08
signal PX09
signal PX10
signal PX11
signal PX12
signal PX13
signal PX14
signal PX15
signal PX16
signal PX17
signal PX18
signal PX19
signal PX20
signal PX21
signal PX22
signal PX23
signal PX24
signal PX25
signal PX26
signal PX27
signal PX28
signal PX29
signal PX30
signal PX31
signal PX32
signal PX33
signal PX34
signal PX35
signal PX36
signal PX37
signal PX38
signal PX39
signal PX40
signal PX41
signal PX42
signal PX43
signal PX44
signal PX45
signal PX46
signal PX47
signal PX48
signal PX49
signal PX50
signal PX51
signal PX52
signal PX53
signal RESET_N
signal TCK
signal TDI
signal TDO
signal TMS
signal TRST_N
signal VBG
signal VDDCORE_0
signal VDDCORE_1
signal VDDCORE_2
signal VDDCORE_3
signal VDDCORE_4
signal VDDIOP_CBL
signal VDDIOP_CBR
signal VDDIOP_CUL
signal VDDIOP_CUR
signal VDDIOP_0a
signal VDDIOP_0b
signal VDDIOP_1
signal VDDIOP_2a
signal VDDIOP_2b
signal VDDIOP_3
signal VDDIOP_4a
signal VDDIOP_4b
signal VDDIOP_6a
signal VDDIOP_6b
signal VDDIOP_7
signal VDDIOP_8a
signal VDDIOP_8b
signal VDDIOP_9a
signal VDDIOP_9b
signal VDDIOP_10a
signal VDDIOP_10b
signal VDDIOP_11
signal WAKE_N
signal XIN0
signal XIN1
signal XIN32
signal XOUT0
signal XOUT1
# Boundary Scan Register bits
bit 387 C 1 *
bit 386 B 1 PD00 387 1 Z
bit 385 C 1 *
bit 384 B 1 PD01 385 1 Z
bit 383 C 1 *
bit 382 B 1 PD02 383 1 Z
bit 381 C 1 *
bit 380 B 1 PE17 381 1 Z
bit 379 C 1 *
bit 378 B 1 PE18 379 1 Z
bit 377 C 1 *
bit 376 B 1 PX47 377 1 Z
bit 375 C 1 *
bit 374 B 1 PX48 375 1 Z
bit 373 C 1 *
bit 372 B 1 PX49 373 1 Z
bit 371 C 1 *
bit 370 B 1 PX50 371 1 Z
bit 369 C 1 *
bit 368 B 1 PX51 369 1 Z
bit 367 C 1 *
bit 366 B 1 PX32 367 1 Z
bit 365 C 1 *
bit 364 B 1 PX33 365 1 Z
bit 363 C 1 *
bit 362 B 1 PX00 363 1 Z
bit 361 C 1 *
bit 360 B 1 PX01 361 1 Z
bit 359 C 1 *
bit 358 B 1 PX02 359 1 Z
bit 357 C 1 *
bit 356 B 1 PX03 357 1 Z
bit 355 C 1 *
bit 354 B 1 PX04 355 1 Z
bit 353 C 1 *
bit 352 B 1 PX05 353 1 Z
bit 351 C 1 *
bit 350 B 1 PD03 351 1 Z
bit 349 C 1 *
bit 348 B 1 PD04 349 1 Z
bit 347 C 1 *
bit 346 B 1 PD05 347 1 Z
bit 345 C 1 *
bit 344 B 1 PD06 345 1 Z
bit 343 C 1 *
bit 342 B 1 PD07 343 1 Z
bit 341 C 1 *
bit 340 B 1 PD08 341 1 Z
bit 339 C 1 *
bit 338 B 1 PD09 339 1 Z
bit 337 C 1 *
bit 336 B 1 PA00 337 1 Z
bit 335 C 1 *
bit 334 B 1 PA01 335 1 Z
bit 333 C 1 *
bit 332 B 1 PA02 333 1 Z
bit 331 C 1 *
bit 330 B 1 PA03 331 1 Z
bit 329 C 1 *
bit 328 B 1 PA04 329 1 Z
bit 327 C 1 *
bit 326 B 1 PA05 327 1 Z
bit 325 C 1 *
bit 324 B 1 PB24 325 1 Z
bit 323 C 1 *
bit 322 B 1 PB25 323 1 Z
bit 321 C 1 *
bit 320 B 1 PA08 321 1 Z
bit 319 C 1 *
bit 318 B 1 PA09 319 1 Z
bit 317 C 1 *
bit 316 B 1 PA10 317 1 Z
bit 315 C 1 *
bit 314 B 1 PA11 315 1 Z
bit 313 C 1 *
bit 312 B 1 PA12 313 1 Z
bit 311 C 1 *
bit 310 B 1 PA13 311 1 Z
bit 309 C 1 *
bit 308 B 1 PA14 309 1 Z
bit 307 C 1 *
bit 306 B 1 PA15 307 1 Z
bit 305 C 1 *
bit 304 B 1 PA16 305 1 Z
bit 303 C 1 *
bit 302 B 1 PA17 303 1 Z
bit 301 C 1 *
bit 300 B 1 PA18 301 1 Z
bit 299 C 1 *
bit 298 B 1 PA19 299 1 Z
bit 297 C 1 *
bit 296 B 1 PA20 297 1 Z
bit 295 C 1 *
bit 294 B 1 PA21 295 1 Z
bit 293 C 1 *
bit 292 B 1 PA22 293 1 Z
bit 291 C 1 *
bit 290 B 1 PD10 291 1 Z
bit 289 C 1 *
bit 288 B 1 PA23 289 1 Z
bit 287 C 1 *
bit 286 B 1 PA24 287 1 Z
bit 285 C 1 *
bit 284 B 1 PD11 285 1 Z
bit 283 C 1 *
bit 282 B 1 PD12 283 1 Z
bit 281 C 1 *
bit 280 B 1 PD13 281 1 Z
bit 279 C 1 *
bit 278 B 1 PD14 279 1 Z
bit 277 C 1 *
bit 276 B 1 PD15 277 1 Z
bit 275 C 1 *
bit 274 B 1 PD16 275 1 Z
bit 273 C 1 *
bit 272 B 1 PD17 273 1 Z
bit 271 C 1 *
bit 270 B 1 PA25 271 1 Z
bit 269 C 1 *
bit 268 B 1 PA26 269 1 Z
bit 267 C 1 *
bit 266 B 1 PA27 267 1 Z
bit 265 C 1 *
bit 264 B 1 PA28 265 1 Z
bit 263 C 1 *
bit 262 B 1 PA29 263 1 Z
bit 261 C 1 *
bit 260 B 1 PA30 261 1 Z
bit 259 C 1 *
bit 258 B 1 PA31 259 1 Z
bit 257 C 1 *
bit 256 B 1 PB26 257 1 Z
bit 255 C 1 *
bit 254 B 1 PB27 255 1 Z
bit 253 C 1 *
bit 252 B 1 PB28 253 1 Z
bit 251 C 1 *
bit 250 B 1 PX53 251 1 Z
bit 249 C 1 *
bit 248 B 1 PX52 249 1 Z
bit 247 C 1 *
bit 246 B 1 PX41 247 1 Z
bit 245 C 1 *
bit 244 B 1 PE25 245 1 Z
bit 243 C 1 *
bit 242 B 1 PE24 243 1 Z
bit 241 C 1 *
bit 240 B 1 PE23 241 1 Z
bit 239 C 1 *
bit 238 B 1 PE22 239 1 Z
bit 237 C 1 *
bit 236 B 1 PE21 237 1 Z
bit 235 C 1 *
bit 234 B 1 PE20 235 1 Z
bit 233 C 1 *
bit 232 B 1 PE19 233 1 Z
bit 231 C 1 *
bit 230 B 1 PX06 231 1 Z
bit 229 C 1 *
bit 228 B 1 PX07 229 1 Z
bit 227 C 1 *
bit 226 B 1 PX08 227 1 Z
bit 225 C 1 *
bit 224 B 1 PX09 225 1 Z
bit 223 C 1 *
bit 222 B 1 PX10 223 1 Z
bit 221 C 1 *
bit 220 B 1 PX11 221 1 Z
bit 219 C 1 *
bit 218 B 1 PB29 219 1 Z
bit 217 C 1 *
bit 216 B 1 PB30 217 1 Z
bit 215 C 1 *
bit 214 B 1 PX12 215 1 Z
bit 213 C 1 *
bit 212 B 1 PX13 213 1 Z
bit 211 C 1 *
bit 210 B 1 PC01 211 1 Z
bit 209 C 1 *
bit 208 B 1 PC02 209 1 Z
bit 207 C 1 *
bit 206 B 1 PC03 207 1 Z
bit 205 C 1 *
bit 204 B 1 PC04 205 1 Z
bit 203 C 1 *
bit 202 B 1 PC00 203 1 Z
bit 201 C 1 *
bit 200 B 1 PX14 201 1 Z
bit 199 C 1 *
bit 198 B 1 PX15 199 1 Z
bit 197 C 1 *
bit 196 B 1 PX16 197 1 Z
bit 195 C 1 *
bit 194 B 1 PX17 195 1 Z
bit 193 C 1 *
bit 192 B 1 PX34 193 1 Z
bit 191 C 1 *
bit 190 B 1 PX35 191 1 Z
bit 189 C 1 *
bit 188 B 1 PX36 189 1 Z
bit 187 C 1 *
bit 186 B 1 PX37 187 1 Z
bit 185 C 1 *
bit 184 B 1 PX38 185 1 Z
bit 183 C 1 *
bit 182 B 1 PX18 183 1 Z
bit 181 C 1 *
bit 180 B 1 PX19 181 1 Z
bit 179 C 1 *
bit 178 B 1 PX20 179 1 Z
bit 177 C 1 *
bit 176 B 1 PX21 177 1 Z
bit 175 C 1 *
bit 174 B 1 PX22 175 1 Z
bit 173 C 1 *
bit 172 B 1 PX23 173 1 Z
bit 171 C 1 *
bit 170 B 1 PX24 171 1 Z
bit 169 C 1 *
bit 168 B 1 PX25 169 1 Z
bit 167 C 1 *
bit 166 B 1 PX26 167 1 Z
bit 165 C 1 *
bit 164 B 1 PX27 165 1 Z
bit 163 C 1 *
bit 162 B 1 PX28 163 1 Z
bit 161 C 1 *
bit 160 B 1 PX29 161 1 Z
bit 159 C 1 *
bit 158 B 1 PX30 159 1 Z
bit 157 C 1 *
bit 156 B 1 PX31 157 1 Z
bit 155 C 1 *
bit 154 B 1 PC05 155 1 Z
bit 153 C 1 *
bit 152 B 1 PC06 153 1 Z
bit 151 C 1 *
bit 150 B 1 PE26 151 1 Z
bit 149 C 1 *
bit 148 B 1 PX39 149 1 Z
bit 147 C 1 *
bit 146 B 1 PC07 147 1 Z
bit 145 C 1 *
bit 144 B 1 PC08 145 1 Z
bit 143 C 1 *
bit 142 B 1 PC09 143 1 Z
bit 141 C 1 *
bit 140 B 1 PC10 141 1 Z
bit 139 C 1 *
bit 138 B 1 PC11 139 1 Z
bit 137 C 1 *
bit 136 B 1 PC12 137 1 Z
bit 135 C 1 *
bit 134 B 1 PC13 135 1 Z
bit 133 C 1 *
bit 132 B 1 PC14 133 1 Z
bit 131 C 1 *
bit 130 B 1 PC15 131 1 Z
bit 129 C 1 *
bit 128 B 1 PX40 129 1 Z
bit 127 C 1 *
bit 126 B 1 PX42 127 1 Z
bit 125 C 1 *
bit 124 B 1 PX43 125 1 Z
bit 123 C 1 *
bit 122 B 1 PX44 123 1 Z
bit 121 C 1 *
bit 120 B 1 PX45 121 1 Z
bit 119 C 1 *
bit 118 B 1 PX46 119 1 Z
bit 117 C 1 *
bit 116 B 1 PB00 117 1 Z
bit 115 C 1 *
bit 114 B 1 PB01 115 1 Z
bit 113 C 1 *
bit 112 B 1 PB02 113 1 Z
bit 111 C 1 *
bit 110 B 1 PB03 111 1 Z
bit 109 C 1 *
bit 108 B 1 PB04 109 1 Z
bit 107 C 1 *
bit 106 B 1 PB05 107 1 Z
bit 105 C 1 *
bit 104 B 1 PB06 105 1 Z
bit 103 C 1 *
bit 102 B 1 PB07 103 1 Z
bit 101 C 1 *
bit 100 B 1 PB08 101 1 Z
bit 99 C 1 *
bit 98 B 1 PB09 99 1 Z
bit 97 C 1 *
bit 96 B 1 PC16 97 1 Z
bit 95 C 1 *
bit 94 B 1 PC17 95 1 Z
bit 93 C 1 *
bit 92 B 1 PB10 93 1 Z
bit 91 C 1 *
bit 90 B 1 PB11 91 1 Z
bit 89 C 1 *
bit 88 B 1 PB12 89 1 Z
bit 87 C 1 *
bit 86 B 1 PB13 87 1 Z
bit 85 C 1 *
bit 84 B 1 PB14 85 1 Z
bit 83 C 1 *
bit 82 B 1 PB15 83 1 Z
bit 81 C 1 *
bit 80 B 1 PB16 81 1 Z
bit 79 C 1 *
bit 78 B 1 PB17 79 1 Z
bit 77 C 1 *
bit 76 B 1 PB18 77 1 Z
bit 75 C 1 *
bit 74 B 1 PB19 75 1 Z
bit 73 C 1 *
bit 72 B 1 PB20 73 1 Z
bit 71 C 1 *
bit 70 B 1 PB21 71 1 Z
bit 69 C 1 *
bit 68 B 1 PB22 69 1 Z
bit 67 C 1 *
bit 66 B 1 PB23 67 1 Z
bit 65 C 1 *
bit 64 B 1 PC18 65 1 Z
bit 63 C 1 *
bit 62 B 1 PA06 63 1 Z
bit 61 C 1 *
bit 60 B 1 PA07 61 1 Z
bit 59 C 1 *
bit 58 B 1 PC19 59 1 Z
bit 57 C 1 *
bit 56 B 1 PC20 57 1 Z
bit 55 C 1 *
bit 54 B 1 PC21 55 1 Z
bit 53 C 1 *
bit 52 B 1 PC22 53 1 Z
bit 51 C 1 *
bit 50 B 1 PC23 51 1 Z
bit 49 C 1 *
bit 48 B 1 PC24 49 1 Z
bit 47 C 1 *
bit 46 B 1 PC25 47 1 Z
bit 45 C 1 *
bit 44 B 1 PC26 45 1 Z
bit 43 C 1 *
bit 42 B 1 PC27 43 1 Z
bit 41 C 1 *
bit 40 B 1 PC28 41 1 Z
bit 39 C 1 *
bit 38 B 1 PC29 39 1 Z
bit 37 C 1 *
bit 36 B 1 PC30 37 1 Z
bit 35 C 1 *
bit 34 B 1 PC31 35 1 Z
bit 33 C 1 *
bit 32 B 1 PE00 33 1 Z
bit 31 C 1 *
bit 30 B 1 PE01 31 1 Z
bit 29 C 1 *
bit 28 B 1 PE02 29 1 Z
bit 27 C 1 *
bit 26 B 1 PE03 27 1 Z
bit 25 C 1 *
bit 24 B 1 PE04 25 1 Z
bit 23 C 1 *
bit 22 B 1 PE05 23 1 Z
bit 21 C 1 *
bit 20 B 1 PE06 21 1 Z
bit 19 C 1 *
bit 18 B 1 PE07 19 1 Z
bit 17 C 1 *
bit 16 B 1 PE08 17 1 Z
bit 15 C 1 *
bit 14 B 1 PE09 15 1 Z
bit 13 C 1 *
bit 12 B 1 PE10 13 1 Z
bit 11 C 1 *
bit 10 B 1 PE11 11 1 Z
bit 9 C 1 *
bit 8 B 1 PE12 9 1 Z
bit 7 C 1 *
bit 6 B 1 PE13 7 1 Z
bit 5 C 1 *
bit 4 B 1 PE14 5 1 Z
bit 3 C 1 *
bit 2 B 1 PE15 3 1 Z
bit 1 C 1 *
bit 0 B 1 PE16 1 1 Z
endian big

@ -0,0 +1,30 @@
#
# $Id: STEPPINGS,v 1.1 2002/08/23 14:08:33 telka Exp $
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002.
#
# Documentation:
# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
#
# bits 31-28 of the Device Identification Register
# see Table 99 in [1]
0000 at91sam7s_tq64v0 0

@ -0,0 +1,138 @@
signal erase
signal icetck
signal icetdi
signal icetms
signal jtagsel
signal selv32
signal test
signal nrst
signal pa0
signal pa1
signal pa10
signal pa11
signal pa12
signal pa13
signal pa14
signal pa15
signal pa16
signal pa17
signal pa18
signal pa19
signal pa2
signal pa20
signal pa3
signal pa4
signal pa5
signal pa6
signal pa7
signal pa8
signal pa9
register BSR 97
register BR 1
register DIR 32
instruction length 3
instruction BYPASS 111 BR
instruction EXTEST 000 BSR
instruction SAMPLE/PRELOAD 001 BSR
instruction IDCODE 010 DIR
bit 96 I 1 pa17
bit 95 O 1 pa17 94 1 Z
bit 94 C 1 *
bit 93 I 1 pa18
bit 92 O 1 pa18 91 1 Z
bit 91 C 1 *
bit 90 O 1 *
bit 89 O 1 *
bit 88 O 1 *
bit 87 I 1 pa19
bit 86 O 1 pa19 85 1 Z
bit 85 C 1 *
bit 84 I 1 pa20
bit 83 O 1 pa20 82 1 Z
bit 82 C 1 *
bit 81 I 1 pa16
bit 80 O 1 pa16 79 1 Z
bit 79 C 1 *
bit 78 I 1 pa15
bit 77 O 1 pa15 76 1 Z
bit 76 C 1 *
bit 75 I 1 pa14
bit 74 O 1 pa14 73 1 Z
bit 73 C 1 *
bit 72 I 1 pa13
bit 71 O 1 pa13 70 1 Z
bit 70 C 1 *
bit 69 O 1 *
bit 68 O 1 *
bit 67 O 1 *
bit 66 O 1 *
bit 65 O 1 *
bit 64 O 1 *
bit 63 O 1 *
bit 62 O 1 *
bit 61 O 1 *
bit 60 I 1 pa12
bit 59 O 1 pa12 58 1 Z
bit 58 C 1 *
bit 57 I 1 pa11
bit 56 O 1 pa11 55 1 Z
bit 55 C 1 *
bit 54 I 1 pa10
bit 53 O 1 pa10 52 1 Z
bit 52 C 1 *
bit 51 I 1 pa9
bit 50 O 1 pa9 49 1 Z
bit 49 C 1 *
bit 48 I 1 pa8
bit 47 O 1 pa8 46 1 Z
bit 46 C 1 *
bit 45 I 1 pa7
bit 44 O 1 pa7 43 1 Z
bit 43 C 1 *
bit 42 I 1 pa6
bit 41 O 1 pa6 40 1 Z
bit 40 C 1 *
bit 39 I 1 pa5
bit 38 O 1 pa5 37 1 Z
bit 37 C 1 *
bit 36 I 1 pa4
bit 35 O 1 pa4 34 1 Z
bit 34 C 1 *
bit 33 O 1 *
bit 32 O 1 *
bit 31 O 1 *
bit 30 O 1 *
bit 29 O 1 *
bit 28 O 1 *
bit 27 O 1 *
bit 26 O 1 *
bit 25 O 1 *
bit 24 O 1 *
bit 23 O 1 *
bit 22 O 1 *
bit 21 I 1 pa3
bit 20 O 1 pa3 19 1 Z
bit 19 C 1 *
bit 18 I 1 pa2
bit 17 O 1 pa2 16 1 Z
bit 16 C 1 *
bit 15 I 1 pa1
bit 14 O 1 pa1 13 1 Z
bit 13 C 1 *
bit 12 I 1 pa0
bit 11 O 1 pa0 10 1 Z
bit 10 C 1 *
bit 9 O 1 *
bit 8 O 1 *
bit 7 O 1 *
bit 6 O 1 *
bit 5 O 1 *
bit 4 O 1 *
bit 3 O 1 *
bit 2 O 1 *
bit 1 O 1 *
bit 0 I 1 erase

@ -0,0 +1,138 @@
signal erase 55
signal icetck 53
signal icetdi 33
signal icetms 51
signal jtagsel 50
signal selv32 61
signal test 40
signal nrst 39
signal pa0 48
signal pa1 47
signal pa10 29
signal pa11 28
signal pa12 27
signal pa13 22
signal pa14 21
signal pa15 20
signal pa16 19
signal pa17 9
signal pa18 10
signal pa19 13
signal pa2 44
signal pa20 16
signal pa3 43
signal pa4 36
signal pa5 35
signal pa6 34
signal pa7 32
signal pa8 31
signal pa9 30
register BSR 97
register BR 1
register DIR 32
instruction length 3
instruction BYPASS 111 BR
instruction EXTEST 000 BSR
instruction SAMPLE/PRELOAD 001 BSR
instruction IDCODE 010 DIR
bit 96 I 1 pa17
bit 95 O 1 pa17 94 1 Z
bit 94 C 1 *
bit 93 I 1 pa18
bit 92 O 1 pa18 91 1 Z
bit 91 C 1 *
bit 90 O 1 *
bit 89 O 1 *
bit 88 O 1 *
bit 87 I 1 pa19
bit 86 O 1 pa19 85 1 Z
bit 85 C 1 *
bit 84 I 1 pa20
bit 83 O 1 pa20 82 1 Z
bit 82 C 1 *
bit 81 I 1 pa16
bit 80 O 1 pa16 79 1 Z
bit 79 C 1 *
bit 78 I 1 pa15
bit 77 O 1 pa15 76 1 Z
bit 76 C 1 *
bit 75 I 1 pa14
bit 74 O 1 pa14 73 1 Z
bit 73 C 1 *
bit 72 I 1 pa13
bit 71 O 1 pa13 70 1 Z
bit 70 C 1 *
bit 69 O 1 *
bit 68 O 1 *
bit 67 O 1 *
bit 66 O 1 *
bit 65 O 1 *
bit 64 O 1 *
bit 63 O 1 *
bit 62 O 1 *
bit 61 O 1 *
bit 60 I 1 pa12
bit 59 O 1 pa12 58 1 Z
bit 58 C 1 *
bit 57 I 1 pa11
bit 56 O 1 pa11 55 1 Z
bit 55 C 1 *
bit 54 I 1 pa10
bit 53 O 1 pa10 52 1 Z
bit 52 C 1 *
bit 51 I 1 pa9
bit 50 O 1 pa9 49 1 Z
bit 49 C 1 *
bit 48 I 1 pa8
bit 47 O 1 pa8 46 1 Z
bit 46 C 1 *
bit 45 I 1 pa7
bit 44 O 1 pa7 43 1 Z
bit 43 C 1 *
bit 42 I 1 pa6
bit 41 O 1 pa6 40 1 Z
bit 40 C 1 *
bit 39 I 1 pa5
bit 38 O 1 pa5 37 1 Z
bit 37 C 1 *
bit 36 I 1 pa4
bit 35 O 1 pa4 34 1 Z
bit 34 C 1 *
bit 33 O 1 *
bit 32 O 1 *
bit 31 O 1 *
bit 30 O 1 *
bit 29 O 1 *
bit 28 O 1 *
bit 27 O 1 *
bit 26 O 1 *
bit 25 O 1 *
bit 24 O 1 *
bit 23 O 1 *
bit 22 O 1 *
bit 21 I 1 pa3
bit 20 O 1 pa3 19 1 Z
bit 19 C 1 *
bit 18 I 1 pa2
bit 17 O 1 pa2 16 1 Z
bit 16 C 1 *
bit 15 I 1 pa1
bit 14 O 1 pa1 13 1 Z
bit 13 C 1 *
bit 12 I 1 pa0
bit 11 O 1 pa0 10 1 Z
bit 10 C 1 *
bit 9 O 1 *
bit 8 O 1 *
bit 7 O 1 *
bit 6 O 1 *
bit 5 O 1 *
bit 4 O 1 *
bit 3 O 1 *
bit 2 O 1 *
bit 1 O 1 *
bit 0 I 1 erase

@ -0,0 +1,30 @@
#
# $Id: STEPPINGS 20 2005-05-24 02:39:42Z philwil $
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002.
# Modified by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007
#
# Documentation:
# [1] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
# ATF1504ASV/ASVL
#
# bits 31-28 of the Device Identification Register
0000 atf1504asv A

@ -0,0 +1,275 @@
#
# $Id: STEPPINGS 20 2005-05-24 02:39:42Z philwil $
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Generated by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007
# with bsdl2jtag
#
# Documentation:
# [1] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
# ATF1504ASV/ASVL
#
signal IO4
signal IO5
signal IO6
signal IO8
signal IO9
signal IO11
signal IO12
signal IO14
signal IO16
signal IO17
signal IO18
signal IO19
signal IO20
signal IO21
signal IO24
signal IO25
signal IO26
signal IO27
signal IO28
signal IO29
signal IO31
signal IO33
signal IO34
signal IO36
signal IO37
signal IO39
signal IO40
signal IO41
signal TCK
signal TDI
signal TDO
signal TMS
signal DIN1
signal DIN2
signal DIN3
signal DIN4
signal VCC1
signal VCC2
signal VCC3
signal VCC4
signal GND1
signal GND2
signal GND3
register BSR 192
register BR 1
register DIR 32
instruction length 10
instruction EXTEST 0000000000 BSR
instruction BYPASS 1111111111 BR
instruction SAMPLE/PRELOAD 0001010101 BSR
instruction IDCODE 0001011001 DIR
bit 191 O 1 IO4 190 0 Z
bit 190 C 0 *
bit 189 O 1 *
bit 188 O 0 *
bit 187 O 1 IO5 186 0 Z
bit 186 C 0 *
bit 185 O 1 *
bit 184 O 0 *
bit 183 O 1 *
bit 182 O 0 *
bit 181 O 1 IO6 180 0 Z
bit 180 C 0 *
bit 179 O 1 *
bit 178 O 0 *
bit 177 O 1 *
bit 176 O 0 *
bit 175 O 1 *
bit 174 O 0 *
bit 173 O 1 *
bit 172 O 0 *
bit 171 O 1 *
bit 170 O 0 *
bit 169 O 1 IO8 168 0 Z
bit 168 C 0 *
bit 167 O 1 IO9 166 0 Z
bit 166 C 0 *
bit 165 O 1 IO11 164 0 Z
bit 164 C 0 *
bit 163 O 1 *
bit 162 O 0 *
bit 161 O 1 IO12 160 0 Z
bit 160 C 0 *
bit 159 O 1 *
bit 158 O 0 *
bit 157 O 1 *
bit 156 O 0 *
bit 155 O 1 IO14 154 0 Z
bit 154 C 0 *
bit 153 O 1 *
bit 152 O 0 *
bit 151 O 1 *
bit 150 O 0 *
bit 149 O 1 *
bit 148 O 0 *
bit 147 O 1 *
bit 146 O 0 *
bit 145 O 1 IO16 144 0 Z
bit 144 C 0 *
bit 143 O 1 IO17 142 0 Z
bit 142 C 0 *
bit 141 O 1 *
bit 140 O 0 *
bit 139 O 1 *
bit 138 O 0 *
bit 137 O 1 IO18 136 0 Z
bit 136 C 0 *
bit 135 O 1 IO19 134 0 Z
bit 134 C 0 *
bit 133 O 1 IO20 132 0 Z
bit 132 C 0 *
bit 131 O 1 *
bit 130 O 0 *
bit 129 O 1 IO21 128 0 Z
bit 128 C 0 *
bit 127 O 1 IO24 126 0 Z
bit 126 C 0 *
bit 125 O 1 *
bit 124 O 0 *
bit 123 O 1 IO25 122 0 Z
bit 122 C 0 *
bit 121 O 1 IO26 120 0 Z
bit 120 C 0 *
bit 119 O 1 IO27 118 0 Z
bit 118 C 0 *
bit 117 O 1 *
bit 116 O 0 *
bit 115 O 1 *
bit 114 O 0 *
bit 113 O 1 IO28 112 0 Z
bit 112 C 0 *
bit 111 O 1 IO29 110 0 Z
bit 110 C 0 *
bit 109 O 1 *
bit 108 O 0 *
bit 107 O 1 *
bit 106 O 0 *
bit 105 O 1 *
bit 104 O 0 *
bit 103 O 1 *
bit 102 O 0 *
bit 101 O 1 IO31 100 0 Z
bit 100 C 0 *
bit 99 O 1 *
bit 98 O 0 *
bit 97 O 1 *
bit 96 O 0 *
bit 95 O 1 IO33 94 0 Z
bit 94 C 0 *
bit 93 O 1 *
bit 92 O 0 *
bit 91 O 1 IO34 90 0 Z
bit 90 C 0 *
bit 89 O 1 IO36 88 0 Z
bit 88 C 0 *
bit 87 O 1 IO37 86 0 Z
bit 86 C 0 *
bit 85 O 1 *
bit 84 O 0 *
bit 83 O 1 *
bit 82 O 0 *
bit 81 O 1 *
bit 80 O 0 *
bit 79 O 1 IO39 78 0 Z
bit 78 C 0 *
bit 77 O 1 *
bit 76 O 0 *
bit 75 O 1 *
bit 74 O 0 *
bit 73 O 1 *
bit 72 O 0 *
bit 71 O 1 *
bit 70 O 0 *
bit 69 O 1 IO40 68 0 Z
bit 68 C 0 *
bit 67 O 1 *
bit 66 O 0 *
bit 65 O 1 IO41 64 0 Z
bit 64 C 0 *
bit 63 I 1 DIN1
bit 62 I 1 DIN2
bit 61 I 1 IO4
bit 60 O 1 *
bit 59 I 1 IO5
bit 58 O 1 *
bit 57 O 1 *
bit 56 I 1 IO6
bit 55 O 1 *
bit 54 O 1 *
bit 53 O 1 *
bit 52 O 1 *
bit 51 I 1 IO8
bit 50 I 1 IO9
bit 49 I 1 IO11
bit 48 O 1 *
bit 47 I 1 IO12
bit 46 O 1 *
bit 45 I 1 IO14
bit 44 O 1 *
bit 43 O 1 *
bit 42 O 1 *
bit 41 O 1 *
bit 40 I 1 IO16
bit 39 I 1 IO17
bit 38 O 1 *
bit 37 O 1 *
bit 36 I 1 IO18
bit 35 I 1 IO19
bit 34 I 1 IO20
bit 33 O 1 *
bit 32 I 1 IO21
bit 31 I 1 IO24
bit 30 O 1 *
bit 29 I 1 IO25
bit 28 I 1 IO26
bit 27 I 1 IO27
bit 26 O 1 *
bit 25 O 1 *
bit 24 I 1 IO28
bit 23 I 1 IO29
bit 22 O 1 *
bit 21 O 1 *
bit 20 O 1 *
bit 19 O 1 *
bit 18 I 1 IO31
bit 17 O 1 *
bit 16 I 1 IO33
bit 15 O 1 *
bit 14 I 1 IO34
bit 13 I 1 IO36
bit 12 I 1 IO37
bit 11 O 1 *
bit 10 O 1 *
bit 9 I 1 IO39
bit 8 O 1 *
bit 7 O 1 *
bit 6 O 1 *
bit 5 O 1 *
bit 4 I 1 IO40
bit 3 O 1 *
bit 2 I 1 IO41
bit 1 I 1 DIN3
bit 0 I 1 DIN4

@ -0,0 +1,32 @@
#
# $Id$
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002.
#
# Documentation:
# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
#
# bits 31-28 of the Device Identification Register
# see Table 99 in [1]
0011 atmega128 C
0101 atmega128 F
0110 atmega128 G

@ -0,0 +1,59 @@
#
# $Id$
#
# JTAG declarations for ATmega128
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2002.
#
# Documentation:
# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
#
# mandatory data registers
register BSR 205 # see Table 106 in [1]
register BR 1
# optional data registers
register DIR 32
# user-defined registers
register RR 1 # Reset Register
register PER 16 # Programming Enable Register
register PCR 15 # Programming Command Register
register VFPLR 2048 # Virtual Flash Page Load Register
register VFPRR 2056 # Virtual Flash Page Read Register
# see page 250 in [1]
instruction length 4
# mandatory instructions
instruction EXTEST 0000 BSR # see page 250 in [1]
instruction SAMPLE/PRELOAD 0010 BSR # see page 251 in [1]
instruction BYPASS 1111 BR # see page 251 in [1]
# optional instructions
instruction IDCODE 0001 DIR # see page 250 in [1]
# user-defined instructions
instruction AVR_RESET 1100 RR # see page 251 and page 303 in [1]
# unknown data registers for PRIVATE? instructions
#instruction PRIVATE0 1000 # see page 246 in [1]
#instruction PRIVATE1 1001 # see page 246 in [1]
#instruction PRIVATE2 1010 # see page 246 in [1]
#instruction PRIVATE3 1011 # see page 246 in [1]
instruction PROG_ENABLE 0100 PER # see page 303 in [1]
instruction PROG_COMMANDS 0101 PCR # see page 304 in [1]
instruction PROG_PAGELOAD 0110 VFPLR # see page 304 in [1]
instruction PROG_PAGEREAD 0111 VFPRR # see page 304 in [1]

@ -0,0 +1,23 @@
#
# $Id$
#
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
#
# bits 27-12 of the Device Identification Register
0000001000000010 msp2006 MSP2006

@ -0,0 +1,23 @@
#
# $Id$
#
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
#
# bits 31-28 of the Device Identification Register
0001 msp2006 1

@ -0,0 +1,29 @@
#
# $Id$
register BR 1
register BSR 1
register DIR 32
register EJIMPCODE 32
register EJADDRESS 32
register EJDATA 32
register EJCONTROL 32
register EJALL 96
register EJFASTDATA 33
instruction length 5
instruction BYPASS 11111 BR
instruction SAMPLE/PRELOAD 00010 BSR
instruction IDCODE 00001 DIR
instruction EJTAG_IMPCODE 00011 EJIMPCODE
instruction EJTAG_ADDRESS 01000 EJADDRESS
instruction EJTAG_DATA 01001 EJDATA
instruction EJTAG_CONTROL 01010 EJCONTROL
instruction EJTAG_ALL 01011 EJALL
instruction EJTAGBOOT 01100 BR
instruction NORMALBOOT 01101 BR
instruction EJTAG_FASTDATA 01110 EJFASTDATA
initbus ejtag
endian big

@ -0,0 +1,29 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
#
# bits 27-12 of the Device Identification Register
0001001001010000 bcm1250 BCM1250
0011001100010000 bcm3310 BCM3310
0101010000100001 bcm5421s BCM5421S
0100011100010010 bcm4712 BCM4712
0110001101011000 bcm6358 BCM6358

@ -0,0 +1,26 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
#
# bits 31-28 of the Device Identification Register
0011 bcm1250 Ver 3
1011 bcm1250 Ver 11

File diff suppressed because it is too large Load Diff

@ -0,0 +1,25 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2003.
#
# bits 31-28 of the Device Identification Register
0000 bcm3310 0

@ -0,0 +1,37 @@
#
# $Id$
#
# JTAG declarations for Broadcom BCM3310
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2003.
#
# mandatory data registers
register BSR 397
register BR 1
# optional data registers
register DIR 32
instruction length 5
# mandatory instructions
instruction EXTEST 00000 BSR # TODO: EXTEST instruction value not verified
instruction SAMPLE/PRELOAD 00010 BSR # TODO: SAMPLE/PRELOAD instruction value not verified
instruction BYPASS 11111 BR
# optional instructions
instruction IDCODE 00001 DIR # TODO: IDCODE instruction value not verified

@ -0,0 +1,25 @@
#
# $Id$
#
# Copyright (C) 2004 Alan Wallace <aww@adelphia.net>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Alan Wallace <aww@adelphia.net>, 2004.
#
# bits 31-28 of the Device Identification Register
0001 bcm4712 Ver 1

@ -0,0 +1,39 @@
#
# $Id$
#
# JTAG declarations for Broadcom BCM4712
# Copyright (C) 2004 Alan Wallace <aww@adelphia.net>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Alan Wallace <aww@adelphia.net>, 2004.
#
# mandatory data registers
register BSR 594
register BR 1
# optional data registers
register DIR 32
instruction length 8
# mandatory instructions
instruction EXTEST 00000000 BSR
instruction SAMPLE/PRELOAD 00000010 BSR
instruction BYPASS 11111111 BR
# optional instructions
instruction IDCODE 00000001 DIR

@ -0,0 +1,24 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
#
0001 bcm5421s V1

@ -0,0 +1,328 @@
#
# $Id$
#
# JTAG declarations for BCM5421S
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
#
signal PAD_gtx_clk
signal PAD_txd10
signal PAD_txd11
signal PAD_txd12
signal PAD_txd13
signal PAD_txd14
signal PAD_txd15
signal PAD_txd16
signal PAD_txd17
signal PAD_tx_en
signal PAD_tx_er
signal PAD_clk125
signal PAD_col
signal PAD_crs
signal PAD_rbc0
signal PAD_rbc1
signal PAD_rxc
signal PAD_rxd10
signal PAD_rxd11
signal PAD_rxd12
signal PAD_rxd13
signal PAD_rxd14
signal PAD_rxd15
signal PAD_rxd16
signal PAD_rxd17
signal PAD_rx_dv
signal PAD_rx_er
signal PAD_txc
signal PAD_bcm5421s_en
signal PAD_edgerate
signal PAD_mdc
signal PAD_ovdd_2_5v_enPAD_reset_n
signal PAD_reset_n
signal PAD_tck
signal PAD_tdi
signal PAD_test0
signal PAD_test1
signal PAD_tms
signal PAD_tpin0
signal PAD_tpin1
signal PAD_tpin2
signal PAD_tpin3
signal PAD_tpin4
signal PAD_tpin5
signal PAD_tpin6
signal PAD_tpin7
signal PAD_tpin8
signal PAD_trstb
signal PAD_en10b
signal PAD_f1000
signal PAD_fdxled_n
signal PAD_intr_n
signal PAD_link_n1
signal PAD_link_n2
signal PAD_mdio
signal PAD_phya0
signal PAD_phya1
signal PAD_phya2
signal PAD_phya3
signal PAD_phya4
signal PAD_rcvled_n
signal PAD_slave_n
signal PAD_spd0
signal PAD_xmtled_n
signal PAD_tdo
signal PAD_srxdn
signal PAD_srxdp
signal PAD_stxdn
signal PAD_stxdp
signal PAD_stxcn
signal PAD_stxcp
signal PAD_sergnd
signal PAD_serpllavdd
signal PAD_serpllavss
signal PAD_serplldvdd
signal PAD_serplldvss
signal PAD_servdd11
signal PAD_servdd25
signal PAD_reg_cntl0
signal PAD_reg_cntl1
signal PAD_reg_sense1
signal PAD_reg_sense2
signal PAD_reg_supply1
signal PAD_reg_supply2
signal PAD_trimdac10
signal PAD_trimdac11
signal PAD_trimdac12
signal PAD_trimdac13
signal PAD_trimhyb10
signal PAD_trimhyb11
signal PAD_trimhyb12
signal PAD_trimhyb13
signal PAD_trimhpf10
signal PAD_trimhpf11
signal PAD_xtali
signal PAD_xtali2
signal PAD_xtalo
signal PAD_xtalo2
signal PAD_xtalgnd1
signal PAD_xtalgnd2
signal PAD_xtalvdd1
signal PAD_xtalvdd2
signal PAD_xtalvdd3
signal PAD_xtalvdd2
signal PAD_plldgnd
signal PAD_plldvdd
signal PAD_pllgnd
signal PAD_pllvdd
signal PAD_tvcoi
signal CORE_VDD
signal CORE_VSS
signal OVDD
signal OGND
signal PVDD
signal PAD_rdac1
signal PAD_extvref1
signal PAD_bagnd_0
signal PAD_bavdd_0
signal PAD_bavdd_1
signal PAD_rxavdd0_0
signal PAD_rxavdd1_0
signal PAD_rxavdd2_0
signal PAD_rxavdd3_0
signal PAD_txavdd0_0
signal PAD_txavdd1_0
signal PAD_txavdd2_0
signal PAD_txavdd3_0
signal PAD_rxagnd0_0
signal PAD_rxagnd1_0
signal PAD_rxagnd2_0
signal PAD_rxagnd3_0
signal PAD_txagnd0_0
signal PAD_txagnd1_0
signal PAD_txagnd2_0
signal PAD_txagnd3_0
signal PAD_tdp1_0
signal PAD_tdn1_0
signal PAD_tdn1_1
signal PAD_tdp1_1
signal PAD_tdp1_2
signal PAD_tdn1_2
signal PAD_tdn1_3
register BSR 150
register BR 1
register DIR 32
instruction length 3
instruction BYPASS 111 BR
instruction EXTEST 000 BSR
instruction SAMPLE/PRELOAD 010 BSR
instruction IDCODE 101 DIR
bit 149 I 1 PAD_rxd13
bit 148 O 1 PAD_rxd13 147 1 Z
bit 147 C 1 *
bit 146 I 1 PAD_rxd12
bit 145 O 1 PAD_rxd12 144 1 Z
bit 144 C 1 *
bit 143 I 1 PAD_rxd11
bit 142 O 1 PAD_rxd11 141 1 Z
bit 141 C 1 *
bit 140 I 1 PAD_rxd10
bit 139 O 1 PAD_rxd10 138 1 Z
bit 138 C 1 *
bit 137 I 1 PAD_col
bit 136 O 1 PAD_col 135 1 Z
bit 135 C 1 *
bit 134 I 1 PAD_crs
bit 133 O 1 PAD_crs 132 1 Z
bit 132 C 1 *
bit 131 I 1 PAD_clk125
bit 130 O 1 PAD_clk125 129 1 Z
bit 129 C 1 *
bit 128 I 1 PAD_reset_n
bit 127 I 1 PAD_mdc
bit 126 I 1 PAD_mdio
bit 125 O 1 PAD_mdio 124 1 Z
bit 124 C 1 *
bit 123 I 1 PAD_tpin8
bit 122 I 1 PAD_en10b
bit 121 O 1 PAD_en10b 120 1 Z
bit 120 C 1 *
bit 119 I 1 PAD_f1000
bit 118 O 1 PAD_f1000 117 1 Z
bit 117 C 1 *
bit 116 I 1 PAD_spd0
bit 115 O 1 PAD_spd0 114 1 Z
bit 114 C 1 *
bit 113 O 1 *
bit 112 O 1 *
bit 111 I 1 PAD_phya4
bit 110 O 1 PAD_phya4 109 1 Z
bit 109 C 1 *
bit 108 I 1 PAD_phya3
bit 107 O 1 PAD_phya3 106 1 Z
bit 106 C 1 *
bit 105 I 1 PAD_phya2
bit 104 O 1 PAD_phya2 103 1 Z
bit 103 C 1 *
bit 102 I 1 PAD_phya1
bit 101 O 1 PAD_phya1 100 1 Z
bit 100 C 1 *
bit 99 I 1 PAD_phya0
bit 98 O 1 PAD_phya0 97 1 Z
bit 97 C 1 *
bit 96 I 1 PAD_test1
bit 95 I 1 PAD_test0
bit 94 I 1 PAD_xmtled_n
bit 93 O 1 PAD_xmtled_n 92 1 Z
bit 92 C 1 *
bit 91 I 1 PAD_rcvled_n
bit 90 O 1 PAD_rcvled_n 89 1 Z
bit 89 C 1 *
bit 88 I 1 PAD_link_n2
bit 87 O 1 PAD_link_n2 86 1 Z
bit 86 C 1 *
bit 85 I 1 PAD_link_n1
bit 84 O 1 PAD_link_n1 83 1 Z
bit 83 C 1 *
bit 82 I 1 PAD_fdxled_n
bit 81 O 1 PAD_fdxled_n 80 1 Z
bit 80 C 1 *
bit 79 I 1 PAD_slave_n
bit 78 O 1 PAD_slave_n 77 1 Z
bit 77 C 1 *
bit 76 I 1 PAD_intr_n
bit 75 O 1 PAD_intr_n 74 1 Z
bit 74 C 1 *
bit 73 I 1 PAD_tpin0
bit 72 I 1 PAD_tpin1
bit 71 I 1 PAD_tpin2
bit 70 I 1 PAD_tpin3
bit 69 I 1 PAD_tpin4
bit 68 I 1 PAD_tpin5
bit 67 O 1 PAD_tpin5 66 1 Z
bit 66 C 1 *
bit 65 I 1 PAD_tpin6
bit 64 I 1 PAD_tpin7
bit 63 I 1 PAD_txc
bit 62 O 1 PAD_txc 61 1 Z
bit 61 C 1 *
bit 60 I 1 PAD_txd10
bit 59 O 1 *
bit 58 C 1 *
bit 57 I 1 PAD_txd11
bit 56 O 1 *
bit 55 C 1 *
bit 54 I 1 PAD_txd12
bit 53 O 1 *
bit 52 C 1 *
bit 51 I 1 PAD_txd13
bit 50 O 1 *
bit 49 C 1 *
bit 48 I 1 PAD_txd14
bit 47 O 1 *
bit 46 C 1 *
bit 45 I 1 PAD_txd15
bit 44 O 1 *
bit 43 C 1 *
bit 42 I 1 PAD_txd16
bit 41 O 1 *
bit 40 C 1 *
bit 39 I 1 PAD_txd17
bit 38 O 1 *
bit 37 C 1 *
bit 36 I 1 PAD_tx_er
bit 35 O 1 *
bit 34 C 1 *
bit 33 I 1 PAD_tx_en
bit 32 O 1 *
bit 31 C 1 *
bit 30 I 1 PAD_gtx_clk
bit 29 O 1 *
bit 28 C 1 *
bit 27 I 1 PAD_rbc0
bit 26 O 1 PAD_rbc0 25 1 Z
bit 25 C 1 *
bit 24 I 1 PAD_rbc1
bit 23 O 1 PAD_rbc1 22 1 Z
bit 22 C 1 *
bit 21 I 1 PAD_rxc
bit 20 O 1 PAD_rxc 19 1 Z
bit 19 C 1 *
bit 18 I 1 PAD_rx_er
bit 17 O 1 PAD_rx_er 16 1 Z
bit 16 C 1 *
bit 15 I 1 PAD_rx_dv
bit 14 O 1 PAD_rx_dv 13 1 Z
bit 13 C 1 *
bit 12 I 1 PAD_rxd17
bit 11 O 1 PAD_rxd17 10 1 Z
bit 10 C 1 *
bit 9 I 1 PAD_rxd16
bit 8 O 1 PAD_rxd16 7 1 Z
bit 7 C 1 *
bit 6 I 1 PAD_rxd15
bit 5 O 1 PAD_rxd15 4 1 Z
bit 4 C 1 *
bit 3 I 1 PAD_edgerate
bit 2 I 1 PAD_rxd14
bit 1 O 1 PAD_rxd14 0 1 Z
bit 0 C 1 *

@ -0,0 +1,22 @@
#
# $Id: STEPPINGS 442 2003-05-26 09:04:38Z telka $
#
# Copyright (C) 2008 Julien Aube
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
0000 bcm6358 V1

@ -0,0 +1,53 @@
#
# $Id$
#
# JTAG declarations for Atheros AR2312
# Also valid for Broadcom BCM6358 (J. Aube)
#
# Copyright (C) 2005 Marek Michalkiewicz
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
#
register BR 1
register BSR 1
register DIR 32
register EJIMPCODE 32
register EJADDRESS 32
register EJDATA 32
register EJCONTROL 32
register EJALL 96
register EJFASTDATA 33
instruction length 5
instruction BYPASS 11111 BR
instruction SAMPLE/PRELOAD 00010 BSR
instruction IDCODE 00001 DIR
instruction EJTAG_IMPCODE 00011 EJIMPCODE
instruction EJTAG_ADDRESS 01000 EJADDRESS
instruction EJTAG_DATA 01001 EJDATA
instruction EJTAG_CONTROL 01010 EJCONTROL
instruction EJTAG_ALL 01011 EJALL
instruction EJTAGBOOT 01100 BR
instruction NORMALBOOT 01101 BR
instruction EJTAG_FASTDATA 01110 EJFASTDATA
endian big
initbus ejtag_dma

@ -0,0 +1,255 @@
--
-- $Id$
--
-- Email header accompanying the original Yacc code:
-- http://www.eda.org/vug_bbs/bsdl.parser
--
-- -----------------------------------8<--------------------------------------
--
-- Hello All,
--
-- This is this first mailing of the BSDL* Version 0.0 parser specifications
-- we are sending to people who request it from our publicized E-Mail address;
--
-- bsdl%hpmtlx@hplabs.HP.com
--
-- You are free to redistribute this at will, but we feel that it would be
-- better if respondents asked for it directly so that their addresses can
-- be entered into our list for future mailings and updates.
--
-- It would be helpful if you could confirm receipt of this transmission.
-- We also would be very interested to hear about your experiences with this
-- information and what you are planning to do with BSDL.
--
-- Regards,
--
-- Ken Parker
-- Hewlett-Packard Company
--
--
-- *Boundary-Scan Description Language - as documented in:
--
-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
-- and S. Oresjo, Proceedings 1990 International Test Conference,
-- Washington DC, pp 222-234
--
--
-- - -----------------cut here---------------------------------------------------
--
--
-- 901004.0721 Hewlett-Packard Company
-- 901016.1049 Manufacturing Test Division
-- P.O. Box 301
-- Loveland, Colorado 80537
-- USA
--
-- October 1990
-- Hello BSDL Parser Requestor,
--
-- This Electronic Mail reply contains the computer specifications for
-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
-- explains the contents of the rest of this file.
--
-- This file is composed of seven (7) parts:
--
-- 1) How to use this file
--
-- 2) UNIX* Lex source (lexicographical tokenizing rules)
--
-- 3) UNIX* Yacc source (BNF-like syntax description)
--
-- 4) A sample main program to recognize BSDL.
--
-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
-- recognized by the parser, for testing purposes.
--
-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
--
-- 7) [added 901016] Porting experiences to other systems.
--
--
-- RECOMMENDATION: Save a copy of this file in archival storage before
-- processing it via the instructions below. This will
-- allow you to recover from errors, and allow you to
-- compare subsequently released data for changes.
--
-- DISCLAIMERS:
--
-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
-- therefore no person may represent it as an IEEE standard or imply that
-- a resulting IEEE standard will be identical to it.
--
-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
-- well-conceived initiative that is likely to excelerate the creation
-- of tools that support the 1149.1 standard. As such, changes and
-- enhancements will be carefully considered so as not to needlessly
-- disrupt these development efforts. The overriding goal is the
-- ultimate success of the 1149.1 standard.
--
-- LEGAL NOTICES:
--
-- Hewlett-Packard Company makes no warranty of any kind with regard to
-- this information, including, but not limited to, the implied
-- waranties of merchantability and fitness for a particular purpose.
--
-- Hewlett-Packard Company shall not be liable for errors contained
-- herein or direct, indirect, special, incidental, or consequential
-- damages in connection with the furnishing, performance, or use of
-- this material.
--
--
-- *UNIX is a trademark of AT&T in the USA and other countries.
--
-- STD_1149_1_1990 VHDL Package and Package Body in support of
-- BSDL Version 0.0
--
package STD_1149_1_1990 is -- Created 900525
-- Give pin mapping declarations
attribute PIN_MAP : string;
subtype PIN_MAP_STRING is string;
-- Give TAP control declarations
type CLOCK_LEVEL is (LOW, BOTH);
type CLOCK_INFO is record
FREQ : real;
LEVEL: CLOCK_LEVEL;
end record;
attribute TAP_SCAN_IN : boolean;
attribute TAP_SCAN_OUT : boolean;
attribute TAP_SCAN_CLOCK: CLOCK_INFO;
attribute TAP_SCAN_MODE : boolean;
attribute TAP_SCAN_RESET: boolean;
-- Give instruction register declarations
attribute INSTRUCTION_LENGTH : integer;
attribute INSTRUCTION_OPCODE : string;
attribute INSTRUCTION_CAPTURE : string;
attribute INSTRUCTION_DISABLE : string;
attribute INSTRUCTION_GUARD : string;
attribute INSTRUCTION_PRIVATE : string;
attribute INSTRUCTION_USAGE : string;
attribute INSTRUCTION_SEQUENCE : string;
-- Give ID and USER code declarations
type ID_BITS is ('0', '1', 'x', 'X');
type ID_STRING is array (31 downto 0) of ID_BITS;
attribute IDCODE_REGISTER : ID_STRING;
attribute USERCODE_REGISTER: ID_STRING;
-- Give register declarations
attribute REGISTER_ACCESS : string;
-- Give boundary cell declarations
type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
CONTROL, CONTROLR, OUTPUT2,
OUTPUT3, BIDIR_IN, BIDIR_OUT);
type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
type CELL_DATA is record
CT : CELL_TYPE;
I : BSCAN_INST;
CD : CAP_DATA;
end record;
type CELL_INFO is array (positive range <>) of CELL_DATA;
-- Boundary Cell defered constants (see package body)
constant BC_1 : CELL_INFO;
constant BC_2 : CELL_INFO;
constant BC_3 : CELL_INFO;
constant BC_4 : CELL_INFO;
constant BC_5 : CELL_INFO;
constant BC_6 : CELL_INFO;
-- Boundary Register declarations
attribute BOUNDARY_CELLS : string;
attribute BOUNDARY_LENGTH : integer;
attribute BOUNDARY_REGISTER : string;
-- Miscellaneous
attribute DESIGN_WARNING : string;
end STD_1149_1_1990; -- End of 1149.1-1990 Package
package body STD_1149_1_1990 is -- Standard Boundary Cells
-- Written 900525
-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
constant BC_1 : CELL_INFO :=
((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
(INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
(INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
(INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
(OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
(OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
(OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
(CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
(CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
(CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
(CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
constant BC_2 : CELL_INFO :=
((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
(INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
(INPUT, INTEST, UPD), -- Intest on output2 not supported
(INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
(OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
(OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
(OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
(CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
(CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
(CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
(CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
-- Description for f10-9
constant BC_3 : CELL_INFO :=
((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
(INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
(INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
-- Description for f10-10, f10-11
constant BC_4 : CELL_INFO :=
((INPUT, EXTEST, PI), -- Intest on input not supported
(INPUT, SAMPLE, PI), -- Runbist on input not supported
(CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
(CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
(CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
-- Description for f10-20c, a combined Input/Control
constant BC_5 : CELL_INFO :=
((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
(INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
(INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
(INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
-- Description for f10-22d, a reversible cell
constant BC_6 : CELL_INFO :=
((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
(BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
(BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
(BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
end STD_1149_1_1990; -- End of 1149.1-1990 Package Body

@ -0,0 +1,259 @@
--
-- $Id$
--
-- Email header accompanying the original Yacc code:
-- http://www.eda.org/vug_bbs/bsdl.parser
--
-- -----------------------------------8<--------------------------------------
--
-- Hello All,
--
-- This is this first mailing of the BSDL* Version 0.0 parser specifications
-- we are sending to people who request it from our publicized E-Mail address;
--
-- bsdl%hpmtlx@hplabs.HP.com
--
-- You are free to redistribute this at will, but we feel that it would be
-- better if respondents asked for it directly so that their addresses can
-- be entered into our list for future mailings and updates.
--
-- It would be helpful if you could confirm receipt of this transmission.
-- We also would be very interested to hear about your experiences with this
-- information and what you are planning to do with BSDL.
--
-- Regards,
--
-- Ken Parker
-- Hewlett-Packard Company
--
--
-- *Boundary-Scan Description Language - as documented in:
--
-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
-- and S. Oresjo, Proceedings 1990 International Test Conference,
-- Washington DC, pp 222-234
--
--
-- - -----------------cut here---------------------------------------------------
--
--
-- 901004.0721 Hewlett-Packard Company
-- 901016.1049 Manufacturing Test Division
-- P.O. Box 301
-- Loveland, Colorado 80537
-- USA
--
-- October 1990
-- Hello BSDL Parser Requestor,
--
-- This Electronic Mail reply contains the computer specifications for
-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
-- explains the contents of the rest of this file.
--
-- This file is composed of seven (7) parts:
--
-- 1) How to use this file
--
-- 2) UNIX* Lex source (lexicographical tokenizing rules)
--
-- 3) UNIX* Yacc source (BNF-like syntax description)
--
-- 4) A sample main program to recognize BSDL.
--
-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
-- recognized by the parser, for testing purposes.
--
-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
--
-- 7) [added 901016] Porting experiences to other systems.
--
--
-- RECOMMENDATION: Save a copy of this file in archival storage before
-- processing it via the instructions below. This will
-- allow you to recover from errors, and allow you to
-- compare subsequently released data for changes.
--
-- DISCLAIMERS:
--
-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
-- therefore no person may represent it as an IEEE standard or imply that
-- a resulting IEEE standard will be identical to it.
--
-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
-- well-conceived initiative that is likely to excelerate the creation
-- of tools that support the 1149.1 standard. As such, changes and
-- enhancements will be carefully considered so as not to needlessly
-- disrupt these development efforts. The overriding goal is the
-- ultimate success of the 1149.1 standard.
--
-- LEGAL NOTICES:
--
-- Hewlett-Packard Company makes no warranty of any kind with regard to
-- this information, including, but not limited to, the implied
-- waranties of merchantability and fitness for a particular purpose.
--
-- Hewlett-Packard Company shall not be liable for errors contained
-- herein or direct, indirect, special, incidental, or consequential
-- damages in connection with the furnishing, performance, or use of
-- this material.
--
--
-- *UNIX is a trademark of AT&T in the USA and other countries.
--
-- STD_1149_1_1990 VHDL Package and Package Body in support of
-- BSDL Version 0.0
--
-- package STD_1149_1_1990 is -- Created 900525
package STD_1149_1_1994 is
-- Give pin mapping declarations
attribute PIN_MAP : string;
subtype PIN_MAP_STRING is string;
-- Give TAP control declarations
type CLOCK_LEVEL is (LOW, BOTH);
type CLOCK_INFO is record
FREQ : real;
LEVEL: CLOCK_LEVEL;
end record;
attribute TAP_SCAN_IN : boolean;
attribute TAP_SCAN_OUT : boolean;
attribute TAP_SCAN_CLOCK: CLOCK_INFO;
attribute TAP_SCAN_MODE : boolean;
attribute TAP_SCAN_RESET: boolean;
-- Give instruction register declarations
attribute INSTRUCTION_LENGTH : integer;
attribute INSTRUCTION_OPCODE : string;
attribute INSTRUCTION_CAPTURE : string;
attribute INSTRUCTION_DISABLE : string;
attribute INSTRUCTION_GUARD : string;
attribute INSTRUCTION_PRIVATE : string;
attribute INSTRUCTION_USAGE : string;
attribute INSTRUCTION_SEQUENCE : string;
-- Give ID and USER code declarations
type ID_BITS is ('0', '1', 'x', 'X');
type ID_STRING is array (31 downto 0) of ID_BITS;
attribute IDCODE_REGISTER : ID_STRING;
attribute USERCODE_REGISTER: ID_STRING;
-- Give register declarations
attribute REGISTER_ACCESS : string;
-- Give boundary cell declarations
type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
CONTROL, CONTROLR, OUTPUT2,
OUTPUT3, BIDIR_IN, BIDIR_OUT);
type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
type CELL_DATA is record
CT : CELL_TYPE;
I : BSCAN_INST;
CD : CAP_DATA;
end record;
type CELL_INFO is array (positive range <>) of CELL_DATA;
-- Boundary Cell defered constants (see package body)
constant BC_1 : CELL_INFO;
constant BC_2 : CELL_INFO;
constant BC_3 : CELL_INFO;
constant BC_4 : CELL_INFO;
constant BC_5 : CELL_INFO;
constant BC_6 : CELL_INFO;
-- Boundary Register declarations
attribute BOUNDARY_CELLS : string;
attribute BOUNDARY_LENGTH : integer;
attribute BOUNDARY_REGISTER : string;
-- Miscellaneous
attribute DESIGN_WARNING : string;
--end STD_1149_1_1990; -- End of 1149.1-1990 Package
end STD_1149_1_1994;
--package body STD_1149_1_1990 is -- Standard Boundary Cells
-- Written 900525
package body STD_1149_1_1994 is
-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
constant BC_1 : CELL_INFO :=
((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
(INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
(INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
(INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
(OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
(OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
(OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
(CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
(CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
(CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
(CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
constant BC_2 : CELL_INFO :=
((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
(INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
(INPUT, INTEST, UPD), -- Intest on output2 not supported
(INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
(OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
(OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
(OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
(CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
(CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
(CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
(CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
-- Description for f10-9
constant BC_3 : CELL_INFO :=
((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
(INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
(INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
-- Description for f10-10, f10-11
constant BC_4 : CELL_INFO :=
((INPUT, EXTEST, PI), -- Intest on input not supported
(INPUT, SAMPLE, PI), -- Runbist on input not supported
(CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
(CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
(CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
-- Description for f10-20c, a combined Input/Control
constant BC_5 : CELL_INFO :=
((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
(INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
(INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
(INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
-- Description for f10-22d, a reversible cell
constant BC_6 : CELL_INFO :=
((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
(BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
(BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
(BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
--end STD_1149_1_1990; -- End of 1149.1-1990 Package Body
end STD_1149_1_1994;

@ -0,0 +1,259 @@
--
-- $Id$
--
-- Email header accompanying the original Yacc code:
-- http://www.eda.org/vug_bbs/bsdl.parser
--
-- -----------------------------------8<--------------------------------------
--
-- Hello All,
--
-- This is this first mailing of the BSDL* Version 0.0 parser specifications
-- we are sending to people who request it from our publicized E-Mail address;
--
-- bsdl%hpmtlx@hplabs.HP.com
--
-- You are free to redistribute this at will, but we feel that it would be
-- better if respondents asked for it directly so that their addresses can
-- be entered into our list for future mailings and updates.
--
-- It would be helpful if you could confirm receipt of this transmission.
-- We also would be very interested to hear about your experiences with this
-- information and what you are planning to do with BSDL.
--
-- Regards,
--
-- Ken Parker
-- Hewlett-Packard Company
--
--
-- *Boundary-Scan Description Language - as documented in:
--
-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
-- and S. Oresjo, Proceedings 1990 International Test Conference,
-- Washington DC, pp 222-234
--
--
-- - -----------------cut here---------------------------------------------------
--
--
-- 901004.0721 Hewlett-Packard Company
-- 901016.1049 Manufacturing Test Division
-- P.O. Box 301
-- Loveland, Colorado 80537
-- USA
--
-- October 1990
-- Hello BSDL Parser Requestor,
--
-- This Electronic Mail reply contains the computer specifications for
-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
-- explains the contents of the rest of this file.
--
-- This file is composed of seven (7) parts:
--
-- 1) How to use this file
--
-- 2) UNIX* Lex source (lexicographical tokenizing rules)
--
-- 3) UNIX* Yacc source (BNF-like syntax description)
--
-- 4) A sample main program to recognize BSDL.
--
-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
-- recognized by the parser, for testing purposes.
--
-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
--
-- 7) [added 901016] Porting experiences to other systems.
--
--
-- RECOMMENDATION: Save a copy of this file in archival storage before
-- processing it via the instructions below. This will
-- allow you to recover from errors, and allow you to
-- compare subsequently released data for changes.
--
-- DISCLAIMERS:
--
-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
-- therefore no person may represent it as an IEEE standard or imply that
-- a resulting IEEE standard will be identical to it.
--
-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
-- well-conceived initiative that is likely to excelerate the creation
-- of tools that support the 1149.1 standard. As such, changes and
-- enhancements will be carefully considered so as not to needlessly
-- disrupt these development efforts. The overriding goal is the
-- ultimate success of the 1149.1 standard.
--
-- LEGAL NOTICES:
--
-- Hewlett-Packard Company makes no warranty of any kind with regard to
-- this information, including, but not limited to, the implied
-- waranties of merchantability and fitness for a particular purpose.
--
-- Hewlett-Packard Company shall not be liable for errors contained
-- herein or direct, indirect, special, incidental, or consequential
-- damages in connection with the furnishing, performance, or use of
-- this material.
--
--
-- *UNIX is a trademark of AT&T in the USA and other countries.
--
-- STD_1149_1_1990 VHDL Package and Package Body in support of
-- BSDL Version 0.0
--
-- package STD_1149_1_1990 is -- Created 900525
package STD_1149_1_2001 is
-- Give pin mapping declarations
attribute PIN_MAP : string;
subtype PIN_MAP_STRING is string;
-- Give TAP control declarations
type CLOCK_LEVEL is (LOW, BOTH);
type CLOCK_INFO is record
FREQ : real;
LEVEL: CLOCK_LEVEL;
end record;
attribute TAP_SCAN_IN : boolean;
attribute TAP_SCAN_OUT : boolean;
attribute TAP_SCAN_CLOCK: CLOCK_INFO;
attribute TAP_SCAN_MODE : boolean;
attribute TAP_SCAN_RESET: boolean;
-- Give instruction register declarations
attribute INSTRUCTION_LENGTH : integer;
attribute INSTRUCTION_OPCODE : string;
attribute INSTRUCTION_CAPTURE : string;
attribute INSTRUCTION_DISABLE : string;
attribute INSTRUCTION_GUARD : string;
attribute INSTRUCTION_PRIVATE : string;
attribute INSTRUCTION_USAGE : string;
attribute INSTRUCTION_SEQUENCE : string;
-- Give ID and USER code declarations
type ID_BITS is ('0', '1', 'x', 'X');
type ID_STRING is array (31 downto 0) of ID_BITS;
attribute IDCODE_REGISTER : ID_STRING;
attribute USERCODE_REGISTER: ID_STRING;
-- Give register declarations
attribute REGISTER_ACCESS : string;
-- Give boundary cell declarations
type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
CONTROL, CONTROLR, OUTPUT2,
OUTPUT3, BIDIR_IN, BIDIR_OUT);
type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
type CELL_DATA is record
CT : CELL_TYPE;
I : BSCAN_INST;
CD : CAP_DATA;
end record;
type CELL_INFO is array (positive range <>) of CELL_DATA;
-- Boundary Cell defered constants (see package body)
constant BC_1 : CELL_INFO;
constant BC_2 : CELL_INFO;
constant BC_3 : CELL_INFO;
constant BC_4 : CELL_INFO;
constant BC_5 : CELL_INFO;
constant BC_6 : CELL_INFO;
-- Boundary Register declarations
attribute BOUNDARY_CELLS : string;
attribute BOUNDARY_LENGTH : integer;
attribute BOUNDARY_REGISTER : string;
-- Miscellaneous
attribute DESIGN_WARNING : string;
--end STD_1149_1_1990; -- End of 1149.1-1990 Package
end STD_1149_1_2001;
--package body STD_1149_1_1990 is -- Standard Boundary Cells
-- Written 900525
package body STD_1149_1_2001 is
-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
constant BC_1 : CELL_INFO :=
((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
(INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
(INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
(INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
(OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
(OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
(OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
(CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
(CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
(CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
(CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
constant BC_2 : CELL_INFO :=
((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
(INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
(INPUT, INTEST, UPD), -- Intest on output2 not supported
(INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
(OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
(OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
(OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
(CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
(CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
(CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
(CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
-- Description for f10-9
constant BC_3 : CELL_INFO :=
((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
(INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
(INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
-- Description for f10-10, f10-11
constant BC_4 : CELL_INFO :=
((INPUT, EXTEST, PI), -- Intest on input not supported
(INPUT, SAMPLE, PI), -- Runbist on input not supported
(CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
(CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
(CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
(CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
-- Description for f10-20c, a combined Input/Control
constant BC_5 : CELL_INFO :=
((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
(INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
(INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
(INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
-- Description for f10-22d, a reversible cell
constant BC_6 : CELL_INFO :=
((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
(BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
(BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
(BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
--end STD_1149_1_1990; -- End of 1149.1-1990 Package Body
end STD_1149_1_2001;

@ -0,0 +1,19 @@
Package STD_1532_2001 is -- Attribute definitions for ISC description
use STD_1149_1_2001.all; -- Refer to BSDL definitions
attribute ISC_Conformance: BSDL_Extension;
attribute ISC_Pin_Behavior: BSDL_Extension;
attribute ISC_Fixed_System_Pins: BSDL_Extension; -- Optional
attribute ISC_Status: BSDL_Extension;
attribute ISC_Blank_Usercode: BSDL_Extension;
attribute ISC_Security: BSDL_Extension; -- Optional
attribute ISC_Flow: BSDL_Extension;
attribute ISC_Procedure: BSDL_Extension;
attribute ISC_Action: BSDL_Extension;
attribute ISC_Illegal_Exit: BSDL_Extension; -- Optional
attribute ISC_Design_Warning: BSDL_Extension; -- Optional
end STD_1532_2001;
Package Body STD_1532_2001 is
-- No content, this package body is required by BSDL syntax
end STD_1532_2001;

@ -0,0 +1,19 @@
Package STD_1532_2002 is -- Attribute definitions for ISC description
use STD_1149_1_2001.all; -- Refer to BSDL definitions
attribute ISC_Conformance: BSDL_Extension;
attribute ISC_Pin_Behavior: BSDL_Extension;
attribute ISC_Fixed_System_Pins: BSDL_Extension; -- Optional
attribute ISC_Status: BSDL_Extension;
attribute ISC_Blank_Usercode: BSDL_Extension;
attribute ISC_Security: BSDL_Extension; -- Optional
attribute ISC_Flow: BSDL_Extension;
attribute ISC_Procedure: BSDL_Extension;
attribute ISC_Action: BSDL_Extension;
attribute ISC_Illegal_Exit: BSDL_Extension; -- Optional
attribute ISC_Design_Warning: BSDL_Extension; -- Optional
end STD_1532_2002;
Package Body STD_1532_2002 is
-- No content, this package body is required by BSDL syntax
end STD_1532_2002;

@ -0,0 +1,25 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2003.
#
# bits 27-12 of the Device Identification Register
0001000010000100 sa1100 SA1100

@ -0,0 +1,25 @@
#
# $Id$
#
# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Jachym Holecek <freza@psi.cz>, 2003.
#
# bits 31-28 of the Device Identification Register
1011 sa1100 rev11

@ -0,0 +1,462 @@
#
# $Id$
#
# JTAG declarations for SA-1100
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2003.
#
signal A(0)
signal A(1)
signal A(2)
signal A(3)
signal A(4)
signal A(5)
signal A(6)
signal A(7)
signal A(8)
signal A(9)
signal A(10)
signal A(11)
signal A(12)
signal A(13)
signal A(14)
signal A(15)
signal A(16)
signal A(17)
signal A(18)
signal A(19)
signal A(20)
signal A(21)
signal A(22)
signal A(23)
signal A(24)
signal A(25)
signal BATTF
signal CAS(0)
signal CAS(1)
signal CAS(2)
signal CAS(3)
signal CS(0)
signal CS(1)
signal CS(2)
signal CS(3)
signal D(0)
signal D(1)
signal D(2)
signal D(3)
signal D(4)
signal D(5)
signal D(6)
signal D(7)
signal D(8)
signal D(9)
signal D(10)
signal D(11)
signal D(12)
signal D(13)
signal D(14)
signal D(15)
signal D(16)
signal D(17)
signal D(18)
signal D(19)
signal D(20)
signal D(21)
signal D(22)
signal D(23)
signal D(24)
signal D(25)
signal D(26)
signal D(27)
signal D(28)
signal D(29)
signal D(30)
signal D(31)
signal GP(0)
signal GP(1)
signal GP(2)
signal GP(3)
signal GP(4)
signal GP(5)
signal GP(6)
signal GP(7)
signal GP(8)
signal GP(9)
signal GP(10)
signal GP(11)
signal GP(12)
signal GP(13)
signal GP(14)
signal GP(15)
signal GP(16)
signal GP(17)
signal GP(18)
signal GP(19)
signal GP(20)
signal GP(21)
signal GP(22)
signal GP(23)
signal GP(24)
signal GP(25)
signal GP(26)
signal GP(27)
signal IOIS16
signal LBIAS
signal LDD(0)
signal LDD(1)
signal LDD(2)
signal LDD(3)
signal LDD(4)
signal LDD(5)
signal LDD(6)
signal LDD(7)
signal LFCLK
signal LLCLK
signal LPCLK
signal OE
signal PCE1
signal PCE2
signal PIOR
signal PIOW
signal POE
signal PREG
signal PSKTSEL
signal PWAIT
signal PWE
signal RAS(0)
signal RAS(1)
signal RAS(2)
signal RAS(3)
signal RESET
signal RESETO
signal ROMSEL
signal RXD1
signal RXD2
signal RXD3
signal RXDC
signal SCLKC
signal SFRMC
signal TXD1
signal TXD2
signal TXD3
signal TXDC
signal UDCN
signal UDCP
signal VDDFA
signal WE
# mandatory data registers
register BSR 279 # Boundary Scan Register
register BR 1 # Bypass Register
# optional data registers
register DIR 32 # Device Identification Register
instruction length 5
# mandatory instructions
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 00001 BSR
instruction BYPASS 11111 BR
# optional instructions
instruction CLAMP 00100 BR
instruction HIGHZ 00101 BR
instruction IDCODE 00110 DIR
# BSR bits
bit 278 I ? BATTF
bit 277 I ? VDDFA
bit 276 X ? .
bit 275 C 0 .
bit 274 O ? SFRMC 275 0 Z
bit 273 I ? SFRMC
bit 272 C 0 .
bit 271 O ? SCLKC 272 0 Z
bit 270 I ? SCLKC
bit 269 C 0 .
bit 268 O ? RXDC 269 0 Z
bit 267 I ? RXDC
bit 266 C ? .
bit 265 O ? TXDC 266 0 Z
bit 264 I ? TXDC
bit 263 O ? D(0) 199 1 Z
bit 262 I ? D(0)
bit 261 O ? D(8) 199 1 Z
bit 260 I ? D(8)
bit 259 O ? D(16) 199 1 Z
bit 258 I ? D(16)
bit 257 O ? D(24) 199 1 Z
bit 256 I ? D(24)
bit 255 O ? D(1) 199 1 Z
bit 254 I ? D(1)
bit 253 O ? D(9) 199 1 Z
bit 252 I ? D(9)
bit 251 O ? D(17) 199 1 Z
bit 250 I ? D(17)
bit 249 O ? D(25) 199 1 Z
bit 248 I ? D(25)
bit 247 O ? D(2) 199 1 Z
bit 246 I ? D(2)
bit 245 O ? D(10) 199 1 Z
bit 244 I ? D(10)
bit 243 O ? D(18) 199 1 Z
bit 242 I ? D(18)
bit 241 O ? D(26) 199 1 Z
bit 240 I ? D(26)
bit 239 O ? D(3) 199 1 Z
bit 238 I ? D(3)
bit 237 O ? D(11) 199 1 Z
bit 236 I ? D(11)
bit 235 O ? D(19) 199 1 Z
bit 234 I ? D(19)
bit 233 O ? D(27) 199 1 Z
bit 232 I ? D(27)
bit 231 O ? D(4) 199 1 Z
bit 230 I ? D(4)
bit 229 O ? D(12) 199 1 Z
bit 228 I ? D(12)
bit 227 O ? D(20) 199 1 Z
bit 226 I ? D(20)
bit 225 O ? D(28) 199 1 Z
bit 224 I ? D(28)
bit 223 O ? D(5) 199 1 Z
bit 222 I ? D(5)
bit 221 O ? D(13) 199 1 Z
bit 220 I ? D(13)
bit 219 O ? D(21) 199 1 Z
bit 218 I ? D(21)
bit 217 O ? D(29) 199 1 Z
bit 216 I ? D(29)
bit 215 O ? D(6) 199 1 Z
bit 214 I ? D(6)
bit 213 O ? D(14) 199 1 Z
bit 212 I ? D(14)
bit 211 O ? D(22) 199 1 Z
bit 210 I ? D(22)
bit 209 O ? D(30) 199 1 Z
bit 208 I ? D(30)
bit 207 O ? D(7) 199 1 Z
bit 206 I ? D(7)
bit 205 O ? D(15) 199 1 Z
bit 204 I ? D(15)
bit 203 O ? D(23) 199 1 Z
bit 202 I ? D(23)
bit 201 O ? D(31) 199 1 Z
bit 200 I ? D(31)
bit 199 C 1 .
bit 198 C 0 .
bit 197 O ? GP(27) 198 0 Z
bit 196 I ? GP(27)
bit 195 C 0 .
bit 194 O ? GP(26) 195 0 Z
bit 193 I ? GP(26)
bit 192 C 0 .
bit 191 O ? GP(25) 192 0 Z
bit 190 I ? GP(25)
bit 189 C 0 .
bit 188 O ? GP(24) 189 0 Z
bit 187 I ? GP(24)
bit 186 C 0 .
bit 185 O ? GP(23) 186 0 Z
bit 184 I ? GP(23)
bit 183 C 0 .
bit 182 O ? GP(22) 183 0 Z
bit 181 I ? GP(22)
bit 180 C 0 .
bit 179 O ? GP(21) 180 0 Z
bit 178 I ? GP(21)
bit 177 C 0 .
bit 176 O ? GP(20) 177 0 Z
bit 175 I ? GP(20)
bit 174 C 0 .
bit 173 O ? GP(19) 174 0 Z
bit 172 I ? GP(19)
bit 171 C 0 .
bit 170 O ? GP(18) 171 0 Z
bit 169 I ? GP(18)
bit 168 C 0 .
bit 167 O ? GP(17) 168 0 Z
bit 166 I ? GP(17)
bit 165 C 0 .
bit 164 O ? GP(16) 165 0 Z
bit 163 I ? GP(16)
bit 162 C 0 .
bit 161 O ? GP(15) 162 0 Z
bit 160 I ? GP(15)
bit 159 C 0 .
bit 158 O ? GP(14) 159 0 Z
bit 157 I ? GP(14)
bit 156 C 0 .
bit 155 O ? GP(13) 156 0 Z
bit 154 I ? GP(13)
bit 153 C 0 .
bit 152 O ? GP(12) 153 0 Z
bit 151 I ? GP(12)
bit 150 C 0 .
bit 149 O ? GP(11) 150 0 Z
bit 148 I ? GP(11)
bit 147 C 0 .
bit 146 O ? GP(10) 147 0 Z
bit 145 I ? GP(10)
bit 144 C 0 .
bit 143 O ? GP(9) 144 0 Z
bit 142 I ? GP(9)
bit 141 C 0 .
bit 140 O ? GP(8) 141 0 Z
bit 139 I ? GP(8)
bit 138 C 0 .
bit 137 O ? GP(7) 138 0 Z
bit 136 I ? GP(7)
bit 135 C 0 .
bit 134 O ? GP(6) 135 0 Z
bit 133 I ? GP(6)
bit 132 C 0 .
bit 131 O ? GP(5) 132 0 Z
bit 130 I ? GP(5)
bit 129 C 0 .
bit 128 O ? GP(4) 129 0 Z
bit 127 I ? GP(4)
bit 126 C 0 .
bit 125 O ? GP(3) 126 0 Z
bit 124 I ? GP(3)
bit 123 C 0 .
bit 122 O ? GP(2) 123 0 Z
bit 121 I ? GP(2)
bit 120 C 0 .
bit 119 O ? GP(1) 120 0 Z
bit 118 I ? GP(1)
bit 117 C 0 .
bit 116 O ? GP(0) 117 0 Z
bit 115 I ? GP(0)
bit 114 C 0 .
bit 113 O ? LBIAS 114 0 Z
bit 112 I ? LBIAS
bit 111 C 0 .
bit 110 O ? LPCLK 111 0 Z
bit 109 I ? LPCLK
bit 108 C 0 .
bit 107 O ? LDD(0) 108 0 Z
bit 106 I ? LDD(0)
bit 105 C 0 .
bit 104 O ? LDD(1) 105 0 Z
bit 103 I ? LDD(1)
bit 102 C 0 .
bit 101 O ? LDD(2) 102 0 Z
bit 100 I ? LDD(2)
bit 99 C 0 .
bit 98 O ? LDD(3) 99 0 Z
bit 97 I ? LDD(3)
bit 96 C 0 .
bit 95 O ? LDD(4) 96 0 Z
bit 94 I ? LDD(4)
bit 93 C 0 .
bit 92 O ? LDD(5) 93 0 Z
bit 91 I ? LDD(5)
bit 90 C 0 .
bit 89 O ? LDD(6) 90 0 Z
bit 88 I ? LDD(6)
bit 87 C 0 .
bit 86 O ? LDD(7) 87 0 Z
bit 85 I ? LDD(7)
bit 84 C 0 .
bit 83 O ? LLCLK 84 0 Z
bit 82 I ? LLCLK
bit 81 C 0 .
bit 80 O ? LFCLK 81 0 Z
bit 79 I ? LFCLK
bit 78 O ? POE
bit 77 O ? PWE
bit 76 O ? PIOR
bit 75 O ? PIOW
bit 74 O ? PSKTSEL
bit 73 I ? IOIS16
bit 72 I ? PWAIT
bit 71 O ? PREG
bit 70 O ? PCE2
bit 69 O ? PCE1
bit 68 C 1 .
bit 67 O ? WE 68 1 Z
bit 66 O ? OE 68 1 Z
bit 65 O ? RAS(3) 68 1 Z
bit 64 O ? RAS(2) 68 1 Z
bit 63 O ? RAS(1) 68 1 Z
bit 62 O ? RAS(0) 68 1 Z
bit 61 O ? CAS(3) 68 1 Z
bit 60 O ? CAS(2) 68 1 Z
bit 59 O ? CAS(1) 68 1 Z
bit 58 O ? CAS(0) 68 1 Z
bit 57 O ? CS(3) 68 1 Z
bit 56 O ? CS(2) 68 1 Z
bit 55 O ? CS(1) 68 1 Z
bit 54 O ? CS(0) 68 1 Z
bit 53 O ? A(25) 68 1 Z
bit 52 O ? A(24) 68 1 Z
bit 51 O ? A(23) 68 1 Z
bit 50 O ? A(22) 68 1 Z
bit 49 O ? A(21) 68 1 Z
bit 48 O ? A(20) 68 1 Z
bit 47 O ? A(19) 68 1 Z
bit 46 O ? A(18) 68 1 Z
bit 45 O ? A(17) 68 1 Z
bit 44 O ? A(16) 68 1 Z
bit 43 O ? A(15) 68 1 Z
bit 42 O ? A(14) 68 1 Z
bit 41 O ? A(13) 68 1 Z
bit 40 O ? A(12) 68 1 Z
bit 39 O ? A(11) 68 1 Z
bit 38 O ? A(10) 68 1 Z
bit 37 O ? A(9) 68 1 Z
bit 36 O ? A(8) 68 1 Z
bit 35 O ? A(7) 68 1 Z
bit 34 O ? A(6) 68 1 Z
bit 33 O ? A(5) 68 1 Z
bit 32 O ? A(4) 68 1 Z
bit 31 O ? A(3) 68 1 Z
bit 30 O ? A(2) 68 1 Z
bit 29 O ? A(1) 68 1 Z
bit 28 O ? A(0) 68 1 Z
bit 27 C 1 .
bit 26 O ? UDCN 27 1 Z
bit 25 I ? UDCN
bit 24 X ? .
bit 23 C 1 .
bit 22 O ? UDCP 23 1 Z
bit 21 I ? UDCP
bit 20 C 0 .
bit 19 O ? RXD1 20 0 Z
bit 18 I ? RXD1
bit 17 C 0 .
bit 16 O ? TXD1 17 0 Z
bit 15 I ? TXD1
bit 14 C 0 .
bit 13 O ? RXD2 14 0 Z
bit 12 I ? RXD2
bit 11 C 0 .
bit 10 O ? TXD2 11 0 Z
bit 9 I ? TXD2
bit 8 C 0 .
bit 7 O ? RXD3 8 0 Z
bit 6 I ? RXD3
bit 5 C 0 .
bit 4 O ? TXD3 5 0 Z
bit 3 I ? TXD3
bit 2 I ? RESET
bit 1 O ? RESETO
bit 0 I ? ROMSEL

@ -0,0 +1,29 @@
#
# $Id$
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Asier Llano <a.llano@usyscom.com>, 2004.
#
# Documentation:
# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
# Order Number: MPC5200UG
#
# bits 27-12 of the Device Identification Register
0000000000010001 mpc5200 mpc5200 # see 21.8.1.1 in [1]

@ -0,0 +1,31 @@
#
# $Id$
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Asier Llano <a.llano@usyscom.com>, 2004.
#
# Documentation:
# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
# Order Number: MPC5200UG
#
# bits 31-28 of the Device Identification Register
# see 21.8.1.1 in [1]
0000 mpc5200 0
0001 mpc5200 B

@ -0,0 +1,892 @@
#
# $Id$
#
# Copyright (C) 2002 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Asier Llano <a.llano@usyscom.com>, 2004.
#
# Documentation:
# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
# Order Number: MPC5200UG
# [2] Freescale, "MPC5200BSDL", Rev. 1.2,
# Order Number: MPC5200BSDL
#
# see Table 2-1 in [1]
signal TEST_MODE_0 B02
signal TEST_MODE_1 A01
signal TEST_SEL_0 B01
signal TEST_SEL_1 C03
signal RTC_XTAL_IN C02
signal RTC_XTAL_OUT C01
signal TIMER_2 D03
signal TIMER_3 D02
signal TIMER_4 D01
signal TIMER_5 E03
signal TIMER_6 E02
signal TIMER_7 E01
signal USB_9 F03
signal USB_8 F02
signal USB_7 F01
signal USB_6 G04
signal USB_5 G03
signal USB_4 G02
signal USB_3 G01
signal USB_2 H03
signal USB_1 H02
signal USB_0 H01
signal ETH_17 J04
signal ETH_10 J03
signal ETH_4 J02
signal ETH_3 J01
signal ETH_2 K03
signal ETH_1 K02
signal ETH_0 K01
signal ETH_11 L04
signal ETH_5 L03
signal ETH_16 L02
signal ETH_9 L01
signal ETH_8 M03
signal ETH_12 M02
signal ETH_13 M01
signal ETH_14 N04
signal ETH_15 N03
signal ETH_6 N02
signal ETH_7 N01
signal IRQ0 P03
signal IRQ2 P02
signal IRQ1 P01
signal PCI_GNT_B R04
signal EXT_AD_30 R03
signal PCI_RESET_B R02
signal IRQ3 R01
signal EXT_AD_28 T03
signal EXT_AD_26 T02
signal PCI_CLOCK T01
signal EXT_AD_24 U03
signal PCI_IDSEL U02
signal PCI_REQ_B U01
signal EXT_AD_20 V02
signal EXT_AD_31 V01
signal EXT_AD_29 W01
signal EXT_AD_27 Y01
signal EXT_AD_25 W02
signal PCI_CBE_3_B Y02
signal EXT_AD_22 V03
signal EXT_AD_23 W03
signal EXT_AD_21 Y03
signal EXT_AD_18 V04
signal EXT_AD_16 W04
signal EXT_AD_19 Y04
signal PCI_FRAME_B V05
signal PCI_TRDY_B W05
signal EXT_AD_17 Y05
signal PCI_STOP_B V06
signal PCI_CBE_2_B W06
signal PCI_IRDY_B Y06
signal PCI_PAR V07
signal PCI_DEVSEL_B W07
signal PCI_PERR_B Y07
signal EXT_AD_15 U08
signal EXT_AD_13 V08
signal PCI_SERR_B W08
signal PCI_CBE_1_B Y08
signal EXT_AD_11 V09
signal EXT_AD_14 W09
signal EXT_AD_12 Y09
signal EXT_AD_9 V10
signal PCI_CBE_0_B W10
signal EXT_AD_10 Y10
signal EXT_AD_6 U11
signal EXT_AD_4 V11
signal EXT_AD_8 W11
signal EXT_AD_7 Y11
signal EXT_AD_2 V12
signal EXT_AD_5 W12
signal EXT_AD_3 Y12
signal EXT_AD_0 V13
signal EXT_AD_1 W13
signal LP_TS_B Y13
signal LP_ACK U14
signal LP_ALE_B V14
signal LP_CS0_B W14
signal LP_CS1_B Y14
signal LP_CS2_B V15
signal LP_CS3_B W15
signal LP_CS4_B Y15
signal LP_CS5_B V16
signal LP_RW W16
signal ATA_ISOLATION Y16
signal ATA_DRQ V17
signal ATA_IOW_B W17
signal ATA_IOR_B Y17
signal ATA_IOCHRDY W18
signal ATA_DACK_B Y18
signal ATA_INTRQ Y19
signal TIMER_0 Y20
signal I2C_1 W19
signal I2C_3 W20
signal TIMER_1 V18
signal I2C_0 V19
signal I2C_2 V20
signal MEM_MDQ_31 U18
signal MEM_MDQ_1 U19
signal MEM_MDQ_0 U20
signal MEM_MDQ_30 T18
signal MEM_MDQ_3 T19
signal MEM_MDQ_2 T20
signal MEM_MDQ_28 R17
signal MEM_MDQ_29 R18
signal MEM_MDQ_5 R19
signal MEM_MDQ_4 R20
signal MEM_MDQ_27 P18
signal MEM_MDQ_7 P19
signal MEM_MDQ_6 P20
signal MEM_MDQ_25 N17
signal MEM_MDQ_26 N18
signal MEM_DQM_0 N19
signal MEM_MDQS_0 N20
signal MEM_MDQ_24 M18
signal MEM_MDQ_14 M19
signal MEM_MDQ_15 M20
signal MEM_DQM_3 L17
signal MEM_MDQS_3 L18
signal MEM_MDQ_12 L19
signal MEM_MDQ_13 L20
signal MEM_MDQ_23 K18
signal MEM_MDQ_10 K19
signal MEM_MDQ_11 K20
signal MEM_MDQ_22 J17
signal MEM_MDQ_21 J18
signal MEM_MDQ_8 J19
signal MEM_MDQ_9 J20
signal MEM_MDQ_20 H18
signal MEM_DQM_1 H19
signal MEM_MDQS_1 H20
signal MEM_MDQ_18 G17
signal MEM_MDQ_19 G18
signal MEM_CLK G19
signal MEM_CLK_B G20 G19
signal MEM_MDQ_17 F18
signal MEM_MA_12 F19
signal MEM_CLK_EN F20
signal MEM_MDQ_16 E18
signal MEM_MA_9 E19
signal MEM_MA_11 E20
signal MEM_MDQS_2 D18
signal MEM_MA_7 D19
signal MEM_MA_8 D20
signal MEM_MA_6 C20
signal MEM_MA_5 C19
signal MEM_MA_4 B20
signal MEM_DQM_2 A20
signal MEM_CAS_B B19
signal MEM_WE_B A19
signal MEM_MBA_0 C18
signal MEM_CS_0_B B18
signal MEM_RAS_B A18
signal MEM_MA_0 C17
signal MEM_MA_10 B17
signal MEM_MBA_1 A17
signal MEM_MA_3 C16
signal MEM_MA_2 B16
signal MEM_MA_1 A16
signal GPIO_WKUP_6 C15
signal SYS_PLL_TPA B15
signal SYS_XTAL_IN A15
signal SYS_XTAL_OUT D14
signal SYS_PLL_AVSS C14
signal SYS_PLL_AVDD B14
signal SRESET_B A14
signal PSC6_3 C13
signal HRESET_B B13
signal PORRESET_B A13
signal GPIO_WKUP_7 C12
signal PSC6_0 B12
signal PSC6_2 A12
signal PSC6_1 C11
signal PSC1_0 B11
signal PSC1_1 A11
signal PSC1_2 C10
signal PSC1_3 B10
signal PSC1_4 A10
signal PSC2_0 C09
signal PSC2_1 B09
signal PSC2_2 A09
signal LP_OE D08
signal CORE_PLL_AVDD C08
signal PSC2_3 B08
signal PSC2_4 A08
signal PSC3_0 C07
signal PSC3_1 B07
signal PSC3_2 A07
signal PSC3_3 C06
signal PSC3_4 B06
signal PSC3_5 A06
signal PSC3_6 C05
signal PSC3_7 B05
signal PSC3_8 A05
signal PSC3_9 C04
signal JTAG_TCK B04
signal JTAG_TMS A04
signal JTAG_TDI A03
signal JTAG_TRST_B B03
signal JTAG_TDO A02
signal VDD_MEM_IO P17 M17 T17 K17 F17 E17 H17 D17 D15 D13 D12
signal VDD_IO U16 U13 U10 U09 U06 U05 T04 F04 E04 H04 D09 D06
signal VDD_CORE U15 U12 U07 P04 K04 M04 D10 D07 D05 D11
signal VSS_IO_CORE D16
register BSR 615
register BR 1
register DIR 32
instruction length 6
# see Table 21-2 in [1]
# Mandatory instructions
instruction IDCODE 011101 DIR
instruction BYPASS 111111 BR
instruction SAMPLE/PRELOAD 100000 BSR
instruction EXTEST 000000 BSR
# Optional instructions
instruction CLAMP 100001 BR
instruction HIGHZ 011111 BR
# see [2]
bit 614 I 1 PSC3_9
bit 613 O 1 PSC3_9 612 1 Z
bit 612 C 1 *
bit 611 I 1 PSC3_8
bit 610 O 1 PSC3_8 609 1 Z
bit 609 C 1 *
bit 608 I 1 PSC3_7
bit 607 O 1 PSC3_7 606 1 Z
bit 606 C 1 *
bit 605 I 1 PSC3_6
bit 604 O 1 PSC3_6 603 1 Z
bit 603 C 1 *
bit 602 I 1 PSC3_5
bit 601 O 1 PSC3_5 600 1 Z
bit 600 C 1 *
bit 599 I 1 PSC3_4
bit 598 O 1 PSC3_4 597 1 Z
bit 597 C 1 *
bit 596 I 1 PSC3_3
bit 595 O 1 PSC3_3 594 1 Z
bit 594 C 1 *
bit 593 I 1 PSC3_2
bit 592 O 1 PSC3_2 591 1 Z
bit 591 C 1 *
bit 590 I 1 PSC3_1
bit 589 O 1 PSC3_1 588 1 Z
bit 588 C 1 *
bit 587 I 1 PSC3_0
bit 586 O 1 PSC3_0 585 1 Z
bit 585 C 1 *
bit 584 I 1 PSC2_4
bit 583 O 1 PSC2_4 582 1 Z
bit 582 C 1 *
bit 581 I 1 PSC2_3
bit 580 O 1 PSC2_3 579 1 Z
bit 579 C 1 *
bit 578 I 1 LP_OE
bit 577 O 1 LP_OE 576 1 Z
bit 576 C 1 *
bit 575 I 1 PSC2_2
bit 574 O 1 PSC2_2 573 1 Z
bit 573 C 1 *
bit 572 I 1 PSC2_1
bit 571 O 1 PSC2_1 570 1 Z
bit 570 C 1 *
bit 569 I 1 PSC2_0
bit 568 O 1 PSC2_0 567 1 Z
bit 567 C 1 *
bit 566 I 1 PSC1_4
bit 565 O 1 PSC1_4 564 1 Z
bit 564 C 1 *
bit 563 I 1 PSC1_3
bit 562 O 1 PSC1_3 561 1 Z
bit 561 C 1 *
bit 560 I 1 PSC1_2
bit 559 O 1 PSC1_2 558 1 Z
bit 558 C 1 *
bit 557 I 1 PSC1_1
bit 556 O 1 PSC1_1 555 1 Z
bit 555 C 1 *
bit 554 I 1 PSC1_0
bit 553 O 1 PSC1_0 552 1 Z
bit 552 C 1 *
bit 551 I 1 PSC6_1
bit 550 O 1 PSC6_1 549 1 Z
bit 549 C 1 *
bit 548 I 1 PSC6_2
bit 547 O 1 PSC6_2 546 1 Z
bit 546 C 1 *
bit 545 I 1 PSC6_0
bit 544 O 1 PSC6_0 543 1 Z
bit 543 C 1 *
bit 542 I 1 GPIO_WKUP_7
bit 541 O 1 GPIO_WKUP_7 540 1 Z
bit 540 C 1 *
bit 539 I 1 PORRESET_B
bit 538 O 0 *
bit 537 O 0 *
bit 536 I 1 HRESET_B
bit 535 O 1 HRESET_B 534 1 Z
bit 534 C 1 *
bit 533 I 1 PSC6_3
bit 532 O 1 PSC6_3 531 1 Z
bit 531 C 1 *
bit 530 I 1 SRESET_B
bit 529 O 1 SRESET_B 528 1 Z
bit 528 C 1 *
bit 527 I 1 SYS_PLL_TPA
bit 526 O 1 SYS_PLL_TPA 525 1 Z
bit 525 C 1 *
bit 524 I 1 GPIO_WKUP_6
bit 523 O 1 GPIO_WKUP_6 522 1 Z
bit 522 C 1 *
bit 521 I 1 MEM_MA_1
bit 520 O 1 MEM_MA_1 519 1 Z
bit 519 C 1 *
bit 518 I 1 MEM_MA_2
bit 517 O 1 MEM_MA_2 516 1 Z
bit 516 C 1 *
bit 515 I 1 MEM_MA_3
bit 514 O 1 MEM_MA_3 513 1 Z
bit 513 C 1 *
bit 512 I 1 MEM_MBA_1
bit 511 O 1 MEM_MBA_1 510 1 Z
bit 510 C 1 *
bit 509 I 1 MEM_MA_10
bit 508 O 1 MEM_MA_10 507 1 Z
bit 507 C 1 *
bit 506 I 1 MEM_MA_0
bit 505 O 1 MEM_MA_0 504 1 Z
bit 504 C 1 *
bit 503 I 1 MEM_RAS_B
bit 502 O 1 MEM_RAS_B 501 1 Z
bit 501 C 1 *
bit 500 I 1 MEM_CS_0_B
bit 499 O 1 MEM_CS_0_B 498 1 Z
bit 498 C 1 *
bit 497 I 1 MEM_MBA_0
bit 496 O 1 MEM_MBA_0 495 1 Z
bit 495 C 1 *
bit 494 I 1 MEM_WE_B
bit 493 O 1 MEM_WE_B 492 1 Z
bit 492 C 1 *
bit 491 I 1 MEM_CAS_B
bit 490 O 1 MEM_CAS_B 489 1 Z
bit 489 C 1 *
bit 488 I 1 MEM_DQM_2
bit 487 O 1 MEM_DQM_2 486 1 Z
bit 486 C 1 *
bit 485 I 1 MEM_MA_4
bit 484 O 1 MEM_MA_4 483 1 Z
bit 483 C 1 *
bit 482 I 1 MEM_MA_5
bit 481 O 1 MEM_MA_5 480 1 Z
bit 480 C 1 *
bit 479 I 1 MEM_MA_6
bit 478 O 1 MEM_MA_6 477 1 Z
bit 477 C 1 *
bit 476 I 1 MEM_MA_8
bit 475 O 1 MEM_MA_8 474 1 Z
bit 474 C 1 *
bit 473 I 1 MEM_MA_7
bit 472 O 1 MEM_MA_7 471 1 Z
bit 471 C 1 *
bit 470 I 1 MEM_MDQS_2
bit 469 O 1 MEM_MDQS_2 468 1 Z
bit 468 C 1 *
bit 467 I 1 MEM_MA_11
bit 466 O 1 MEM_MA_11 465 1 Z
bit 465 C 1 *
bit 464 I 1 MEM_MA_9
bit 463 O 1 MEM_MA_9 462 1 Z
bit 462 C 1 *
bit 461 I 1 MEM_MDQ_16
bit 460 O 1 MEM_MDQ_16 459 1 Z
bit 459 C 1 *
bit 458 I 1 MEM_CLK_EN
bit 457 O 1 MEM_CLK_EN 456 1 Z
bit 456 C 1 *
bit 455 I 1 MEM_MA_12
bit 454 O 1 MEM_MA_12 453 1 Z
bit 453 C 1 *
bit 452 I 1 MEM_MDQ_17
bit 451 O 1 MEM_MDQ_17 450 1 Z
bit 450 C 1 *
bit 449 I 1 MEM_CLK_B
bit 448 O 1 MEM_CLK_B 447 1 Z
bit 447 C 1 *
bit 446 I 1 MEM_CLK
bit 445 O 1 MEM_CLK 444 1 Z
bit 444 C 1 *
bit 443 I 1 MEM_MDQ_19
bit 442 O 1 MEM_MDQ_19 441 1 Z
bit 441 C 1 *
bit 440 I 1 MEM_MDQ_18
bit 439 O 1 MEM_MDQ_18 438 1 Z
bit 438 C 1 *
bit 437 I 1 MEM_MDQS_1
bit 436 O 1 MEM_MDQS_1 435 1 Z
bit 435 C 1 *
bit 434 I 1 MEM_DQM_1
bit 433 O 1 MEM_DQM_1 432 1 Z
bit 432 C 1 *
bit 431 I 1 MEM_MDQ_20
bit 430 O 1 MEM_MDQ_20 429 1 Z
bit 429 C 1 *
bit 428 I 1 MEM_MDQ_9
bit 427 O 1 MEM_MDQ_9 426 1 Z
bit 426 C 1 *
bit 425 I 1 MEM_MDQ_8
bit 424 O 1 MEM_MDQ_8 423 1 Z
bit 423 C 1 *
bit 422 I 1 MEM_MDQ_21
bit 421 O 1 MEM_MDQ_21 420 1 Z
bit 420 C 1 *
bit 419 I 1 MEM_MDQ_22
bit 418 O 1 MEM_MDQ_22 417 1 Z
bit 417 C 1 *
bit 416 I 1 MEM_MDQ_11
bit 415 O 1 MEM_MDQ_11 414 1 Z
bit 414 C 1 *
bit 413 I 1 MEM_MDQ_10
bit 412 O 1 MEM_MDQ_10 411 1 Z
bit 411 C 1 *
bit 410 I 1 MEM_MDQ_23
bit 409 O 1 MEM_MDQ_23 408 1 Z
bit 408 C 1 *
bit 407 I 1 MEM_MDQ_13
bit 406 O 1 MEM_MDQ_13 405 1 Z
bit 405 C 1 *
bit 404 I 1 MEM_MDQ_12
bit 403 O 1 MEM_MDQ_12 402 1 Z
bit 402 C 1 *
bit 401 I 1 MEM_MDQS_3
bit 400 O 1 MEM_MDQS_3 399 1 Z
bit 399 C 1 *
bit 398 I 1 MEM_DQM_3
bit 397 O 1 MEM_DQM_3 396 1 Z
bit 396 C 1 *
bit 395 I 1 MEM_MDQ_15
bit 394 O 1 MEM_MDQ_15 393 1 Z
bit 393 C 1 *
bit 392 I 1 MEM_MDQ_14
bit 391 O 1 MEM_MDQ_14 390 1 Z
bit 390 C 1 *
bit 389 I 1 MEM_MDQ_24
bit 388 O 1 MEM_MDQ_24 387 1 Z
bit 387 C 1 *
bit 386 I 1 MEM_MDQS_0
bit 385 O 1 MEM_MDQS_0 384 1 Z
bit 384 C 1 *
bit 383 I 1 MEM_DQM_0
bit 382 O 1 MEM_DQM_0 381 1 Z
bit 381 C 1 *
bit 380 I 1 MEM_MDQ_26
bit 379 O 1 MEM_MDQ_26 378 1 Z
bit 378 C 1 *
bit 377 I 1 MEM_MDQ_25
bit 376 O 1 MEM_MDQ_25 375 1 Z
bit 375 C 1 *
bit 374 I 1 MEM_MDQ_6
bit 373 O 1 MEM_MDQ_6 372 1 Z
bit 372 C 1 *
bit 371 I 1 MEM_MDQ_7
bit 370 O 1 MEM_MDQ_7 369 1 Z
bit 369 C 1 *
bit 368 I 1 MEM_MDQ_27
bit 367 O 1 MEM_MDQ_27 366 1 Z
bit 366 C 1 *
bit 365 I 1 MEM_MDQ_4
bit 364 O 1 MEM_MDQ_4 363 1 Z
bit 363 C 1 *
bit 362 I 1 MEM_MDQ_5
bit 361 O 1 MEM_MDQ_5 360 1 Z
bit 360 C 1 *
bit 359 I 1 MEM_MDQ_29
bit 358 O 1 MEM_MDQ_29 357 1 Z
bit 357 C 1 *
bit 356 I 1 MEM_MDQ_28
bit 355 O 1 MEM_MDQ_28 354 1 Z
bit 354 C 1 *
bit 353 I 1 MEM_MDQ_2
bit 352 O 1 MEM_MDQ_2 351 1 Z
bit 351 C 1 *
bit 350 I 1 MEM_MDQ_3
bit 349 O 1 MEM_MDQ_3 348 1 Z
bit 348 C 1 *
bit 347 I 1 MEM_MDQ_30
bit 346 O 1 MEM_MDQ_30 345 1 Z
bit 345 C 1 *
bit 344 I 1 MEM_MDQ_0
bit 343 O 1 MEM_MDQ_0 342 1 Z
bit 342 C 1 *
bit 341 I 1 MEM_MDQ_1
bit 340 O 1 MEM_MDQ_1 339 1 Z
bit 339 C 1 *
bit 338 I 1 MEM_MDQ_31
bit 337 O 1 MEM_MDQ_31 336 1 Z
bit 336 C 1 *
bit 335 I 1 I2C_2
bit 334 O 1 I2C_2 333 1 Z
bit 333 C 1 *
bit 332 I 1 I2C_0
bit 331 O 1 I2C_0 330 1 Z
bit 330 C 1 *
bit 329 I 1 TIMER_1
bit 328 O 1 TIMER_1 327 1 Z
bit 327 C 1 *
bit 326 I 1 I2C_3
bit 325 O 1 I2C_3 324 1 Z
bit 324 C 1 *
bit 323 I 1 I2C_1
bit 322 O 1 I2C_1 321 1 Z
bit 321 C 1 *
bit 320 I 1 TIMER_0
bit 319 O 1 TIMER_0 318 1 Z
bit 318 C 1 *
bit 317 I 1 ATA_INTRQ
bit 316 O 1 ATA_INTRQ 315 1 Z
bit 315 C 1 *
bit 314 I 1 ATA_DACK_B
bit 313 O 1 ATA_DACK_B 312 1 Z
bit 312 C 1 *
bit 311 I 1 ATA_IOCHRDY
bit 310 O 1 ATA_IOCHRDY 309 1 Z
bit 309 C 1 *
bit 308 I 1 ATA_IOR_B
bit 307 O 1 ATA_IOR_B 306 1 Z
bit 306 C 1 *
bit 305 I 1 ATA_IOW_B
bit 304 O 1 ATA_IOW_B 303 1 Z
bit 303 C 1 *
bit 302 I 1 ATA_DRQ
bit 301 O 1 ATA_DRQ 300 1 Z
bit 300 C 1 *
bit 299 I 1 ATA_ISOLATION
bit 298 O 1 ATA_ISOLATION 297 1 Z
bit 297 C 1 *
bit 296 I 1 LP_RW
bit 295 O 1 LP_RW 294 1 Z
bit 294 C 1 *
bit 293 I 1 LP_CS5_B
bit 292 O 1 LP_CS5_B 291 1 Z
bit 291 C 1 *
bit 290 I 1 LP_CS4_B
bit 289 O 1 LP_CS4_B 288 1 Z
bit 288 C 1 *
bit 287 I 1 LP_CS3_B
bit 286 O 1 LP_CS3_B 285 1 Z
bit 285 C 1 *
bit 284 I 1 LP_CS2_B
bit 283 O 1 LP_CS2_B 282 1 Z
bit 282 C 1 *
bit 281 I 1 LP_CS1_B
bit 280 O 1 LP_CS1_B 279 1 Z
bit 279 C 1 *
bit 278 I 1 LP_CS0_B
bit 277 O 1 LP_CS0_B 276 1 Z
bit 276 C 1 *
bit 275 I 1 LP_ALE_B
bit 274 O 1 LP_ALE_B 273 1 Z
bit 273 C 1 *
bit 272 I 1 LP_ACK
bit 271 O 1 LP_ACK 270 1 Z
bit 270 C 1 *
bit 269 I 1 LP_TS_B
bit 268 O 1 LP_TS_B 267 1 Z
bit 267 C 1 *
bit 266 I 1 EXT_AD_1
bit 265 O 1 EXT_AD_1 264 1 Z
bit 264 C 1 *
bit 263 I 1 EXT_AD_0
bit 262 O 1 EXT_AD_0 261 1 Z
bit 261 C 1 *
bit 260 I 1 EXT_AD_3
bit 259 O 1 EXT_AD_3 258 1 Z
bit 258 C 1 *
bit 257 I 1 EXT_AD_5
bit 256 O 1 EXT_AD_5 255 1 Z
bit 255 C 1 *
bit 254 I 1 EXT_AD_2
bit 253 O 1 EXT_AD_2 252 1 Z
bit 252 C 1 *
bit 251 I 1 EXT_AD_7
bit 250 O 1 EXT_AD_7 249 1 Z
bit 249 C 1 *
bit 248 I 1 EXT_AD_8
bit 247 O 1 EXT_AD_8 246 1 Z
bit 246 C 1 *
bit 245 I 1 EXT_AD_4
bit 244 O 1 EXT_AD_4 243 1 Z
bit 243 C 1 *
bit 242 I 1 EXT_AD_6
bit 241 O 1 EXT_AD_6 240 1 Z
bit 240 C 1 *
bit 239 I 1 EXT_AD_10
bit 238 O 1 EXT_AD_10 237 1 Z
bit 237 C 1 *
bit 236 I 1 PCI_CBE_0_B
bit 235 O 1 PCI_CBE_0_B 234 1 Z
bit 234 C 1 *
bit 233 I 1 EXT_AD_9
bit 232 O 1 EXT_AD_9 231 1 Z
bit 231 C 1 *
bit 230 I 1 EXT_AD_12
bit 229 O 1 EXT_AD_12 228 1 Z
bit 228 C 1 *
bit 227 I 1 EXT_AD_14
bit 226 O 1 EXT_AD_14 225 1 Z
bit 225 C 1 *
bit 224 I 1 EXT_AD_11
bit 223 O 1 EXT_AD_11 222 1 Z
bit 222 C 1 *
bit 221 I 1 PCI_CBE_1_B
bit 220 O 1 PCI_CBE_1_B 219 1 Z
bit 219 C 1 *
bit 218 I 1 PCI_SERR_B
bit 217 O 1 PCI_SERR_B 216 1 Z
bit 216 C 1 *
bit 215 I 1 EXT_AD_13
bit 214 O 1 EXT_AD_13 213 1 Z
bit 213 C 1 *
bit 212 I 1 EXT_AD_15
bit 211 O 1 EXT_AD_15 210 1 Z
bit 210 C 1 *
bit 209 I 1 PCI_PERR_B
bit 208 O 1 PCI_PERR_B 207 1 Z
bit 207 C 1 *
bit 206 I 1 PCI_DEVSEL_B
bit 205 O 1 PCI_DEVSEL_B 204 1 Z
bit 204 C 1 *
bit 203 I 1 PCI_PAR
bit 202 O 1 PCI_PAR 201 1 Z
bit 201 C 1 *
bit 200 I 1 PCI_IRDY_B
bit 199 O 1 PCI_IRDY_B 198 1 Z
bit 198 C 1 *
bit 197 I 1 PCI_CBE_2_B
bit 196 O 1 PCI_CBE_2_B 195 1 Z
bit 195 C 1 *
bit 194 I 1 PCI_STOP_B
bit 193 O 1 PCI_STOP_B 192 1 Z
bit 192 C 1 *
bit 191 I 1 EXT_AD_17
bit 190 O 1 EXT_AD_17 189 1 Z
bit 189 C 1 *
bit 188 I 1 PCI_TRDY_B
bit 187 O 1 PCI_TRDY_B 186 1 Z
bit 186 C 1 *
bit 185 I 1 PCI_FRAME_B
bit 184 O 1 PCI_FRAME_B 183 1 Z
bit 183 C 1 *
bit 182 I 1 EXT_AD_19
bit 181 O 1 EXT_AD_19 180 1 Z
bit 180 C 1 *
bit 179 I 1 EXT_AD_16
bit 178 O 1 EXT_AD_16 177 1 Z
bit 177 C 1 *
bit 176 I 1 EXT_AD_18
bit 175 O 1 EXT_AD_18 174 1 Z
bit 174 C 1 *
bit 173 I 1 EXT_AD_21
bit 172 O 1 EXT_AD_21 171 1 Z
bit 171 C 1 *
bit 170 I 1 EXT_AD_23
bit 169 O 1 EXT_AD_23 168 1 Z
bit 168 C 1 *
bit 167 I 1 EXT_AD_22
bit 166 O 1 EXT_AD_22 165 1 Z
bit 165 C 1 *
bit 164 I 1 PCI_CBE_3_B
bit 163 O 1 PCI_CBE_3_B 162 1 Z
bit 162 C 1 *
bit 161 I 1 EXT_AD_25
bit 160 O 1 EXT_AD_25 159 1 Z
bit 159 C 1 *
bit 158 I 1 EXT_AD_27
bit 157 O 1 EXT_AD_27 156 1 Z
bit 156 C 1 *
bit 155 I 1 EXT_AD_29
bit 154 O 1 EXT_AD_29 153 1 Z
bit 153 C 1 *
bit 152 I 1 EXT_AD_31
bit 151 O 1 EXT_AD_31 150 1 Z
bit 150 C 1 *
bit 149 I 1 EXT_AD_20
bit 148 O 1 EXT_AD_20 147 1 Z
bit 147 C 1 *
bit 146 I 1 PCI_REQ_B
bit 145 O 1 PCI_REQ_B 144 1 Z
bit 144 C 1 *
bit 143 I 1 PCI_IDSEL
bit 142 O 1 PCI_IDSEL 141 1 Z
bit 141 C 1 *
bit 140 I 1 EXT_AD_24
bit 139 O 1 EXT_AD_24 138 1 Z
bit 138 C 1 *
bit 137 I 1 PCI_CLOCK
bit 136 O 1 PCI_CLOCK 135 1 Z
bit 135 C 1 *
bit 134 I 1 EXT_AD_26
bit 133 O 1 EXT_AD_26 132 1 Z
bit 132 C 1 *
bit 131 I 1 EXT_AD_28
bit 130 O 1 EXT_AD_28 129 1 Z
bit 129 C 1 *
bit 128 I 1 IRQ3
bit 127 O 1 IRQ3 126 1 Z
bit 126 C 1 *
bit 125 I 1 PCI_RESET_B
bit 124 O 1 PCI_RESET_B 123 1 Z
bit 123 C 1 *
bit 122 I 1 EXT_AD_30
bit 121 O 1 EXT_AD_30 120 1 Z
bit 120 C 1 *
bit 119 I 1 PCI_GNT_B
bit 118 O 1 PCI_GNT_B 117 1 Z
bit 117 C 1 *
bit 116 I 1 IRQ1
bit 115 O 1 IRQ1 114 1 Z
bit 114 C 1 *
bit 113 I 1 IRQ2
bit 112 O 1 IRQ2 111 1 Z
bit 111 C 1 *
bit 110 I 1 IRQ0
bit 109 O 1 IRQ0 108 1 Z
bit 108 C 1 *
bit 107 I 1 ETH_7
bit 106 O 1 ETH_7 105 1 Z
bit 105 C 1 *
bit 104 I 1 ETH_6
bit 103 O 1 ETH_6 102 1 Z
bit 102 C 1 *
bit 101 I 1 ETH_15
bit 100 O 1 ETH_15 99 1 Z
bit 99 C 1 *
bit 98 I 1 ETH_14
bit 97 O 1 ETH_14 96 1 Z
bit 96 C 1 *
bit 95 I 1 ETH_13
bit 94 O 1 ETH_13 93 1 Z
bit 93 C 1 *
bit 92 I 1 ETH_12
bit 91 O 1 ETH_12 90 1 Z
bit 90 C 1 *
bit 89 I 1 ETH_8
bit 88 O 1 ETH_8 87 1 Z
bit 87 C 1 *
bit 86 I 1 ETH_9
bit 85 O 1 ETH_9 84 1 Z
bit 84 C 1 *
bit 83 I 1 ETH_16
bit 82 O 1 ETH_16 81 1 Z
bit 81 C 1 *
bit 80 I 1 ETH_5
bit 79 O 1 ETH_5 78 1 Z
bit 78 C 1 *
bit 77 I 1 ETH_11
bit 76 O 1 ETH_11 75 1 Z
bit 75 C 1 *
bit 74 I 1 ETH_0
bit 73 O 1 ETH_0 72 1 Z
bit 72 C 1 *
bit 71 I 1 ETH_1
bit 70 O 1 ETH_1 69 1 Z
bit 69 C 1 *
bit 68 I 1 ETH_2
bit 67 O 1 ETH_2 66 1 Z
bit 66 C 1 *
bit 65 I 1 ETH_3
bit 64 O 1 ETH_3 63 1 Z
bit 63 C 1 *
bit 62 I 1 ETH_4
bit 61 O 1 ETH_4 60 1 Z
bit 60 C 1 *
bit 59 I 1 ETH_10
bit 58 O 1 ETH_10 57 1 Z
bit 57 C 1 *
bit 56 I 1 ETH_17
bit 55 O 1 ETH_17 54 1 Z
bit 54 C 1 *
bit 53 I 1 USB_0
bit 52 O 1 USB_0 51 1 Z
bit 51 C 1 *
bit 50 I 1 USB_1
bit 49 O 1 USB_1 48 1 Z
bit 48 C 1 *
bit 47 I 1 USB_2
bit 46 O 1 USB_2 45 1 Z
bit 45 C 1 *
bit 44 I 1 USB_3
bit 43 O 1 USB_3 42 1 Z
bit 42 C 1 *
bit 41 I 1 USB_4
bit 40 O 1 USB_4 39 1 Z
bit 39 C 1 *
bit 38 I 1 USB_5
bit 37 O 1 USB_5 36 1 Z
bit 36 C 1 *
bit 35 I 1 USB_6
bit 34 O 1 USB_6 33 1 Z
bit 33 C 1 *
bit 32 I 1 USB_7
bit 31 O 1 USB_7 30 1 Z
bit 30 C 1 *
bit 29 I 1 USB_8
bit 28 O 1 USB_8 27 1 Z
bit 27 C 1 *
bit 26 I 1 USB_9
bit 25 O 1 USB_9 24 1 Z
bit 24 C 1 *
bit 23 I 1 TIMER_7
bit 22 O 1 TIMER_7 21 1 Z
bit 21 C 1 *
bit 20 I 1 TIMER_6
bit 19 O 1 TIMER_6 18 1 Z
bit 18 C 1 *
bit 17 I 1 TIMER_5
bit 16 O 1 TIMER_5 15 1 Z
bit 15 C 1 *
bit 14 I 1 TIMER_4
bit 13 O 1 TIMER_4 12 1 Z
bit 12 C 1 *
bit 11 I 1 TIMER_3
bit 10 O 1 TIMER_3 9 1 Z
bit 9 C 1 *
bit 8 I 1 TIMER_2
bit 7 O 1 TIMER_2 6 1 Z
bit 6 C 1 *
bit 5 I 1 TEST_SEL_1
bit 4 O 1 TEST_SEL_1 3 1 Z
bit 3 C 1 *
bit 2 I 1 TEST_SEL_0
bit 1 O 1 TEST_SEL_0 0 1 Z
bit 0 C 1 *
initbus mpc5200

@ -0,0 +1,27 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
#
# bits 27-12 of the Device Identification Register
0000000000000001 ar7300 AR7300
0000000001000010 sh7727 SH7727
0111010101101110 sh7727 SH7727

@ -0,0 +1,23 @@
#
# $Id$
#
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
#
# bits 31-28 of the Device Identification Register
0000 ar7300 0

@ -0,0 +1,29 @@
#
# $Id$
register BR 1
register BSR 1
register DIR 32
register EJIMPCODE 32
register EJADDRESS 32
register EJDATA 32
register EJCONTROL 32
register EJALL 96
register EJFASTDATA 33
instruction length 5
instruction BYPASS 11111 BR
instruction SAMPLE/PRELOAD 00010 BSR
instruction IDCODE 00001 DIR
instruction EJTAG_IMPCODE 00011 EJIMPCODE
instruction EJTAG_ADDRESS 01000 EJADDRESS
instruction EJTAG_DATA 01001 EJDATA
instruction EJTAG_CONTROL 01010 EJCONTROL
instruction EJTAG_ALL 01011 EJALL
instruction EJTAGBOOT 01100 BR
instruction NORMALBOOT 01101 BR
instruction EJTAG_FASTDATA 01110 EJFASTDATA
initbus ejtag
endian big

@ -0,0 +1,992 @@
#
# $Id$
#
# JTAG declarations for Hitachi HD64465BP/HD64465BQ
# Copyright (C) 2003 Elcom s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Marcel Telka <marcel@telka.sk>, 2003.
#
# Documentation:
# [1] Hitachi Ltd., "Windows CE Intelligent Peripheral Controller
# HD64465 User's Manual", 03/08/01, Rev. 3.0, ADE-602-168B
#
# Test Mode (see Table 4.3 in [1])
signal TST
signal TDI
signal TDO
signal TMS
signal TCK
signal TRST
# CPU interface (see Table 4.4 in [1])
signal CKIO
signal A0
signal A1
signal A2
signal A3
signal A4
signal A5
signal A6
signal A7
signal A8
signal A9
signal A10
signal A11
signal A12
signal A13
signal A14
signal A15
signal A16
signal A17
signal A18
signal A19
signal A20
signal A21
signal A22
signal A23
signal A24
signal A25
signal D0
signal D1
signal D2
signal D3
signal D4
signal D5
signal D6
signal D7
signal D8
signal D9
signal D10
signal D11
signal D12
signal D13
signal D14
signal D15
signal D16
signal D17
signal D18
signal D19
signal D20
signal D21
signal D22
signal D23
signal D24
signal D25
signal D26
signal D27
signal D28
signal D29
signal D30
signal D31
signal nCS4
signal nWE0
signal nWE1
signal nWE2
signal nWE3
signal nRDWR
signal nRD
signal nRDY
signal nBS
signal nDREQ0
signal nDREQ1
signal DRAK0
signal DRAK1
signal nIRQ0
signal SH_MODE
signal nCE1B
signal nCE2B
signal nCE1A
signal nCE2A
signal nIOIS16
# PCMCIA 0 (see Table 4.5 in [1])
signal PCC0A0
signal PCC0A1
signal PCC0A2
signal PCC0A3
signal PCC0A4
signal PCC0A5
signal PCC0A6
signal PCC0A7
signal PCC0A8
signal PCC0A9
signal PCC0A10
signal PCC0A11
signal PCC0A12
signal PCC0A13
signal PCC0A14
signal PCC0A15
signal PCC0A16
signal PCC0A17
signal PCC0A18
signal PCC0A19
signal PCC0A20
signal PCC0A21
signal PCC0A22
signal PCC0A23
signal PCC0A24
signal PCC0A25
signal PCC0D0
signal PCC0D1
signal PCC0D2
signal PCC0D3
signal PCC0D4
signal PCC0D5
signal PCC0D6
signal PCC0D7
signal PCC0D8
signal PCC0D9
signal PCC0D10
signal PCC0D11
signal PCC0D12
signal PCC0D13
signal PCC0D14
signal PCC0D15
signal nPCC0CE1B
signal nPCC0CE2B
signal nRDB
signal nWEB
signal nPCC0ICIORDB
signal nPCC0ICIOWRB
signal PCC0RESET
signal nPCC0WAIT
signal nPCC0WP
signal PCC0RDY
signal PCC0BVD1
signal PCC0BVD2
signal nPCC0CD1
signal nPCC0CD2
signal nPCC0VS1
signal nPCC0VS2
signal nPCC0REG
signal VCC0SEL1
signal VCC0SEL0
signal VCC0VPP1
signal VCC0VPP0
# PCMCIA 1 (see Table 4.6 in [1])
signal PCC1A0
signal PCC1A1
signal PCC1A2
signal PCC1A3
signal PCC1A4
signal PCC1A5
signal PCC1A6
signal PCC1A7
signal PCC1A8
signal PCC1A9
signal PCC1A10
signal PCC1A11
signal PCC1A12
signal PCC1A13
signal PCC1A14
signal PCC1A15
signal PCC1A16
signal PCC1A17
signal PCC1A18
signal PCC1A19
signal PCC1A20
signal PCC1A21
signal PCC1A22
signal PCC1A23
signal PCC1A24
signal PCC1A25
signal PCC1D0
signal PCC1D1
signal PCC1D2
signal PCC1D3
signal PCC1D4
signal PCC1D5
signal PCC1D6
signal PCC1D7
signal PCC1D8
signal PCC1D9
signal PCC1D10
signal PCC1D11
signal PCC1D12
signal PCC1D13
signal PCC1D14
signal PCC1D15
signal nPCC1CE1A
signal nPCC1CE2A
signal nRDA
signal nWEA
signal nPCC1ICIORDA
signal nPCC1ICIOWRA
signal PCC1RESET
signal nPCC1WAIT
signal nPCC1WP
signal PCC1RDY
signal PCC1BVD1
signal PCC1BVD2
signal nPCC1CD1
signal nPCC1CD2
signal nPCC1VS1
signal nPCC1VS2
signal nPCC1REG
signal VCC1SEL1
signal VCC1SEL0
signal VCC1VPP1
signal VCC1VPP0
# UART 0 (see Table 4.7 in [1])
signal TXD0
signal RXD0
signal nRTS0
signal nCTS0
signal nDTR0
signal nDSR0
signal nDCD0
signal nRI0
# IrDA (see Table 4.8 in [1])
signal MODSEL
signal TXD
signal nRX
# Printer Interface (see Table 4.9 in [1])
signal nSTB
signal nAFD
signal nERR
signal nINIT
signal nSLIN
signal nACK
signal BUSY
signal PE
signal SLCT
signal PPD0
signal PPD1
signal PPD2
signal PPD3
signal PPD4
signal PPD5
signal PPD6
signal PPD7
# AFE Interface (see Table 4.10 in [1])
signal DOUT
signal DIN
signal SCLK
signal HC1
signal FS
signal nAFERST
signal nAFEPDN
signal MCLKO
signal OFFHOOK
signal RING
# CODEC Interface (see Table 4.11 in [1])
signal ACCLK
signal nACRST
signal nACPD
signal SIBDIN
signal SIBCLK
signal SIBDOUT
signal SIBSYNC
# USB Interface (see Table 4.12 in [1])
signal nUSBPEN
signal nUSBOVR
signal USBD1P
signal USBD1M
signal USBD2P
signal USBD2M
# Keyboard Interface (see Table 4.13 in [1])
signal nKBCS
signal nXIOW
signal nXIOR
signal KBIRQ0
signal KBIRQ1
# IO Port A (see Table 4.14 in [1])
signal PA0
signal PA1
signal PA2
signal PA3
signal PA4
signal PA5
signal PA6
signal PA7
# IO Port B (see Table 4.15 in [1])
signal PB0
signal PB1
signal PB2
signal PB3
signal PB4
signal PB5
signal PB6
signal PB7
# IO Port C (see Table 4.16 in [1])
signal PC0
signal PC1
signal PC2
signal PC3
signal PC4
signal PC5
signal PC6
signal PC7
# IO Port D (see Table 4.17 in [1])
signal PD0
signal PD1
signal PD2
signal PD3
signal PD4
signal PD5
signal PD6
signal PD7
# IO Port E (see Table 4.18 in [1])
signal PE0
signal PE1
signal PE2
signal PE3
signal PE4
signal PE5
signal PE6
signal PE7
# 10-bit ADC Interface (see Table 4.19 in [1])
signal TSMX
signal TSMY
signal TSPX
signal TSPY
# PS/2 Interface (see Table 4.20 in [1])
signal KBCK
signal KBDATA
signal MSCK
signal MSDATA
# System Reset Interface (see Table 4.21 in [1])
signal nRESETPI
signal nRESETMI
signal nRESETPO
signal nRESETMO
# Crystal Interface (see Table 4.22 in [1])
signal AFECK
signal AFECKE
signal UCK
signal UCKE
# Miscellaneous Interface (see Table 4.23 in [1])
signal PWM0
signal PWM1
signal P80LE
# No Connected Pins (see Table 4.24 in [1])
signal NC(1)
signal NC(2)
signal NC(3)
signal NC(4)
signal NC(5)
signal NC(6)
signal NC(7)
signal NC(8)
signal NC(9)
signal NC(10)
signal NC(11)
signal NC(12)
signal NC(13)
signal NC(14)
# Power/Ground (see Tabe 4.25 in [1])
signal VSS
signal VCC
signal VCC5
signal VCCA
signal VCCB
signal AVCC1
signal AVSS1
signal AVCC2
signal AVSS2
signal AVCC3
signal AVSS3
signal AVCC4
signal AVSS4
signal AVCC5
signal AVCC6
signal AVSS6
# mandatory data registers
register BSR 550
register BR 1
# instructions
instruction length 3
# mandatory instructions
instruction BYPASS 111 BR
instruction EXTEST 000 BSR
instruction SAMPLE/PRELOAD 001 BSR
# boundary scan register
bit 549 I ? nBS
bit 548 I ? RING
bit 547 I ? FS
bit 546 I ? SCLK
bit 545 I ? DIN
bit 544 O ? nAFERST
bit 543 O ? nAFEPDN
bit 542 O ? HC1 541 0 Z
bit 541 C 0 .
bit 540 O ? OFFHOOK 541 0 Z
bit 539 O ? MCLKO 541 0 Z
bit 538 O ? DOUT 541 0 Z
bit 537 O ? PA0 535 0 Z
bit 536 I ? PA0
bit 535 C 0 .
bit 534 O ? PA1 532 0 Z
bit 533 I ? PA1
bit 532 C 0 .
bit 531 O ? PA2 529 0 Z
bit 530 I ? PA2
bit 529 C 0 .
bit 528 O ? PA3 526 0 Z
bit 527 I ? PA3
bit 526 C 0 .
bit 525 O ? PA4 523 0 Z
bit 524 I ? PA4
bit 523 C 0 .
bit 522 O ? PA5 520 0 Z
bit 521 I ? PA5
bit 520 C 0 .
bit 519 O ? PA6 517 0 Z
bit 518 I ? PA6
bit 517 C 0 .
bit 516 O ? PA7 514 0 Z
bit 515 I ? PA7
bit 514 C 0 .
bit 513 O ? nXIOW
bit 512 O ? nXIOR
bit 511 O ? nKBCS
bit 510 I ? KBIRQ0
bit 509 I ? KBIRQ1
bit 508 O ? P80LE
bit 507 I ? CKIO
bit 506 I ? nRESETPI
bit 505 I ? SH_MODE
bit 504 I ? A12
bit 503 I ? A11
bit 502 I ? A10
bit 501 I ? A9
bit 500 I ? A8
bit 499 I ? A7
bit 498 I ? A6
bit 497 I ? A5
bit 496 I ? A4
bit 495 I ? A3
bit 494 I ? A2
bit 493 I ? A1
bit 492 I ? A0
bit 491 O ? D31 489 0 Z
bit 490 I ? D31
bit 489 C 0 .
bit 488 O ? D30 489 0 Z
bit 487 I ? D30
bit 486 O ? D29 489 0 Z
bit 485 I ? D29
bit 484 O ? D28 489 0 Z
bit 483 I ? D28
bit 482 O ? D27 489 0 Z
bit 481 I ? D27
bit 480 O ? D26 489 0 Z
bit 479 I ? D26
bit 478 O ? D25 489 0 Z
bit 477 I ? D25
bit 476 O ? D24 489 0 Z
bit 475 I ? D24
bit 474 O ? D15 472 0 Z
bit 473 I ? D15
bit 472 C 0 .
bit 471 O ? D14 472 0 Z
bit 470 I ? D14
bit 469 O ? D13 472 0 Z
bit 468 I ? D13
bit 467 O ? D12 472 0 Z
bit 466 I ? D12
bit 465 O ? D11 472 0 Z
bit 464 I ? D11
bit 463 O ? D10 472 0 Z
bit 462 I ? D10
bit 461 O ? D9 472 0 Z
bit 460 I ? D9
bit 459 O ? D8 472 0 Z
bit 458 I ? D8
bit 457 O ? D23 455 0 Z
bit 456 I ? D23
bit 455 C 0 .
bit 454 O ? D22 455 0 Z
bit 453 I ? D22
bit 452 O ? D21 455 0 Z
bit 451 I ? D21
bit 450 O ? D20 455 0 Z
bit 449 I ? D20
bit 448 O ? D19 455 0 Z
bit 447 I ? D19
bit 446 O ? D18 455 0 Z
bit 445 I ? D18
bit 444 O ? D17 455 0 Z
bit 443 I ? D17
bit 442 O ? D16 455 0 Z
bit 441 I ? D16
bit 440 O ? D7 438 0 Z
bit 439 I ? D7
bit 438 C 0 .
bit 437 O ? D6 438 0 Z
bit 436 I ? D6
bit 435 O ? D5 438 0 Z
bit 434 I ? D5
bit 433 O ? D4 438 0 Z
bit 432 I ? D4
bit 431 O ? D3 438 0 Z
bit 430 I ? D3
bit 429 O ? D2 438 0 Z
bit 428 I ? D2
bit 427 O ? D1 438 0 Z
bit 426 I ? D1
bit 425 O ? D0 438 0 Z
bit 424 I ? D0
bit 423 O ? nIRQ0
bit 422 O ? nRDY 421 0 Z
bit 421 C 0 .
bit 420 I ? DRAK1
bit 419 O ? nDREQ1
bit 418 I ? DRAK0
bit 417 O ? nDREQ0
bit 416 I ? A13
bit 415 I ? A14
bit 414 I ? A15
bit 413 I ? A16
bit 412 I ? A17
bit 411 I ? A18
bit 410 I ? A19
bit 409 I ? A20
bit 408 I ? A21
bit 407 I ? A22
bit 406 I ? A23
bit 405 I ? A24
bit 404 I ? A25
bit 403 I ? nCS4
bit 402 I ? nRDWR
bit 401 I ? nRD
bit 400 I ? nWE0
bit 399 I ? nWE1
bit 398 I ? nWE2
bit 397 I ? nWE3
bit 396 I ? nCE2A
bit 395 I ? nCE1A
bit 394 I ? nCE2B
bit 393 I ? nCE1B
bit 392 O ? nIOIS16 391 0 Z
bit 391 C 0 .
bit 390 O ? VCC0SEL1
bit 389 O ? VCC0SEL0
bit 388 O ? VCC0VPP1
bit 387 O ? VCC0VPP0
bit 386 I ? nPCC0CD2
bit 385 I ? nPCC0CD1
bit 384 I ? nPCC0VS2
bit 383 I ? nPCC0VS1
bit 382 I ? PCC0BVD2
bit 381 I ? PCC0BVD1
bit 380 I ? PCC0RDY
bit 379 I ? nPCC0WP
bit 378 I ? nPCC0WAIT
bit 377 O ? PCC0D0 375 0 Z
bit 376 I ? PCC0D0
bit 375 C 0 .
bit 374 O ? PCC0D8 372 0 Z
bit 373 I ? PCC0D8
bit 372 C 0 .
bit 371 O ? PCC0D1 375 0 Z
bit 370 I ? PCC0D1
bit 369 O ? PCC0D9 372 0 Z
bit 368 I ? PCC0D9
bit 367 O ? PCC0D2 375 0 Z
bit 366 I ? PCC0D2
bit 365 O ? PCC0D10 372 0 Z
bit 364 I ? PCC0D10
bit 363 O ? PCC0D3 375 0 Z
bit 362 I ? PCC0D3
bit 361 O ? PCC0D11 372 0 Z
bit 360 I ? PCC0D11
bit 359 O ? PCC0A25 358 0 Z
bit 358 C 0 .
bit 357 O ? PCC0A24 358 0 Z
bit 356 O ? PCC0A23 358 0 Z
bit 355 O ? PCC0A22 358 0 Z
bit 354 O ? PCC0A21 358 0 Z
bit 353 O ? PCC0A20 358 0 Z
bit 352 O ? PCC0A19 358 0 Z
bit 351 O ? PCC0A18 358 0 Z
bit 350 O ? PCC0A17 358 0 Z
bit 349 O ? PCC0A16 358 0 Z
bit 348 O ? PCC0A15 358 0 Z
bit 347 O ? PCC0A14 358 0 Z
bit 346 O ? PCC0A13 358 0 Z
bit 345 O ? PCC0RESET 358 0 Z
bit 344 O ? nPCC0ICIORDB 358 0 Z
bit 343 O ? nPCC0ICIOWRB 358 0 Z
bit 342 O ? nWEB 358 0 Z
bit 341 O ? nRDB 358 0 Z
bit 340 O ? nPCC0CE1B 358 0 Z
bit 339 O ? nPCC0CE2B 358 0 Z
bit 338 O ? nPCC0REG 358 0 Z
bit 337 O ? PCC0A12 358 0 Z
bit 336 O ? PCC0A11 358 0 Z
bit 335 O ? PCC0A10 358 0 Z
bit 334 O ? PCC0A9 358 0 Z
bit 333 O ? PCC0A8 358 0 Z
bit 332 O ? PCC0A7 358 0 Z
bit 331 O ? PCC0A6 358 0 Z
bit 330 O ? PCC0A5 358 0 Z
bit 329 O ? PCC0A4 358 0 Z
bit 328 O ? PCC0A3 358 0 Z
bit 327 O ? PCC0A2 358 0 Z
bit 326 O ? PCC0A1 358 0 Z
bit 325 O ? PCC0A0 358 0 Z
bit 324 O ? PCC0D12 372 0 Z
bit 323 I ? PCC0D12
bit 322 O ? PCC0D4 375 0 Z
bit 321 I ? PCC0D4
bit 320 O ? PCC0D13 372 0 Z
bit 319 I ? PCC0D13
bit 318 O ? PCC0D5 375 0 Z
bit 317 I ? PCC0D5
bit 316 O ? PCC0D14 372 0 Z
bit 315 I ? PCC0D14
bit 314 O ? PCC0D6 375 0 Z
bit 313 I ? PCC0D6
bit 312 O ? PCC0D15 372 0 Z
bit 311 I ? PCC0D15
bit 310 O ? PCC0D7 375 0 Z
bit 309 I ? PCC0D7
bit 308 O ? PCC1A15 307 0 Z
bit 307 C 0 .
bit 306 O ? PCC1A14 307 0 Z
bit 305 O ? PCC1A13 307 0 Z
bit 304 O ? PCC1A12 307 0 Z
bit 303 O ? PCC1A11 307 0 Z
bit 302 O ? PCC1A10 307 0 Z
bit 301 O ? PCC1A9 307 0 Z
bit 300 O ? PCC1A8 307 0 Z
bit 299 O ? PCC1A7 307 0 Z
bit 298 O ? PCC1A6 307 0 Z
bit 297 O ? PCC1A5 307 0 Z
bit 296 O ? PCC1A4 307 0 Z
bit 295 O ? PCC1A3 307 0 Z
bit 294 O ? PCC1A2 307 0 Z
bit 293 O ? PCC1A1 307 0 Z
bit 292 O ? PCC1A0 307 0 Z
bit 291 O ? PCC1D7 289 0 Z
bit 290 I ? PCC1D7
bit 289 C 0 .
bit 288 O ? PCC1D15 286 0 Z
bit 287 I ? PCC1D15
bit 286 C 0 .
bit 285 O ? PCC1D6 289 0 Z
bit 284 I ? PCC1D6
bit 283 O ? PCC1D14 286 0 Z
bit 282 I ? PCC1D14
bit 281 O ? PCC1D5 289 0 Z
bit 280 I ? PCC1D5
bit 279 O ? PCC1D13 286 0 Z
bit 278 I ? PCC1D13
bit 277 O ? PCC1D4 289 0 Z
bit 276 I ? PCC1D4
bit 275 O ? PCC1D12 286 0 Z
bit 274 I ? PCC1D12
bit 273 O ? PCC1D3 289 0 Z
bit 272 I ? PCC1D3
bit 271 O ? PCC1D11 286 0 Z
bit 270 I ? PCC1D11
bit 269 O ? PCC1D2 289 0 Z
bit 268 I ? PCC1D2
bit 267 O ? PCC1D10 286 0 Z
bit 266 I ? PCC1D10
bit 265 O ? PCC1D1 289 0 Z
bit 264 I ? PCC1D1
bit 263 O ? PCC1D9 286 0 Z
bit 262 I ? PCC1D9
bit 261 O ? PCC1D0 289 0 Z
bit 260 I ? PCC1D0
bit 259 O ? PCC1D8 286 0 Z
bit 258 I ? PCC1D8
bit 257 O ? PCC1A16 307 0 Z
bit 256 O ? PCC1A17 307 0 Z
bit 255 O ? PCC1A18 307 0 Z
bit 254 O ? PCC1A19 307 0 Z
bit 253 O ? PCC1A20 307 0 Z
bit 252 O ? PCC1A21 307 0 Z
bit 251 O ? PCC1A22 307 0 Z
bit 250 O ? PCC1A23 307 0 Z
bit 249 O ? PCC1A24 307 0 Z
bit 248 O ? PCC1A25 307 0 Z
bit 247 O ? nPCC1REG 307 0 Z
bit 246 O ? nPCC1CE2A 307 0 Z
bit 245 O ? nPCC1CE1A 307 0 Z
bit 244 O ? nRDA 307 0 Z
bit 243 O ? nWEA 307 0 Z
bit 242 O ? nPCC1ICIORDA 307 0 Z
bit 241 O ? nPCC1ICIOWRA 307 0 Z
bit 240 O ? PCC1RESET 307 0 Z
bit 239 I ? nPCC1WAIT
bit 238 I ? nPCC1WP
bit 237 I ? PCC1RDY
bit 236 I ? PCC1BVD1
bit 235 I ? PCC1BVD2
bit 234 I ? nPCC1VS1
bit 233 I ? nPCC1VS2
bit 232 I ? nPCC1CD1
bit 231 I ? nPCC1CD2
bit 230 O ? VCC1VPP0
bit 229 O ? VCC1VPP1
bit 228 O ? VCC1SEL0
bit 227 O ? VCC1SEL1
bit 226 O ? NC(14) 224 0 Z
bit 225 I ? NC(14)
bit 224 C 0 .
bit 223 O ? NC(13) 221 0 Z
bit 222 I ? NC(13)
bit 221 C 0 .
bit 220 O ? NC(12) 218 0 Z
bit 219 I ? NC(12)
bit 218 C 0 .
bit 217 O ? NC(11) 215 0 Z
bit 216 I ? NC(11)
bit 215 C 0 .
bit 214 O ? NC(10) 212 0 Z
bit 213 I ? NC(10)
bit 212 C 0 .
bit 211 O ? NC(9) 209 0 Z
bit 210 I ? NC(9)
bit 209 C 0 .
bit 208 O ? NC(8) 206 0 Z
bit 207 I ? NC(8)
bit 206 C 0 .
bit 205 O ? NC(7) 203 0 Z
bit 204 I ? NC(7)
bit 203 C 0 .
bit 202 O ? NC(6) 200 0 Z
bit 201 I ? NC(6)
bit 200 C 0 .
bit 199 O ? NC(5) 197 0 Z
bit 198 I ? NC(5)
bit 197 C 0 .
bit 196 O ? NC(4) 194 0 Z
bit 195 I ? NC(4)
bit 194 C 0 .
bit 193 O ? NC(3) 191 0 Z
bit 192 I ? NC(3)
bit 191 C 0 .
bit 190 O ? NC(2) 188 0 Z
bit 189 I ? NC(2)
bit 188 C 0 .
bit 187 O ? NC(1) 185 0 Z
bit 186 I ? NC(1)
bit 185 C 0 .
bit 184 O ? PWM0 182 0 Z
bit 183 I ? PWM0
bit 182 C 0 .
bit 181 O ? nRESETMI 179 0 Z
bit 180 I ? nRESETMI
bit 179 C 0 .
bit 178 O ? nRESETPO 176 0 Z
bit 177 I ? nRESETPO
bit 176 C 0 .
bit 175 O ? nRESETMO 173 0 Z
bit 174 I ? nRESETMO
bit 173 C 0 .
bit 172 O ? PWM1 170 0 Z
bit 171 I ? PWM1
bit 170 C 0 .
bit 169 O ? KBCK 167 0 Z
bit 168 I ? KBCK
bit 167 C 0 .
bit 166 O ? KBDATA 164 0 Z
bit 165 I ? KBDATA
bit 164 C 0 .
bit 163 O ? MSCK 161 0 Z
bit 162 I ? MSCK
bit 161 C 0 .
bit 160 O ? MSDATA 158 0 Z
bit 159 I ? MSDATA
bit 158 C 0 .
bit 157 O ? PE7 155 0 Z
bit 156 I ? PE7
bit 155 C 0 .
bit 154 O ? PE6 152 0 Z
bit 153 I ? PE6
bit 152 C 0 .
bit 151 O ? PE5 149 0 Z
bit 150 I ? PE5
bit 149 C 0 .
bit 148 O ? PE4 146 0 Z
bit 147 I ? PE4
bit 146 C 0 .
bit 145 O ? PE3 143 0 Z
bit 144 I ? PE3
bit 143 C 0 .
bit 142 O ? PE2 140 0 Z
bit 141 I ? PE2
bit 140 C 0 .
bit 139 O ? PE1 137 0 Z
bit 138 I ? PE1
bit 137 C 0 .
bit 136 O ? PE0 134 0 Z
bit 135 I ? PE0
bit 134 C 0 .
bit 133 O ? PD7 131 0 Z
bit 132 I ? PD7
bit 131 C 0 .
bit 130 O ? PD6 128 0 Z
bit 129 I ? PD6
bit 128 C 0 .
bit 127 O ? PD5 125 0 Z
bit 126 I ? PD5
bit 125 C 0 .
bit 124 O ? PD4 122 0 Z
bit 123 I ? PD4
bit 122 C 0 .
bit 121 O ? PD3 119 0 Z
bit 120 I ? PD3
bit 119 C 0 .
bit 118 O ? PD2 116 0 Z
bit 117 I ? PD2
bit 116 C 0 .
bit 115 O ? PD1 113 0 Z
bit 114 I ? PD1
bit 113 C 0 .
bit 112 O ? PD0 110 0 Z
bit 111 I ? PD0
bit 110 C 0 .
bit 109 O ? PC7 107 0 Z
bit 108 I ? PC7
bit 107 C 0 .
bit 106 O ? PC6 104 0 Z
bit 105 I ? PC6
bit 104 C 0 .
bit 103 O ? PC5 101 0 Z
bit 102 I ? PC5
bit 101 C 0 .
bit 100 O ? PC4 98 0 Z
bit 99 I ? PC4
bit 98 C 0 .
bit 97 I ? RXD0
bit 96 I ? nCTS0
bit 95 I ? nDSR0
bit 94 I ? nDCD0
bit 93 I ? nRI0
bit 92 O ? TXD0
bit 91 O ? nRTS0
bit 90 O ? nDTR0
bit 89 O ? PC3 87 0 Z
bit 88 I ? PC3
bit 87 C 0 .
bit 86 O ? PC2 84 0 Z
bit 85 I ? PC2
bit 84 C 0 .
bit 83 O ? PC1 81 0 Z
bit 82 I ? PC1
bit 81 C 0 .
bit 80 O ? PC0 78 0 Z
bit 79 I ? PC0
bit 78 C 0 .
bit 77 O ? nUSBPEN 75 0 Z
bit 76 I ? nUSBPEN
bit 75 C 0 .
bit 74 I ? nUSBOVR
bit 73 O ? MODSEL 71 0 Z
bit 72 I ? MODSEL
bit 71 C 0 .
bit 70 O ? TXD
bit 69 O ? nRX 67 0 Z
bit 68 I ? nRX
bit 67 C 0 .
bit 66 O ? PPD0 64 0 Z
bit 65 I ? PPD0
bit 64 C 0 .
bit 63 O ? PPD1 64 0 Z
bit 62 I ? PPD1
bit 61 O ? PPD2 64 0 Z
bit 60 I ? PPD2
bit 59 O ? PPD3 64 0 Z
bit 58 I ? PPD3
bit 57 O ? nINIT 56 0 Z
bit 56 C 0 .
bit 55 I ? nERR
bit 54 O ? nAFD 56 0 Z
bit 53 O ? nSTB 56 0 Z
bit 52 I ? SLCT
bit 51 I ? PE
bit 50 I ? BUSY
bit 49 I ? nACK
bit 48 O ? nSLIN 56 0 Z
bit 47 O ? PPD4 64 0 Z
bit 46 I ? PPD4
bit 45 O ? PPD5 64 0 Z
bit 44 I ? PPD5
bit 43 O ? PPD6 64 0 Z
bit 42 I ? PPD6
bit 41 O ? PPD7 64 0 Z
bit 40 I ? PPD7
bit 39 O ? PB0 37 0 Z
bit 38 I ? PB0
bit 37 C 0 .
bit 36 O ? PB1 34 0 Z
bit 35 I ? PB1
bit 34 C 0 .
bit 33 O ? PB2 31 0 Z
bit 32 I ? PB2
bit 31 C 0 .
bit 30 O ? PB3 28 0 Z
bit 29 I ? PB3
bit 28 C 0 .
bit 27 O ? PB4 25 0 Z
bit 26 I ? PB4
bit 25 C 0 .
bit 24 O ? PB5 22 0 Z
bit 23 I ? PB5
bit 22 C 0 .
bit 21 O ? PB6 19 0 Z
bit 20 I ? PB6
bit 19 C 0 .
bit 18 O ? PB7 16 0 Z
bit 17 I ? PB7
bit 16 C 0 .
bit 15 O ? nACPD 13 0 Z
bit 14 I ? nACPD
bit 13 C 0 .
bit 12 O ? ACCLK 11 0 Z
bit 11 C 0 .
bit 10 I ? SIBDIN
bit 9 O ? SIBCLK 7 0 Z
bit 8 I ? SIBCLK
bit 7 C 0 .
bit 6 O ? SIBDOUT 5 0 Z
bit 5 C 0 .
bit 4 O ? SIBSYNC 2 0 Z
bit 3 I ? SIBSYNC
bit 2 C 0 .
bit 1 O ? nACRST 0 0 Z
bit 0 C 0 .

@ -0,0 +1,25 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
#
# bits 31-28 of the Device Identification Register
0000 sh7727 V0

@ -0,0 +1,673 @@
#
# $Id$
#
# JTAG declarations for SH7727
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
#
# Documentation:
# [1] Hitachi, Ltd., "Hitachi SuperH RISC Engine SH7727 Hardware Manual",
# 2003-01-31, ADE-602-209C Rev. 4.0
#
signal VCC1
signal XTAL2
signal EXTAL2
signal VSS1
signal MD1
signal MD2
signal NMI
signal IRQ0
signal IRQ1
signal IRQ2
signal IRQ3
signal IRQ4
signal VEPWC
signal VCPWC
signal MD5
signal BREQ
signal BACK
signal VSS2
signal CKIO2
signal VCC2
signal D31
signal D30
signal D29
signal D28
signal D27
signal D26
signal D25
signal D24
signal VSS3
signal D23
signal VCC3
signal D22
signal D21
signal D20
signal VSS4
signal D19
signal VCC4
signal D18
signal D17
signal D16
signal D15
signal VSS5
signal D14
signal VCC5
signal D13
signal D12
signal D11
signal D10
signal D9
signal D8
signal D7
signal D6
signal VSS6
signal D5
signal VCC6
signal D4
signal D3
signal D2
signal D1
signal D0
signal A0
signal A1
signal A2
signal VSS7
signal A3
signal VCC7
signal A4
signal A5
signal A6
signal A7
signal A8
signal A9
signal A10
signal A11
signal VSS8
signal A12
signal VCC8
signal A13
signal A14
signal A15
signal A16
signal A17
signal A18
signal A19
signal A20
signal VSS9
signal A21
signal VCC9
signal A22
signal A23
signal VSS10
signal A24
signal VCC10
signal A25
signal BS
signal RD
signal WE0
signal WE1
signal WE2
signal VSS11
signal WE3
signal VCC11
signal RDWR
signal PTE7
signal CS0
signal CS2
signal CS3
signal CS4
signal CS5
signal CS6
signal CE2A
signal CE2B
signal AFE_HC1
signal AFE_RLYCNT
signal VSS12
signal AFE_SCLK
signal VCC12
signal AFE_FS
signal AFE_RXIN
signal AFE_TXOUT
signal AFE_RDET
signal USB1D_SUSPEND
signal USB1_OVR_CRNT
signal USB2_OVR_CRNT
signal RTS2
signal USB1_PWR_EN
signal USB2_PWR_EN
signal CKE
signal RAS
signal PTJ1
signal CAS
signal VSS13
signal PTJ3
signal VCC13
signal PTJ4
signal PTJ5
signal VSS14
signal CL1
signal VCC14
signal DON
signal M_DISP
signal FLM
signal TDO
signal DRAK0
signal DACK0
signal WAPIN
signal RESETM
signal ADTRG
signal IOIS16
signal ASEMDO
signal PTG5
signal PTG4
signal PTG3
signal PTG2
signal VSS15
signal PTG1
signal VCC15
signal PTG0
signal VSS16
signal TRST
signal VCC16
signal TMS
signal TDI
signal TCK
signal PTF3
signal PTF2
signal PTF1
signal PTF0
signal MD0
signal VCC17
signal CAP1
signal VSS17
signal VSS18
signal CAP2
signal VCC18
signal PTH6
signal VSS19
signal VCC19
signal XTAL
signal EXTAL
signal LCD15
signal LCD14
signal LCD13
signal LCD12
signal STATUS0
signal STATUS1
signal CL2
signal VSS20
signal CKIO
signal VCC20
signal TXD0
signal SCK0
signal TXD_SIO
signal SIOMCLK
signal TXD2
signal SCK_SIO
signal SIOFSYNC
signal RXD0
signal RXD_SIO
signal VSS21
signal RXD2
signal VCC21
signal CTS2
signal LCD11
signal LCD10
signal LCD9
signal VSS22
signal LCD8
signal VCC22
signal LCD7
signal LCD6
signal LCD5
signal LCD4
signal LCD3
signal LCD2
signal LCD1
signal LCD0
signal DREQ0
signal LCK
signal RESETP
signal CA
signal MD3
signal MD4
signal VCC23
signal AVCC1
signal USB1_P
signal USB1_M
signal AVSS1
signal USB2_P
signal USB2_M
signal AVCC2
signal AVSS2
signal AN2
signal AN3
signal AN4
signal AN5
signal AVCC3
signal AN6
signal AN7
register BSR 392
register BR 1
register DIR 32
instruction length 16
instruction EXTEST 0000111111111111 BSR
instruction SAMPLE/PRELOAD 0100111111111111 BSR
instruction IDCODE 1110111111111111 DIR
instruction BYPASS 1111111111111111 BR
bit 391 I 1 D31
bit 390 I 1 D30
bit 389 I 1 D29
bit 388 I 1 D28
bit 387 I 1 D27
bit 386 I 1 D26
bit 385 I 1 D25
bit 384 I 1 D24
bit 383 I 1 D23
bit 382 I 1 D22
bit 381 I 1 D21
bit 380 I 1 D20
bit 379 I 1 D19
bit 378 I 1 D18
bit 377 I 1 D17
bit 376 I 1 D16
bit 375 I 1 D15
bit 374 I 1 D14
bit 373 I 1 D13
bit 372 I 1 D12
bit 371 I 1 D11
bit 370 I 1 D10
bit 369 I 1 D9
bit 368 I 1 D8
bit 367 I 1 D7
bit 366 I 1 D6
bit 365 I 1 D5
bit 364 I 1 D4
bit 363 I 1 D3
bit 362 I 1 D2
bit 361 I 1 D1
bit 360 I 1 D0
bit 359 I 1 MD1
bit 358 I 1 MD2
bit 357 I 1 NMI
bit 356 I 1 IRQ0
bit 355 I 1 IRQ1
bit 354 I 1 IRQ2
bit 353 I 1 IRQ3
bit 352 I 1 IRQ4
bit 351 I 1 MD5
bit 350 I 1 BREQ
bit 349 O 1 VEPWC 314 1 Z
bit 348 O 1 VCPWC 313 1 Z
bit 347 O 1 BACK 312 1 Z
bit 346 O 1 D31 311 1 Z
bit 345 O 1 D30 310 1 Z
bit 344 O 1 D29 309 1 Z
bit 343 O 1 D28 308 1 Z
bit 342 O 1 D27 307 1 Z
bit 341 O 1 D26 306 1 Z
bit 340 O 1 D25 305 1 Z
bit 339 O 1 D24 304 1 Z
bit 338 O 1 D23 303 1 Z
bit 337 O 1 D22 302 1 Z
bit 336 O 1 D21 301 1 Z
bit 335 O 1 D20 300 1 Z
bit 334 O 1 D19 299 1 Z
bit 333 O 1 D18 298 1 Z
bit 332 O 1 D17 297 1 Z
bit 331 O 1 D16 296 1 Z
bit 330 O 1 D15 295 1 Z
bit 329 O 1 D14 294 1 Z
bit 328 O 1 D13 293 1 Z
bit 327 O 1 D12 292 1 Z
bit 326 O 1 D11 291 1 Z
bit 325 O 1 D10 290 1 Z
bit 324 O 1 D9 289 1 Z
bit 323 O 1 D8 288 1 Z
bit 322 O 1 D7 287 1 Z
bit 321 O 1 D6 286 1 Z
bit 320 O 1 D5 285 1 Z
bit 319 O 1 D4 284 1 Z
bit 318 O 1 D3 283 1 Z
bit 317 O 1 D2 282 1 Z
bit 316 O 1 D1 281 1 Z
bit 315 O 1 D0 280 1 Z
bit 314 C 1 *
bit 313 C 1 *
bit 312 C 1 *
bit 311 C 1 *
bit 310 C 1 *
bit 309 C 1 *
bit 308 C 1 *
bit 307 C 1 *
bit 306 C 1 *
bit 305 C 1 *
bit 304 C 1 *
bit 303 C 1 *
bit 302 C 1 *
bit 301 C 1 *
bit 300 C 1 *
bit 299 C 1 *
bit 298 C 1 *
bit 297 C 1 *
bit 296 C 1 *
bit 295 C 1 *
bit 294 C 1 *
bit 293 C 1 *
bit 292 C 1 *
bit 291 C 1 *
bit 290 C 1 *
bit 289 C 1 *
bit 288 C 1 *
bit 287 C 1 *
bit 286 C 1 *
bit 285 C 1 *
bit 284 C 1 *
bit 283 C 1 *
bit 282 C 1 *
bit 281 C 1 *
bit 280 C 1 *
bit 279 I 1 BS
bit 278 I 1 WE2
bit 277 I 1 WE3
bit 276 I 1 PTE7
bit 275 I 1 CS4
bit 274 I 1 CS5
bit 273 I 1 CE2A
bit 272 I 1 CE2B
bit 271 I 1 AFE_HC1
bit 270 I 1 AFE_RLYCNT
bit 269 I 1 AFE_SCLK
bit 268 I 1 AFE_FS
bit 267 I 1 AFE_RXIN
bit 266 I 1 AFE_TXOUT
bit 265 O 1 A0 217 1 Z
bit 264 O 1 A1 216 1 Z
bit 263 O 1 A2 215 1 Z
bit 262 O 1 A3 214 1 Z
bit 261 O 1 A4 213 1 Z
bit 260 O 1 A5 212 1 Z
bit 259 O 1 A6 211 1 Z
bit 258 O 1 A7 210 1 Z
bit 257 O 1 A8 209 1 Z
bit 256 O 1 A9 208 1 Z
bit 255 O 1 A10 207 1 Z
bit 254 O 1 A11 206 1 Z
bit 253 O 1 A12 205 1 Z
bit 252 O 1 A13 204 1 Z
bit 251 O 1 A14 203 1 Z
bit 250 O 1 A15 202 1 Z
bit 249 O 1 A16 201 1 Z
bit 248 O 1 A17 200 1 Z
bit 247 O 1 A18 199 1 Z
bit 246 O 1 A19 198 1 Z
bit 245 O 1 A20 197 1 Z
bit 244 O 1 A21 196 1 Z
bit 243 O 1 A22 195 1 Z
bit 242 O 1 A23 194 1 Z
bit 241 O 1 A24 193 1 Z
bit 240 O 1 A25 192 1 Z
bit 239 O 1 BS 191 1 Z
bit 238 O 1 RD 190 1 Z
bit 237 O 1 WE0 189 1 Z
bit 236 O 1 WE1 188 1 Z
bit 235 O 1 WE2 187 1 Z
bit 234 O 1 WE3 186 1 Z
bit 233 O 1 RDWR 185 1 Z
bit 232 O 1 PTE7 184 1 Z
bit 231 O 1 CS0 183 1 Z
bit 230 O 1 CS2 182 1 Z
bit 229 O 1 CS3 181 1 Z
bit 228 O 1 CS4 180 1 Z
bit 227 O 1 CS5 179 1 Z
bit 226 O 1 CS6 178 1 Z
bit 225 O 1 CE2A 177 1 Z
bit 224 O 1 CE2B 176 1 Z
bit 223 O 1 AFE_HC1 175 1 Z
bit 222 O 1 AFE_RLYCNT 174 1 Z
bit 221 O 1 AFE_SCLK 173 1 Z
bit 220 O 1 AFE_FS 172 1 Z
bit 219 O 1 AFE_RXIN 171 1 Z
bit 218 O 1 AFE_TXOUT 170 1 Z
bit 217 C 1 *
bit 216 C 1 *
bit 215 C 1 *
bit 214 C 1 *
bit 213 C 1 *
bit 212 C 1 *
bit 211 C 1 *
bit 210 C 1 *
bit 209 C 1 *
bit 208 C 1 *
bit 207 C 1 *
bit 206 C 1 *
bit 205 C 1 *
bit 204 C 1 *
bit 203 C 1 *
bit 202 C 1 *
bit 201 C 1 *
bit 200 C 1 *
bit 199 C 1 *
bit 198 C 1 *
bit 197 C 1 *
bit 196 C 1 *
bit 195 C 1 *
bit 194 C 1 *
bit 193 C 1 *
bit 192 C 1 *
bit 191 C 1 *
bit 190 C 1 *
bit 189 C 1 *
bit 188 C 1 *
bit 187 C 1 *
bit 186 C 1 *
bit 185 C 1 *
bit 184 C 1 *
bit 183 C 1 *
bit 182 C 1 *
bit 181 C 1 *
bit 180 C 1 *
bit 179 C 1 *
bit 178 C 1 *
bit 177 C 1 *
bit 176 C 1 *
bit 175 C 1 *
bit 174 C 1 *
bit 173 C 1 *
bit 172 C 1 *
bit 171 C 1 *
bit 170 C 1 *
bit 169 I 1 AFE_RDET
bit 168 I 1 USB1D_SUSPEND
bit 167 I 1 USB1_OVR_CRNT
bit 166 I 1 USB2_OVR_CRNT
bit 165 I 1 RTS2
bit 164 I 1 USB1_PWR_EN
bit 163 I 1 USB2_PWR_EN
bit 162 I 1 CKE
bit 161 I 1 RAS
bit 160 I 1 PTJ1
bit 159 I 1 CAS
bit 158 I 1 PTJ0
bit 157 I 1 PTJ4
bit 156 I 1 PTJ5
bit 155 I 1 CL1
bit 154 I 1 DON
bit 153 I 1 M_DISP
bit 152 I 1 FLM
bit 151 I 1 WAPIN
bit 150 I 1 PTH6
bit 149 I 1 IOIS16
bit 148 I 1 PTG5
bit 147 I 1 PTG4
bit 146 I 1 PTG3
bit 145 I 1 PTG2
bit 144 I 1 PTG1
bit 143 I 1 PTG0
bit 142 I 1 ADTRG
bit 141 I 1 PTF3
bit 140 I 1 PTF2
bit 139 I 1 PTF1
bit 138 I 1 PTF0
bit 137 I 1 MD0
bit 136 O 1 AFE_RDET 109 1 Z
bit 135 O 1 USB1D_SUSPEND 108 1 Z
bit 134 O 1 RTS2 107 1 Z
bit 133 O 1 USB1_PWR_EN 106 1 Z
bit 132 O 1 USB2_PWR_EN 105 1 Z
bit 131 O 1 CKE 104 1 Z
bit 130 O 1 RAS 103 1 Z
bit 129 O 1 PTJ1 102 1 Z
bit 128 O 1 CAS 101 1 Z
bit 127 O 1 PTJ3 100 1 Z
bit 126 O 1 PTJ4 99 1 Z
bit 125 O 1 PTJ5 98 1 Z
bit 124 O 1 CL1 97 1 Z
bit 123 O 1 DON 96 1 Z
bit 122 O 1 M_DISP 95 1 Z
bit 121 O 1 FLM 94 1 Z
bit 120 O 1 DRAK0 93 1 Z
bit 119 O 1 DACK0 92 1 Z
bit 118 O 1 PTG5 91 1 Z
bit 117 O 1 PTG3 90 1 Z
bit 116 O 1 PTG2 89 1 Z
bit 115 O 1 PTG1 88 1 Z
bit 114 O 1 PTG0 87 1 Z
bit 113 O 1 PTF3 86 1 Z
bit 112 O 1 PTF2 85 1 Z
bit 111 O 1 PTF1 84 1 Z
bit 110 O 1 PTF0 83 1 Z
bit 109 C 1 *
bit 108 C 1 *
bit 107 C 1 *
bit 106 C 1 *
bit 105 C 1 *
bit 104 C 1 *
bit 103 C 1 *
bit 102 C 1 *
bit 101 C 1 *
bit 100 C 1 *
bit 99 C 1 *
bit 98 C 1 *
bit 97 C 1 *
bit 96 C 1 *
bit 95 C 1 *
bit 94 C 1 *
bit 93 C 1 *
bit 92 C 1 *
bit 91 C 1 *
bit 90 C 1 *
bit 89 C 1 *
bit 88 C 1 *
bit 87 C 1 *
bit 86 C 1 *
bit 85 C 1 *
bit 84 C 1 *
bit 83 C 1 *
bit 82 I 1 LCD15
bit 81 I 1 LCD14
bit 80 I 1 LCD13
bit 79 I 1 LCD12
bit 78 I 1 STATUS0
bit 77 I 1 STATUS1
bit 76 I 1 CL2
bit 75 I 1 SCK0
bit 74 I 1 SIOMCLK
bit 73 I 1 SCK_SIO
bit 72 I 1 SIOFSYNC
bit 71 I 1 RXD0
bit 70 I 1 RXD2
bit 69 I 1 LCD7
bit 68 I 1 LCD6
bit 67 I 1 LCD1
bit 66 I 1 LCD0
bit 65 I 1 DREQ0
bit 64 I 1 LCK
bit 63 I 1 RXD_SIO
bit 62 I 1 CTS2
bit 61 I 1 LCD11
bit 60 I 1 LCD10
bit 59 I 1 LCD9
bit 58 I 1 LCD8
bit 57 I 1 LCD5
bit 56 I 1 LCD4
bit 55 I 1 LCD3
bit 54 I 1 LCD2
bit 53 I 1 MD3
bit 52 I 1 MD4
bit 51 O 1 LCD15 25 1 Z
bit 50 O 1 LCD14 24 1 Z
bit 49 O 1 LCD13 23 1 Z
bit 48 O 1 LCD12 22 1 Z
bit 47 O 1 STATUS0 21 1 Z
bit 46 O 1 STATUS1 20 1 Z
bit 45 O 1 CL2 19 1 Z
bit 44 O 1 TXD0 18 1 Z
bit 43 O 1 SCK0 17 1 Z
bit 42 O 1 TXD_SIO 16 1 Z
bit 41 O 1 SIOMCLK 15 1 Z
bit 40 O 1 TXD2 14 1 Z
bit 39 O 1 SCK_SIO 13 1 Z
bit 38 O 1 SIOFSYNC 12 1 Z
bit 37 O 1 LCD11 11 1 Z
bit 36 O 1 LCD10 10 1 Z
bit 35 O 1 LCD9 9 1 Z
bit 34 O 1 LCD8 8 1 Z
bit 33 O 1 LCD7 7 1 Z
bit 32 O 1 LCD6 6 1 Z
bit 31 O 1 LCD5 5 1 Z
bit 30 O 1 LCD4 4 1 Z
bit 29 O 1 LCD3 3 1 Z
bit 28 O 1 LCD2 2 1 Z
bit 27 O 1 LCD1 1 1 Z
bit 26 O 1 LCD0 0 1 Z
bit 25 C 1 *
bit 24 C 1 *
bit 23 C 1 *
bit 22 C 1 *
bit 21 C 1 *
bit 20 C 1 *
bit 19 C 1 *
bit 18 C 1 *
bit 17 C 1 *
bit 16 C 1 *
bit 15 C 1 *
bit 14 C 1 *
bit 13 C 1 *
bit 12 C 1 *
bit 11 C 1 *
bit 10 C 1 *
bit 9 C 1 *
bit 8 C 1 *
bit 7 C 1 *
bit 6 C 1 *
bit 5 C 1 *
bit 4 C 1 *
bit 3 C 1 *
bit 2 C 1 *
bit 1 C 1 *
bit 0 C 1 *
initbus sh7727

@ -0,0 +1,25 @@
#
# $Id$
#
# Copyright (C) 2003 ETC s.r.o.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
#
# bits 31-28 of the Device Identification Register
0000 sh7729 V0

@ -0,0 +1,587 @@
#
# $Id: sh7729,v 1.0 2003/18/10 21:09:11
#
# JTAG declarations for SH7729
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Balazs Beregnyei <bereg@impulzus.sch.bme.hu>, 2003.
#
# Documentation:
# [1] Hitachi, Ltd., "Hitachi SuperH RISC Engine SH7729 Hardware Manual"
#
signal MD1
signal MD2
signal VCC0
signal XTAL2
signal EXTAL2
signal VSS0
signal NMI
signal IRQ0
signal IRQ1
signal IRQ2
signal IRQ3
signal IRQ4
signal D31
signal D30
signal D29
signal D28
signal D27
signal D26
signal VSS1
signal D25
signal VCC1
signal D24
signal D23
signal D22
signal D21
signal D20
signal VSS2
signal D19
signal VCC2
signal D18
signal D17
signal D16
signal VSS3
signal D15
signal VCC3
signal D14
signal D13
signal D12
signal D11
signal D10
signal D9
signal D8
signal D7
signal D6
signal VSS4
signal D5
signal VCC4
signal D4
signal D3
signal D2
signal D1
signal D0
signal A0
signal A1
signal A2
signal A3
signal VSS5
signal A4
signal VCC5
signal A5
signal A6
signal A7
signal A8
signal A9
signal A10
signal A11
signal A12
signal A13
signal VSS6
signal A14
signal VCC6
signal A15
signal A16
signal A17
signal A18
signal A19
signal A20
signal A21
signal VSS7
signal A22
signal VCC7
signal A23
signal VSS8
signal A24
signal VCC8
signal A25
signal BS
signal RD
signal WE0
signal WE1
signal WE2
signal WE3
signal RDWR
signal AUDSYNC
signal VSS9
signal CS0
signal VCC9
signal CS2
signal CS3
signal CS4
signal CS5
signal CS6
signal CE2A
signal CE2B
signal CKE
signal RAS3L
signal PTJ1
signal CASL
signal VSS10
signal CASU
signal VCC10
signal PTJ4
signal PTJ5
signal DACK0
signal DACK1
signal PTE6
signal PTE3
signal RAS3U
signal PTE1
signal TDO
signal BACK
signal BREQ
signal WAIT
signal RESETM
signal ADTRG
signal IOIS16
signal ASEMD0
signal ASEBRKAK
signal CKIO2
signal AUDATA3
signal AUDATA2
signal VSS11
signal AUDATA1
signal VCC11
signal AUDATA0
signal TRST
signal TMS
signal TDI
signal TCK
signal IRLS3
signal IRLS2
signal IRLS1
signal IRLS0
signal MD0
signal VCC12
signal CAP1
signal VSS12
signal VSS13
signal CAP2
signal VCC13
signal AUDCK
signal VSS14
signal VSS15
signal VCC15
signal XTAL
signal EXTAL
signal STATUS0
signal STATUS1
signal TCLK
signal IRQOUT
signal VSS16
signal CKIO
signal VCC16
signal TXD0
signal SCK0
signal TXD1
signal SCK1
signal TXD2
signal SCK2
signal RTS2
signal RXD0
signal RXD1
signal VSS17
signal RXD2
signal VCC17
signal CTS2
signal MCS7
signal MCS6
signal MCS5
signal MCS4
signal VSS18
signal WAKEUP
signal VCC18
signal RESETOUT
signal MCS3
signal MCS2
signal MCS1
signal MCS0
signal DRAK0
signal DRAK1
signal DREQ0
signal DREQ1
signal RESETP
signal CA
signal MD3
signal MD4
signal MD5
signal VSS19
signal AN0
signal AN1
signal AN2
signal AN3
signal AN4
signal AN5
signal VCC19
signal AN6
signal AN7
signal VSS20
register BSR 339
register BR 1
register DIR 32
instruction length 16
instruction EXTEST 0000111111111111 BSR
instruction SAMPLE/PRELOAD 0100111111111111 BSR
instruction IDCODE 1110111111111111 DIR
instruction BYPASS 1111111111111111 BR
bit 338 I 1 D31
bit 337 I 1 D30
bit 336 I 1 D29
bit 335 I 1 D28
bit 334 I 1 D27
bit 333 I 1 D26
bit 332 I 1 D25
bit 331 I 1 D24
bit 330 I 1 D23
bit 329 I 1 D22
bit 328 I 1 D21
bit 327 I 1 D20
bit 326 I 1 D19
bit 325 I 1 D18
bit 324 I 1 D17
bit 323 I 1 D16
bit 322 I 1 D15
bit 321 I 1 D14
bit 320 I 1 D13
bit 319 I 1 D12
bit 318 I 1 D11
bit 317 I 1 D10
bit 316 I 1 D9
bit 315 I 1 D8
bit 314 I 1 D7
bit 313 I 1 D6
bit 312 I 1 D5
bit 311 I 1 D4
bit 310 I 1 D3
bit 309 I 1 D2
bit 308 I 1 D1
bit 307 I 1 D0
bit 306 I 1 MD1
bit 305 I 1 MD2
bit 304 I 1 NMI
bit 303 I 1 IRQ0
bit 302 I 1 IRQ1
bit 301 I 1 IRQ2
bit 300 I 1 IRQ3
bit 299 I 1 IRQ4
bit 298 O 1 D31 266 1 Z
bit 297 O 1 D30 265 1 Z
bit 296 O 1 D29 264 1 Z
bit 295 O 1 D28 263 1 Z
bit 294 O 1 D27 262 1 Z
bit 293 O 1 D26 261 1 Z
bit 292 O 1 D25 260 1 Z
bit 291 O 1 D24 259 1 Z
bit 290 O 1 D23 258 1 Z
bit 289 O 1 D22 257 1 Z
bit 288 O 1 D21 256 1 Z
bit 287 O 1 D20 255 1 Z
bit 286 O 1 D19 254 1 Z
bit 285 O 1 D18 253 1 Z
bit 284 O 1 D17 252 1 Z
bit 283 O 1 D16 251 1 Z
bit 282 O 1 D15 250 1 Z
bit 281 O 1 D14 249 1 Z
bit 280 O 1 D13 248 1 Z
bit 279 O 1 D12 247 1 Z
bit 278 O 1 D11 246 1 Z
bit 277 O 1 D10 245 1 Z
bit 276 O 1 D9 244 1 Z
bit 275 O 1 D8 243 1 Z
bit 274 O 1 D7 242 1 Z
bit 273 O 1 D6 241 1 Z
bit 272 O 1 D5 240 1 Z
bit 271 O 1 D4 239 1 Z
bit 270 O 1 D3 238 1 Z
bit 269 O 1 D2 237 1 Z
bit 268 O 1 D1 236 1 Z
bit 267 O 1 D0 235 1 Z
bit 266 C 1 *
bit 265 C 1 *
bit 264 C 1 *
bit 263 C 1 *
bit 262 C 1 *
bit 261 C 1 *
bit 260 C 1 *
bit 259 C 1 *
bit 258 C 1 *
bit 257 C 1 *
bit 256 C 1 *
bit 255 C 1 *
bit 254 C 1 *
bit 253 C 1 *
bit 252 C 1 *
bit 251 C 1 *
bit 250 C 1 *
bit 249 C 1 *
bit 248 C 1 *
bit 247 C 1 *
bit 246 C 1 *
bit 245 C 1 *
bit 244 C 1 *
bit 243 C 1 *
bit 242 C 1 *
bit 241 C 1 *
bit 240 C 1 *
bit 239 C 1 *
bit 238 C 1 *
bit 237 C 1 *
bit 236 C 1 *
bit 235 C 1 *
bit 234 I 1 BS
bit 233 I 1 WE2
bit 232 I 1 WE3
bit 231 I 1 AUDSYNC
bit 230 I 1 CS2
bit 229 I 1 CS3
bit 228 I 1 CS4
bit 227 I 1 CS5
bit 226 I 1 CE2A
bit 225 I 1 CE2B
bit 224 O 1 A0 182 1 Z
bit 223 O 1 A1 181 1 Z
bit 222 O 1 A2 180 1 Z
bit 221 O 1 A3 179 1 Z
bit 220 O 1 A4 178 1 Z
bit 219 O 1 A5 177 1 Z
bit 218 O 1 A6 176 1 Z
bit 217 O 1 A7 175 1 Z
bit 216 O 1 A8 174 1 Z
bit 215 O 1 A9 173 1 Z
bit 214 O 1 A10 172 1 Z
bit 213 O 1 A11 171 1 Z
bit 212 O 1 A12 170 1 Z
bit 211 O 1 A13 169 1 Z
bit 210 O 1 A14 168 1 Z
bit 209 O 1 A15 167 1 Z
bit 208 O 1 A16 166 1 Z
bit 207 O 1 A17 165 1 Z
bit 206 O 1 A18 164 1 Z
bit 205 O 1 A19 163 1 Z
bit 204 O 1 A20 162 1 Z
bit 203 O 1 A21 161 1 Z
bit 202 O 1 A22 160 1 Z
bit 201 O 1 A23 159 1 Z
bit 200 O 1 A24 158 1 Z
bit 199 O 1 A25 157 1 Z
bit 198 O 1 BS 156 1 Z
bit 197 O 1 RD 155 1 Z
bit 196 O 1 WE0 154 1 Z
bit 195 O 1 WE1 153 1 Z
bit 194 O 1 WE2 152 1 Z
bit 193 O 1 WE3 151 1 Z
bit 192 O 1 RDWR 150 1 Z
bit 191 O 1 AUDSYNC 149 1 Z
bit 190 O 1 CS0 148 1 Z
bit 189 O 1 CS2 147 1 Z
bit 188 O 1 CS3 146 1 Z
bit 187 O 1 CS4 145 1 Z
bit 186 O 1 CS5 144 1 Z
bit 185 O 1 CS6 143 1 Z
bit 184 O 1 CE2A 142 1 Z
bit 183 O 1 CE2B 141 1 Z
bit 182 C 1 *
bit 181 C 1 *
bit 180 C 1 *
bit 179 C 1 *
bit 178 C 1 *
bit 177 C 1 *
bit 176 C 1 *
bit 175 C 1 *
bit 174 C 1 *
bit 173 C 1 *
bit 172 C 1 *
bit 171 C 1 *
bit 170 C 1 *
bit 169 C 1 *
bit 168 C 1 *
bit 167 C 1 *
bit 166 C 1 *
bit 165 C 1 *
bit 164 C 1 *
bit 163 C 1 *
bit 162 C 1 *
bit 161 C 1 *
bit 160 C 1 *
bit 159 C 1 *
bit 158 C 1 *
bit 157 C 1 *
bit 156 C 1 *
bit 155 C 1 *
bit 154 C 1 *
bit 153 C 1 *
bit 152 C 1 *
bit 151 C 1 *
bit 150 C 1 *
bit 149 C 1 *
bit 148 C 1 *
bit 147 C 1 *
bit 146 C 1 *
bit 145 C 1 *
bit 144 C 1 *
bit 143 C 1 *
bit 142 C 1 *
bit 141 C 1 *
bit 140 I 1 CKE
bit 139 I 1 RAS3L
bit 138 I 1 RAS2L
bit 137 I 1 CASLL
bit 136 I 1 CASLH
bit 135 I 1 CASHL
bit 134 I 1 CASHH
bit 133 I 1 DACK0
bit 132 I 1 DACK1
bit 131 I 1 CAS2L
bit 130 I 1 CAS2H
bit 129 I 1 RAS3U
bit 128 I 1 RAS2U
bit 127 I 1 BREQ
bit 126 I 1 WAIT
bit 125 I 1 AUDCK
bit 124 I 1 IOIS16
bit 123 I 1 ASEBRKAK
bit 122 I 1 PTG4
bit 121 I 1 AUDATA3
bit 120 I 1 AUDATA2
bit 119 I 1 AUDATA1
bit 118 I 1 AUDATA0
bit 117 I 1 ADTRG
bit 116 I 1 IRLS3
bit 115 I 1 IRLS2
bit 114 I 1 IRLS1
bit 113 I 1 IRLS0
bit 112 I 1 MD0
bit 111 O 1 CKE 92 1 Z
bit 110 O 1 RAS3L 91 1 Z
bit 109 O 1 RAS2L 90 1 Z
bit 108 O 1 CASLL 89 1 Z
bit 107 O 1 CASLH 88 1 Z
bit 106 O 1 CASHL 87 1 Z
bit 105 O 1 CASHH 86 1 Z
bit 104 O 1 DACK0 85 1 Z
bit 103 O 1 DACK1 84 1 Z
bit 102 O 1 CAS2L 83 1 Z
bit 101 O 1 CAS2H 82 1 Z
bit 100 O 1 RAS3U 81 1 Z
bit 99 O 1 RAS2U 80 1 Z
bit 98 O 1 BACK 79 1 Z
bit 97 O 1 ASEBRKAK 78 1 Z
bit 96 O 1 AUDATA3 77 1 Z
bit 95 O 1 AUDATA2 76 1 Z
bit 94 O 1 AUDATA1 75 1 Z
bit 93 O 1 AUDATA0 74 1 Z
bit 92 C 1 *
bit 91 C 1 *
bit 90 C 1 *
bit 89 C 1 *
bit 88 C 1 *
bit 87 C 1 *
bit 86 C 1 *
bit 85 C 1 *
bit 84 C 1 *
bit 83 C 1 *
bit 82 C 1 *
bit 81 C 1 *
bit 80 C 1 *
bit 79 C 1 *
bit 78 C 1 *
bit 77 C 1 *
bit 76 C 1 *
bit 75 C 1 *
bit 74 C 1 *
bit 73 I 1 STATUS0
bit 72 I 1 STATUS1
bit 71 I 1 TCLK
bit 70 I 1 SCK0
bit 69 I 1 SCK1
bit 68 I 1 SCK2
bit 67 I 1 RTS2
bit 66 I 1 RXD0
bit 65 I 1 RXD2
bit 64 I 1 WAKEUP
bit 63 I 1 RESETOUT
bit 62 I 1 DRAK0
bit 61 I 1 DRAK1
bit 60 I 1 DREQ0
bit 59 I 1 DREQ1
bit 58 I 1 RXD1
bit 57 I 1 CTS2
bit 56 I 1 MCS7
bit 55 I 1 MCS6
bit 54 I 1 MCS5
bit 53 I 1 MCS4
bit 52 I 1 MCS3
bit 51 I 1 MCS2
bit 50 I 1 MCS1
bit 49 I 1 MCS0
bit 48 I 1 MD3
bit 47 I 1 MD4
bit 46 I 1 MD5
bit 45 O 1 STATUS0 22 1 Z
bit 44 O 1 STATUS1 21 1 Z
bit 43 O 1 TCLK 20 1 Z
bit 42 O 1 IRQOUT 19 1 Z
bit 41 O 1 TXD0 18 1 Z
bit 40 O 1 SCK0 17 1 Z
bit 39 O 1 TXD1 16 1 Z
bit 38 O 1 SCK1 15 1 Z
bit 37 O 1 TXD2 14 1 Z
bit 36 O 1 SCK2 13 1 Z
bit 35 O 1 RTS2 12 1 Z
bit 34 O 1 MCS7 11 1 Z
bit 33 O 1 MCS6 10 1 Z
bit 32 O 1 MCS5 9 1 Z
bit 31 O 1 MCS4 8 1 Z
bit 30 O 1 WAKEUP 7 1 Z
bit 29 O 1 RESETOUT 6 1 Z
bit 28 O 1 MCS3 5 1 Z
bit 27 O 1 MCS2 4 1 Z
bit 26 O 1 MCS1 3 1 Z
bit 25 O 1 MCS0 2 1 Z
bit 24 O 1 DRAK0 1 1 Z
bit 23 O 1 DRAK1 0 1 Z
bit 22 C 1 *
bit 21 C 1 *
bit 20 C 1 *
bit 19 C 1 *
bit 18 C 1 *
bit 17 C 1 *
bit 16 C 1 *
bit 15 C 1 *
bit 14 C 1 *
bit 13 C 1 *
bit 12 C 1 *
bit 11 C 1 *
bit 10 C 1 *
bit 9 C 1 *
bit 8 C 1 *
bit 7 C 1 *
bit 6 C 1 *
bit 5 C 1 *
bit 4 C 1 *
bit 3 C 1 *
bit 2 C 1 *
bit 1 C 1 *
bit 0 C 1 *
initbus sh7727

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