From 456d59736d544d315535c6d9425b448d544a4f10 Mon Sep 17 00:00:00 2001 From: Marcel Telka Date: Thu, 27 Jun 2002 12:06:34 +0000 Subject: [PATCH] Added MCP Registers. git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@24 b68d4a1b-bc3d-0410-92ed-d4ac073336b7 --- include/arm/sa11x0/mcp.h | 63 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 include/arm/sa11x0/mcp.h diff --git a/include/arm/sa11x0/mcp.h b/include/arm/sa11x0/mcp.h new file mode 100644 index 00000000..bd1ba864 --- /dev/null +++ b/include/arm/sa11x0/mcp.h @@ -0,0 +1,63 @@ +/* + * $Id$ + * + * StrongARM SA-1110 MCP Registers + * Copyright (C) 2002 ETC s.r.o. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + * 02111-1307, USA. + * + * Written by Marcel Telka , 2002. + * + * Documentation: + * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor + * Developer's Manual", October 2001, Order Number: 278240-004 + * [2] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor + * Specification Update", December 2001, Order Number: 278259-023 + * + */ + +#ifndef SA11X0_MCP_H +#define SA11X0_MCP_H + +#ifndef uint32_t +typedef unsigned int uint32_t; +#endif + +/* MCP Registers (Serial Port 4) */ + +#define MCP_BASE 0x80060000 + +typedef volatile struct MCP_registers { + uint32_t mccr0; + uint32_t __reserved1; + uint32_t mcdr0; + uint32_t mcdr1; + uint32_t mcdr2; + uint32_t __reserved2; + uint32_t mcsr; +} MCP_registers; + +#ifndef MCP_pointer +#define MCP_pointer ((MCP_registers*) MCP_BASE) +#endif + +#define MCCR0 MCP_pointer->mccr0 +#define MCDR0 MCP_pointer->mcdr0 +#define MCDR1 MCP_pointer->mcdr1 +#define MCDR2 MCP_pointer->mcdr2 +#define MCSR MCP_pointer->mcsr + +#endif /* SA11X0_MCP_H */