From 49cbd1c17f2618d6e3bc3c7df6242e3a502379f3 Mon Sep 17 00:00:00 2001 From: Marcel Telka Date: Sat, 9 Nov 2002 23:38:40 +0000 Subject: [PATCH] 2002-11-09 Marcel Telka * arm/pxa2x0/dma.h: Added DINT register bits. git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@269 b68d4a1b-bc3d-0410-92ed-d4ac073336b7 --- include/ChangeLog | 4 ++++ include/NEWS | 5 +++++ include/arm/pxa2x0/dma.h | 20 ++++++++++++++++++++ 3 files changed, 29 insertions(+) diff --git a/include/ChangeLog b/include/ChangeLog index a57ba22f..2ac48aaa 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2002-11-09 Marcel Telka + + * arm/pxa2x0/dma.h: Added DINT register bits. + 2002-11-09 Marcel Telka * COPYING: Added BSD license file. diff --git a/include/NEWS b/include/NEWS index 5ff9aebe..9ae95c69 100644 --- a/include/NEWS +++ b/include/NEWS @@ -1,3 +1,8 @@ +Changes in include since version 0.2: + + * Changes in PXA2X0 support: + - added DINT register bits + include-0.2 (2002-11-08): * Changes in PXA2x0 support: diff --git a/include/arm/pxa2x0/dma.h b/include/arm/pxa2x0/dma.h index dcd35939..16da4fad 100644 --- a/include/arm/pxa2x0/dma.h +++ b/include/arm/pxa2x0/dma.h @@ -101,6 +101,26 @@ typedef volatile struct DMA_registers { #define DCSR_STARTINTR bit(1) #define DSCR_BUSERRINTR bit(0) +/* DINT bits - see Table 5-6 in [1], Table 5-6 in [2] */ + +#define DINT_CHLINTR(x) bit(x) +#define DINT_CHLINTR0 DINT_CHLINTR(0) +#define DINT_CHLINTR1 DINT_CHLINTR(1) +#define DINT_CHLINTR2 DINT_CHLINTR(2) +#define DINT_CHLINTR3 DINT_CHLINTR(3) +#define DINT_CHLINTR4 DINT_CHLINTR(4) +#define DINT_CHLINTR5 DINT_CHLINTR(5) +#define DINT_CHLINTR6 DINT_CHLINTR(6) +#define DINT_CHLINTR7 DINT_CHLINTR(7) +#define DINT_CHLINTR8 DINT_CHLINTR(8) +#define DINT_CHLINTR9 DINT_CHLINTR(9) +#define DINT_CHLINTR10 DINT_CHLINTR(10) +#define DINT_CHLINTR11 DINT_CHLINTR(11) +#define DINT_CHLINTR12 DINT_CHLINTR(12) +#define DINT_CHLINTR13 DINT_CHLINTR(13) +#define DINT_CHLINTR14 DINT_CHLINTR(14) +#define DINT_CHLINTR15 DINT_CHLINTR(15) + /* DRCMRx bits - see Table 5-8 in [1], Table 5-8 in [2] */ #define DRCMR_MAPVLD bit(7)