From 4ce5e7009c5ec526cc6b53fcfb464a89ee55225f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Arnim=20L=C3=A4uger?= Date: Mon, 30 Mar 2009 15:52:09 +0000 Subject: [PATCH] multi-byte description git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1473 b68d4a1b-bc3d-0410-92ed-d4ac073336b7 --- jtag/ChangeLog | 2 ++ jtag/doc/UrJTAG.txt | 12 ++++++++++++ 2 files changed, 14 insertions(+) diff --git a/jtag/ChangeLog b/jtag/ChangeLog index cbf9e1cb..97c7ddce 100644 --- a/jtag/ChangeLog +++ b/jtag/ChangeLog @@ -1,5 +1,7 @@ 2009-03-30 Arnim Laeuger + * UrJTAG.txt: multi-byte description + * configure.ac: better description for flash-multi-byte 2009-03-29 Arnim Laeuger diff --git a/jtag/doc/UrJTAG.txt b/jtag/doc/UrJTAG.txt index 8c879fae..a9b4cfa9 100644 --- a/jtag/doc/UrJTAG.txt +++ b/jtag/doc/UrJTAG.txt @@ -290,6 +290,18 @@ be untested combinations of chip type, bus width, ... * AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D) * AMD Am29xx040B (Am29F040B, Am29LV040B) +UrJTAG uses the multi-byte write mode if supported by the particular flash +device. The flash code will automatically switch to this algorithm if the +Device Geometry Definition reports that more than one memory location can be +written in a single step (refer to CFI details shown by 'detectflash'). Since +multiple locations are written in a burst-like manner with only one polling +sequence afterwards, the overall flashing performance increases by factor of +5-17. + +In case you encounter any issues with the multi-byte write mode, run configure +with the '--disable-flash-multi-byte' option and re-compile to disable this +algorithm. + //------------------------------------------------------------------------ === Compilation and installation ===