From 58364a7d9fec7dbcbe8134491c275d85ed60b7df Mon Sep 17 00:00:00 2001 From: Marcel Telka Date: Wed, 10 Jul 2002 15:22:41 +0000 Subject: [PATCH] Normalized (included stdint.h, added offsets and bits, etc). git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@55 b68d4a1b-bc3d-0410-92ed-d4ac073336b7 --- include/arm/sa11x0/gpclk.h | 2 +- include/arm/sa11x0/gpio.h | 4 +- include/arm/sa11x0/hssp.h | 6 ++- include/arm/sa11x0/ic.h | 6 ++- include/arm/sa11x0/lcd.h | 22 ++++++++-- include/arm/sa11x0/mc.h | 6 ++- include/arm/sa11x0/mcp.h | 18 ++++++-- include/arm/sa11x0/ost.h | 21 +++++++-- include/arm/sa11x0/pm.h | 5 ++- include/arm/sa11x0/ppc.h | 20 +++++++-- include/arm/sa11x0/rc.h | 16 +++++-- include/arm/sa11x0/rtc.h | 24 ++++++++-- include/arm/sa11x0/ssp.h | 45 +++++++++++++++++-- include/arm/sa11x0/uart.h | 6 +-- include/arm/sa11x0/udc.h | 90 ++++++++++++++++++++++---------------- 15 files changed, 214 insertions(+), 77 deletions(-) diff --git a/include/arm/sa11x0/gpclk.h b/include/arm/sa11x0/gpclk.h index 8e527958..9e53652a 100644 --- a/include/arm/sa11x0/gpclk.h +++ b/include/arm/sa11x0/gpclk.h @@ -51,7 +51,7 @@ typedef volatile struct GPCLK_registers { uint32_t gpclkr3; } GPCLK_registers; -#ifndef GPCLK_pointer +#ifdef SA11X0_UNMAPPED #define GPCLK_pointer ((GPCLK_registers*) GPCLK_BASE) #endif diff --git a/include/arm/sa11x0/gpio.h b/include/arm/sa11x0/gpio.h index 8d057ff5..b61fa4a9 100644 --- a/include/arm/sa11x0/gpio.h +++ b/include/arm/sa11x0/gpio.h @@ -54,7 +54,7 @@ typedef volatile struct GPIO_registers { uint32_t gafr; } GPIO_registers; -#ifndef GPIO_pointer +#ifdef SA11X0_UNMAPPED #define GPIO_pointer ((GPIO_registers*) GPIO_BASE) #endif @@ -77,4 +77,4 @@ typedef volatile struct GPIO_registers { #define GEDR_OFFSET 0x18 #define GAFR_OFFSET 0x1C -#endif /* SA11X0_GPIO_H */ +#endif /* SA11X0_GPIO_H */ diff --git a/include/arm/sa11x0/hssp.h b/include/arm/sa11x0/hssp.h index 1a8c07ba..7be72ca3 100644 --- a/include/arm/sa11x0/hssp.h +++ b/include/arm/sa11x0/hssp.h @@ -34,6 +34,10 @@ #include +#if LANGUAGE == C +#include +#endif + /* ICP - HSSP Registers (Serial Port 2) */ #define HSSP_BASE 0x80040060 @@ -49,7 +53,7 @@ typedef volatile struct HSSP_registers { uint32_t hssr1; } HSSP_registers; -#ifndef HSSP_pointer +#ifdef SA11X0_UNMAPPED #define HSSP_pointer ((HSSP_registers*) HSSP_BASE) #endif diff --git a/include/arm/sa11x0/ic.h b/include/arm/sa11x0/ic.h index e3c771a5..da49895c 100644 --- a/include/arm/sa11x0/ic.h +++ b/include/arm/sa11x0/ic.h @@ -34,6 +34,10 @@ #include +#if LANGUAGE == C +#include +#endif + /* Interrupt Controller Registers */ #define IC_BASE 0x90050000 @@ -49,7 +53,7 @@ typedef volatile struct IC_registers { uint32_t icpr; } IC_registers; -#ifndef IC_pointer +#ifdef SA11X0_UNMAPPED #define IC_pointer ((IC_registers*) IC_BASE) #endif diff --git a/include/arm/sa11x0/lcd.h b/include/arm/sa11x0/lcd.h index b7e0ee1a..995e579e 100644 --- a/include/arm/sa11x0/lcd.h +++ b/include/arm/sa11x0/lcd.h @@ -32,14 +32,17 @@ #ifndef SA11X0_LCD_H #define SA11X0_LCD_H -#ifndef uint32_t -typedef unsigned int uint32_t; +#include + +#if LANGUAGE == C +#include #endif /* LCD Controller Registers */ #define LCD_BASE 0xB0100000 +#if LANGUAGE == C typedef volatile struct LCD_registers { uint32_t lccr0; uint32_t lcsr; @@ -53,7 +56,7 @@ typedef volatile struct LCD_registers { uint32_t lccr3; } LCD_registers; -#ifndef LCD_pointer +#ifdef SA11X0_UNMAPPED #define LCD_pointer ((LCD_registers*) LCD_BASE) #endif @@ -66,5 +69,16 @@ typedef volatile struct LCD_registers { #define LCCR1 LCD_pointer->lccr1 #define LCCR2 LCD_pointer->lccr2 #define LCCR3 LCD_pointer->lccr3 +#endif /* LANGUAGE == C */ + +#define LCCR0_OFFSET 0x00 +#define LCSR_OFFSET 0x04 +#define DBAR1_OFFSET 0x10 +#define DCAR1_OFFSET 0x14 +#define DBAR2_OFFSET 0x18 +#define DCAR2_OFFSET 0x1C +#define LCCR1_OFFSET 0x20 +#define LCCR2_OFFSET 0x24 +#define LCCR3_OFFSET 0x28 -#endif /* SA11X0_LCD_H */ +#endif /* SA11X0_LCD_H */ diff --git a/include/arm/sa11x0/mc.h b/include/arm/sa11x0/mc.h index 2d3dd538..0f4d7b3d 100644 --- a/include/arm/sa11x0/mc.h +++ b/include/arm/sa11x0/mc.h @@ -34,6 +34,10 @@ #include +#if LANGUAGE == C +#include +#endif + /* Memory Controller Registers */ #define MC_BASE 0xA0000000 @@ -55,7 +59,7 @@ typedef volatile struct MC_registers { uint32_t smcnfg; } MC_registers; -#ifndef MC_pointer +#ifdef SA11X0_UNMAPPED #define MC_pointer ((MC_registers*) MC_BASE) #endif diff --git a/include/arm/sa11x0/mcp.h b/include/arm/sa11x0/mcp.h index bd1ba864..7e159d13 100644 --- a/include/arm/sa11x0/mcp.h +++ b/include/arm/sa11x0/mcp.h @@ -32,14 +32,17 @@ #ifndef SA11X0_MCP_H #define SA11X0_MCP_H -#ifndef uint32_t -typedef unsigned int uint32_t; +#include + +#if LANGUAGE == C +#include #endif /* MCP Registers (Serial Port 4) */ #define MCP_BASE 0x80060000 +#if LANGUAGE == C typedef volatile struct MCP_registers { uint32_t mccr0; uint32_t __reserved1; @@ -50,7 +53,7 @@ typedef volatile struct MCP_registers { uint32_t mcsr; } MCP_registers; -#ifndef MCP_pointer +#ifdef SA11X0_UNMAPPED #define MCP_pointer ((MCP_registers*) MCP_BASE) #endif @@ -59,5 +62,12 @@ typedef volatile struct MCP_registers { #define MCDR1 MCP_pointer->mcdr1 #define MCDR2 MCP_pointer->mcdr2 #define MCSR MCP_pointer->mcsr +#endif /* LANGUAGE == C */ + +#define MCCR0_OFFSET 0x00 +#define MCDR0_OFFSET 0x08 +#define MCDR1_OFFSET 0x0C +#define MCDR2_OFFSET 0x10 +#define MCSR_OFFSET 0x18 -#endif /* SA11X0_MCP_H */ +#endif /* SA11X0_MCP_H */ diff --git a/include/arm/sa11x0/ost.h b/include/arm/sa11x0/ost.h index 5041cf05..cef00f2e 100644 --- a/include/arm/sa11x0/ost.h +++ b/include/arm/sa11x0/ost.h @@ -32,14 +32,17 @@ #ifndef SA11X0_OST_H #define SA11X0_OST_H -#ifndef uint32_t -typedef unsigned int uint32_t; +#include + +#if LANGUAGE == C +#include #endif /* OS Timer Registers */ #define OST_BASE 0x90000000 +#if LANGUAGE == C typedef volatile struct OST_registers { uint32_t osmr[4]; uint32_t oscr; @@ -48,7 +51,7 @@ typedef volatile struct OST_registers { uint32_t oier; } OST_registers; -#ifndef OST_pointer +#ifdef SA11X0_UNMAPPED #define OST_pointer ((OST_registers*) OST_BASE) #endif @@ -57,5 +60,15 @@ typedef volatile struct OST_registers { #define OSSR OST_pointer->ossr #define OWER OST_pointer->ower #define OIER OST_pointer->oier +#endif /* LANGUAGE == C */ + +#define OSMR0_OFFSET 0x00 +#define OSMR1_OFFSET 0x04 +#define OSMR2_OFFSET 0x08 +#define OSMR3_OFFSET 0x0C +#define OSCR_OFFSET 0x10 +#define OSSR_OFFSET 0x14 +#define OWER_OFFSET 0x18 +#define OIER_OFFSET 0x1C -#endif /* SA11X0_OST_H */ +#endif /* SA11X0_OST_H */ diff --git a/include/arm/sa11x0/pm.h b/include/arm/sa11x0/pm.h index 8531f9fe..0f7c33f3 100644 --- a/include/arm/sa11x0/pm.h +++ b/include/arm/sa11x0/pm.h @@ -33,7 +33,10 @@ #define SA11X0_PM_H #include + +#if LANGUAGE == C #include +#endif /* Power Manager Registers */ @@ -51,7 +54,7 @@ typedef volatile struct PM_registers { uint32_t posr; } PM_registers; -#ifndef PM_pointer +#ifdef SA11X0_UNMAPPED #define PM_pointer ((PM_registers*) PM_BASE) #endif diff --git a/include/arm/sa11x0/ppc.h b/include/arm/sa11x0/ppc.h index c18a3308..5316bb47 100644 --- a/include/arm/sa11x0/ppc.h +++ b/include/arm/sa11x0/ppc.h @@ -32,14 +32,17 @@ #ifndef SA11X0_PPC_H #define SA11X0_PPC_H -#ifndef uint32_t -typedef unsigned int uint32_t; +#include + +#if LANGUAGE == C +#include #endif /* PPC Registers */ #define PPC_BASE 0x90060000 +#if LANGUAGE == C typedef volatile struct PPC_registers { uint32_t ppdr; uint32_t ppsr; @@ -52,7 +55,7 @@ typedef volatile struct PPC_registers { uint32_t mccr1; } PPC_registers; -#ifndef PPC_pointer +#ifdef SA11X0_UNMAPPED #define PPC_pointer ((PPC_registers*) PPC_BASE) #endif @@ -63,5 +66,14 @@ typedef volatile struct PPC_registers { #define PPFR PPC_pointer->ppfr #define HSCR2 PPC_pointer->hscr2 #define MCCR1 PPC_pointer->mccr1 +#endif /* LANGUAGE == C */ + +#define PPDR_OFFSET 0x00 +#define PPSR_OFFSET 0x04 +#define PPAR_OFFSET 0x08 +#define PSDR_OFFSET 0x0C +#define PPFR_OFFSET 0x10 +#define HSCR2_OFFSET 0x28 +#define MCCR1_OFFSET 0x30 -#endif /* SA11X0_PPC_H */ +#endif /* SA11X0_PPC_H */ diff --git a/include/arm/sa11x0/rc.h b/include/arm/sa11x0/rc.h index 96c84243..7a95928d 100644 --- a/include/arm/sa11x0/rc.h +++ b/include/arm/sa11x0/rc.h @@ -32,26 +32,34 @@ #ifndef SA11X0_RC_H #define SA11X0_RC_H -#ifndef uint32_t -typedef unsigned int uint32_t; +#include + +#if LANGUAGE == C +#include #endif /* Reset Controller Registers */ #define RC_BASE 0x90030000 +#if LANGUAGE == C typedef volatile struct RC_registers { uint32_t rsrr; uint32_t rcsr; uint32_t tucr; } RC_registers; -#ifndef RC_pointer +#ifdef SA11X0_UNMAPPED #define RC_pointer ((RC_registers*) RC_BASE) #endif #define RSRR RC_pointer->rsrr #define RCSR RC_pointer->rcsr #define TUCR RC_pointer->tucr +#endif /* LANGUAGE == C */ + +#define RSRR_OFFSET 0x00 +#define RCSR_OFFSET 0x04 +#define TUCR_OFFSET 0x08 -#endif /* SA11X0_RC_H */ +#endif /* SA11X0_RC_H */ diff --git a/include/arm/sa11x0/rtc.h b/include/arm/sa11x0/rtc.h index 7a6a5e6f..bb475b87 100644 --- a/include/arm/sa11x0/rtc.h +++ b/include/arm/sa11x0/rtc.h @@ -32,14 +32,17 @@ #ifndef SA11X0_RTC_H #define SA11X0_RTC_H -#ifndef uint32_t -typedef unsigned int uint32_t; +#include + +#if LANGUAGE == C +#include #endif /* Real-Time Clock Registers */ #define RTC_BASE 0x90010000 +#if LANGUAGE == C typedef volatile struct RTC_registers { uint32_t rtar; uint32_t rcnr; @@ -48,7 +51,7 @@ typedef volatile struct RTC_registers { uint32_t rtsr; } RTC_registers; -#ifndef RTC_pointer +#ifdef SA11X0_UNMAPPED #define RTC_pointer ((RTC_registers*) RTC_BASE) #endif @@ -56,5 +59,18 @@ typedef volatile struct RTC_registers { #define RCNT RTC_pointer->rcnr #define RTTR RTC_pointer->rttr #define RTSR RTC_pointer->rtsr +#endif /* LANGUAGE == C */ + +#define RTAR_OFFSET 0x00 +#define RCNR_OFFSET 0x04 +#define RTTR_OFFSET 0x08 +#define RTSR_OFFSET 0x10 + +/* RTSR bits */ + +#define RTSR_HZE bit(3) +#define RTSR_ALE bit(2) +#define RTSR_HZ bit(1) +#define RTSR_AL bit(0) -#endif /* SA11X0_RTC_H */ +#endif /* SA11X0_RTC_H */ diff --git a/include/arm/sa11x0/ssp.h b/include/arm/sa11x0/ssp.h index 306834c6..ce575842 100644 --- a/include/arm/sa11x0/ssp.h +++ b/include/arm/sa11x0/ssp.h @@ -32,14 +32,17 @@ #ifndef SA11X0_SSP_H #define SA11X0_SSP_H -#ifndef uint32_t -typedef unsigned int uint32_t; +#include + +#if LANGUAGE == C +#include #endif /* SSP Registers (Serial Port 4) */ #define SSP_BASE 0x80070060 +#if LANGUAGE == C typedef volatile struct SSP_registers { uint32_t sscr0; uint32_t sscr1; @@ -49,7 +52,7 @@ typedef volatile struct SSP_registers { uint32_t sssr; } SSP_registers; -#ifndef SSP_pointer +#ifdef SA11X0_UNMAPPED #define SSP_pointer ((SSP_registers*) SSP_BASE) #endif @@ -57,5 +60,39 @@ typedef volatile struct SSP_registers { #define SSCR1 SSP_pointer->sscr1 #define SSDR SSP_pointer->ssdr #define SSSR SSP_pointer->sssr +#endif /* LANGUAGE == C */ + +#define SSCR0_OFFSET 0x00 +#define SSCR1_OFFSET 0x04 +#define SSDR_OFFSET 0x0C +#define SSSR_OFFSET 0x14 + +/* SSCR0 bits */ + +#define SSCR0_SCR_MASK 0xFF00 +#define SSCR0_SCR(x) ((x << 8) & SSCR0_SCR_MASK) +#define SSCR0_SSE bit(7) +#define SSCR0_FRF_MASK 0x0030 +#define SSCR0_FRF(x) ((x << 4) & SSCR0_FRF_MASK) +#define SSCR0_DSS_MASK 0x000F +#define SSCR0_DSS(x) (x & SSCR0_DSS_MASK) + +/* SSCR1 bits */ + +#define SSCR1_ECS bit(5) +#define SSCR1_SPH bit(4) +#define SSCR1_SPO bit(3) +#define SSCR1_LBM bit(2) +#define SSCR1_TIE bit(1) +#define SSCR1_RIE bit(0) + +/* SSSR bits */ + +#define SSSR_ROR bit(6) +#define SSSR_RFS bit(5) +#define SSSR_TFS bit(4) +#define SSSR_BSY bit(3) +#define SSSR_RNE bit(2) +#define SSSR_TNF bit(1) -#endif /* SA11X0_SSP_H */ +#endif /* SA11X0_SSP_H */ diff --git a/include/arm/sa11x0/uart.h b/include/arm/sa11x0/uart.h index 278c0e6c..d001c9c7 100644 --- a/include/arm/sa11x0/uart.h +++ b/include/arm/sa11x0/uart.h @@ -57,13 +57,9 @@ typedef volatile struct UART_registers { uint32_t utsr1; } UART_registers; -#ifndef UART1_pointer +#ifdef SA11X0_UNMAPPED #define UART1_pointer ((UART_registers*) UART1_BASE) -#endif -#ifndef UART2_pointer #define UART2_pointer ((UART_registers*) UART2_BASE) -#endif -#ifndef UART3_pointer #define UART3_pointer ((UART_registers*) UART3_BASE) #endif diff --git a/include/arm/sa11x0/udc.h b/include/arm/sa11x0/udc.h index ef46ae54..39dbb629 100644 --- a/include/arm/sa11x0/udc.h +++ b/include/arm/sa11x0/udc.h @@ -32,14 +32,17 @@ #ifndef SA11X0_UDC_H #define SA11X0_UDC_H -#ifndef uint32_t -typedef unsigned int uint32_t; +#include + +#if LANGUAGE == C +#include #endif /* UDC Registers (Serial Port 0) */ #define UDC_BASE 0x80000000 +#if LANGUAGE == C typedef volatile struct UDC_registers { uint32_t udccr; uint32_t udcar; @@ -56,7 +59,7 @@ typedef volatile struct UDC_registers { uint32_t udcsr; } UDC_registers; -#ifndef UDC_pointer +#ifdef SA11X0_UNMAPPED #define UDC_pointer ((UDC_registers*) UDC_BASE) #endif @@ -71,53 +74,66 @@ typedef volatile struct UDC_registers { #define UDCWC UDC_pointer->udcwc #define UDCDR UDC_pointer->udcdr #define UDCSR UDC_pointer->udcsr +#endif /* LANGUAGE == C */ + +#define UDCCR_OFFSET 0x00 +#define UDCAR_OFFSET 0x04 +#define UDCOMP_OFFSET 0x08 +#define UDCIMP_OFFSET 0x0C +#define UDCCS0_OFFSET 0x10 +#define UDCCS1_OFFSET 0x14 +#define UDCCS2_OFFSET 0x18 +#define UDCD0_OFFSET 0x1C +#define UDCWC_OFFSET 0x20 +#define UDCDR_OFFSET 0x28 +#define UDCSR_OFFSET 0x30 /* UDCCR bits */ -#define UDCCR_SUSIM 0x40 -#define UDCCR_TIM 0x20 -#define UDCCR_RIM 0x10 -#define UDCCR_EIM 0x08 -#define UDCCR_RESIM 0x04 -#define UDCCR_UDA 0x02 -#define UDCCR_UDD 0x01 +#define UDCCR_SUSIM bit(6) +#define UDCCR_TIM bit(5) +#define UDCCR_RIM bit(4) +#define UDCCR_EIM bit(3) +#define UDCCR_RESIM bit(2) +#define UDCCR_UDA bit(1) +#define UDCCR_UDD bit(0) /* UDCCS0 bits */ -#define UDCCS0_SSE 0x80 -#define UDCCS0_SO 0x40 -#define UDCCS0_SE 0x20 -#define UDCCS0_DE 0x10 -#define UDCCS0_FST 0x08 -#define UDCCS0_SST 0x04 -#define UDCCS0_IPR 0x02 -#define UDCCS0_OPR 0x01 +#define UDCCS0_SSE bit(7) +#define UDCCS0_SO bit(6) +#define UDCCS0_SE bit(5) +#define UDCCS0_DE bit(4) +#define UDCCS0_FST bit(3) +#define UDCCS0_SST bit(2) +#define UDCCS0_IPR bit(1) +#define UDCCS0_OPR bit(0) /* UDCCS1 bits */ -#define UDCCS1_RNE 0x20 -#define UDCCS1_FST 0x10 -#define UDCCS1_SST 0x08 -#define UDCCS1_RPE 0x04 -#define UDCCS1_RPC 0x02 -#define UDCCS1_RFS 0x01 +#define UDCCS1_RNE bit(5) +#define UDCCS1_FST bit(4) +#define UDCCS1_SST bit(3) +#define UDCCS1_RPE bit(2) +#define UDCCS1_RPC bit(1) +#define UDCCS1_RFS bit(0) /* UDCCS2 bits */ -#define UDCCS2_FST 0x20 -#define UDCCS2_SST 0x10 -#define UDCCS2_TUR 0x08 -#define UDCCS2_TPE 0x04 -#define UDCCS2_TPC 0x02 -#define UDCCS2_TFS 0x01 +#define UDCCS2_FST bit(5) +#define UDCCS2_SST bit(4) +#define UDCCS2_TUR bit(3) +#define UDCCS2_TPE bit(2) +#define UDCCS2_TPC bit(1) +#define UDCCS2_TFS bit(0) /* UDCSR bits */ -#define UDCSR_RSTIR 0x20 -#define UDCSR_RESIR 0x10 -#define UDCSR_SUSIR 0x08 -#define UDCSR_TIR 0x04 -#define UDCSR_RIR 0x02 -#define UDCSR_EIR 0x01 +#define UDCSR_RSTIR bit(5) +#define UDCSR_RESIR bit(4) +#define UDCSR_SUSIR bit(3) +#define UDCSR_TIR bit(2) +#define UDCSR_RIR bit(1) +#define UDCSR_EIR bit(0) -#endif /* SA11X0_UDC_H */ +#endif /* SA11X0_UDC_H */