diff --git a/urjtag/ChangeLog b/urjtag/ChangeLog index 3c7e8870..69026be7 100644 --- a/urjtag/ChangeLog +++ b/urjtag/ChangeLog @@ -1,3 +1,7 @@ +2010-05-19 Arnim Laeuger + + * src/flash/amd.c, doc/UrJTAG.txt: [ 2996919 ] Support for MX29LV320C + 2010-05-05 Mike Frysinger * src/cmd/cmd_debug.c (string_to_log_level): Tweak the -1 sanity check to diff --git a/urjtag/doc/UrJTAG.txt b/urjtag/doc/UrJTAG.txt index d920d03d..fa9f3989 100644 --- a/urjtag/doc/UrJTAG.txt +++ b/urjtag/doc/UrJTAG.txt @@ -303,6 +303,7 @@ be untested combinations of chip type, bus width, ... * Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18) * AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D) * AMD Am29xx040B (Am29F040B, Am29LV040B) + * Macronix MX29LV160, MX29LV320, MX29LV640 UrJTAG uses the multi-byte write mode if supported by the particular flash device. The flash code will automatically switch to this algorithm if the diff --git a/urjtag/src/flash/amd.c b/urjtag/src/flash/amd.c index 2d5df79f..40e162da 100644 --- a/urjtag/src/flash/amd.c +++ b/urjtag/src/flash/amd.c @@ -389,6 +389,12 @@ amd_flash_print_info (urj_log_level_t ll, urj_flash_cfi_array_t *cfi_array) case 0x2249: urj_log (ll, "MX29LV160B"); break; + case 0x22a7: + urj_log (ll, "MX29LV320CT"); + break; + case 0x22a8: + urj_log (ll, "MX29LV320CB"); + break; case 0x22CB: urj_log (ll, "MX29LV640B"); break;