From 643a0d7a016fed0606ce601cfaf546f8159d4596 Mon Sep 17 00:00:00 2001
From: Marcel Telka <marcel@telka.sk>
Date: Thu, 10 Oct 2002 19:27:27 +0000
Subject: [PATCH] Added register offsets and bits.

git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@153 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
---
 include/arm/pxa2x0/i2c.h | 66 +++++++++++++++++++++++++++++++++++++---
 1 file changed, 62 insertions(+), 4 deletions(-)

diff --git a/include/arm/pxa2x0/i2c.h b/include/arm/pxa2x0/i2c.h
index 697ffe28..f3af0fcb 100644
--- a/include/arm/pxa2x0/i2c.h
+++ b/include/arm/pxa2x0/i2c.h
@@ -39,14 +39,17 @@
 #ifndef	PXA2X0_I2C_H
 #define	PXA2X0_I2C_H
 
-#ifndef uint32_t
-typedef	unsigned int	uint32_t;
+#include <common.h>
+
+#if LANGUAGE == C
+#include <stdint.h>
 #endif
 
 /* I2C Registers */
 
 #define	I2C_BASE	0x40300000
 
+#if LANGUAGE == C
 typedef volatile struct I2C_registers {
 	uint32_t __reserved1[1440];
 	uint32_t ibmr;
@@ -60,7 +63,7 @@ typedef volatile struct I2C_registers {
 	uint32_t isar;
 } I2C_registers;
 
-#ifndef I2C_pointer
+#ifdef PXA250_UNMAPPED
 #define	I2C_pointer	((I2C_registers*) I2C_BASE)
 #endif
 
@@ -69,5 +72,60 @@ typedef volatile struct I2C_registers {
 #define	ICR		I2C_pointer->icr
 #define	ISR		I2C_pointer->isr
 #define	ISAR		I2C_pointer->isar
+#endif /* LANGUAGE == C */
+
+#define	IBMR_OFFSET	0x1680
+#define	IDBR_OFFSET	0x1688
+#define	ICR_OFFSET	0x1690
+#define	ISR_OFFSET	0x1698
+#define	ISAR_OFFSET	0x16A0
+
+/* IBMR bits - see Table 9-9 in [1] */
+
+#define	IBMR_SCLS	bit(1)
+#define	IBMR_SDAS	bit(0)
+
+/* IDBR bits - see Table 9-10 in [1] */
+
+#define	IDBR_IDB_MASK	0xFF
+#define	IDBR_IDB(x)	(x & IDBR_IDB_MASK)
+
+/* ICR bits - see Table 9-11 in [1] */
+
+#define	ICR_FM		bit(15)
+#define	ICR_UR		bit(14)
+#define	ICR_SADIE	bit(13)
+#define	ICR_ALDIE	bit(12)
+#define	ICR_SSDIE	bit(11)
+#define	ICR_BEIE	bit(10)
+#define	ICR_IRFIE	bit(9)
+#define	ICR_ITEIE	bit(8)
+#define	ICR_GCD		bit(7)
+#define	ICR_IUE		bit(6)
+#define	ICR_SCLE	bit(5)
+#define	ICR_MA		bit(4)
+#define	ICR_TB		bit(3)
+#define	ICR_ACKNAK	bit(2)
+#define	ICR_STOP	bit(1)
+#define	ICR_START	bit(0)
+
+/* ISR bits - see Table 9-12 in [1] */
+
+#define	ISR_BED		bit(10)
+#define	ISR_SAD		bit(9)
+#define	ISR_GCAD	bit(8)
+#define	ISR_IRF		bit(7)
+#define	ISR_ITE		bit(6)
+#define	ISR_ALD		bit(5)
+#define	ISR_SSD		bit(4)
+#define	ISR_IBB		bit(3)
+#define	ISR_UB		bit(2)
+#define	ISR_ACKNAK	bit(1)
+#define	ISR_RWM		bit(0)
+
+/* ISAR bits - see Table 9-13 in [1] */
+
+#define	ISAR_ISA_MASK	0x7F
+#define	ISAR_ISA(x)	(x & ISAR_ISA_MASK)
 
-#endif	/* PXA2X0_I2C_H */
+#endif /* PXA2X0_I2C_H */