2003-08-14 Marcel Telka <marcel@telka.sk>
* data/Makefile.am (nobase_dist_pkgdata_DATA): Added samsung/s3c4510b/s3c4510b. * data/samsung/s3c4510b/s3c4510b: New file (Jiun-Shian Ho). git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@513 b68d4a1b-bc3d-0410-92ed-d4ac073336b7master
Marcel Telka
22 years ago
parent
0762fc60d3
commit
6be3b8b652
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#
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# $Id$
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#
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# JTAG declarations for Samsung S3C4510B
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# Copyright (C) 2003 ETC s.r.o.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; either version 2
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# of the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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# 02111-1307, USA.
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#
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# Written by Jiun-Shian Ho <asky@syncom.com.tw>, 2003.
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#
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# Documentation:
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# [1] Samsung Electronics Co., Ltd., "S3C4510B 32-Bit RISC Microcontroller
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# User's Manual", Revision 1, August 2000,
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# Order Number: 21-S3-C4510B-082000
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#
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# see Table A-2 or BSDL file (Page: A-13 ~ A-15) in [1]
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signal nUADTR1 3
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signal UATXD1 4
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signal nUADSR1 5
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signal nDTRA 6
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signal RXDA 7
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signal nRTSA 8
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signal TXDA 9
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signal nCTSA 10
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signal nDCDA 13
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signal RXCA 14
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signal nSYNCA 15
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signal TXCA 16
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signal nDTRB 17
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signal RXDB 18
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signal nRTSB 19
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signal TXDB 20
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signal nCTSB 23
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signal nDCDB 24
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signal RXCB 25
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signal nSYNCB 26
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signal TXCB 27
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signal CRS_CRS_10M 28
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signal RX_DV_LINK10 29
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signal RXD0_RXD_10M 30
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signal RXD1 33
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signal RXD2 34
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signal RXD3 35
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signal RX_ERR 36
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signal RX_CLK_RXCLK_10M 37
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signal COL_COL_10M 38
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signal TXD0_TXD_10M 39
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signal TXD1_LOOP10 40
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signal TXD2 43
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signal TXD3 44
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signal TX_ERR_PCOMP_10M 45
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signal TX_CLK_TXCLK_10M 46
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signal TX_EN_TXEN_10M 47
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signal MDIO 48
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signal LITTLE 49
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signal MDC 50
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signal TCK 58
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signal TMS 59
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signal TDI 60
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signal TDO 61
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signal nTRST 62
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signal TMODE 63
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signal UCLK 64
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signal nECS0 67
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signal nECS1 68
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signal nECS2 69
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signal nECS3 70
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signal nEWAIT 71
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signal nOE 72
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signal B0SIZE0 73
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signal B0SIZE1 74
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signal CLKOEN 76
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signal MCLK 80
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signal nRESET 82
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signal CLKSEL 83 # PCLKSEL vs. CLKSEL ?
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signal nRCS0 75
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signal nRCS1 84
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signal nRCS2 85
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signal nRCS3 86
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signal nRCS4 87
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signal nRCS5 88
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signal nRAS0 89
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signal nRAS1 90
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signal nRAS2 91
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signal nRAS3 94
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signal nCAS0 95
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signal nCAS1 96
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signal nCAS2 97
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signal nCAS3 98
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signal nDWE 99
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signal nWBE0 100
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signal nWBE1 101
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signal nWBE2 102
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signal nWBE3 107
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signal ExtMREQ 108
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signal ExtMACK 109
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signal ADDR0 110
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signal ADDR1 111
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signal ADDR2 112
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signal ADDR3 113
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signal ADDR4 114
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signal ADDR5 115
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signal ADDR6 116
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signal ADDR7 117
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signal ADDR8 120
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signal ADDR9 121
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signal ADDR10 122
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signal ADDR11 123
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signal ADDR12 124
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signal ADDR13 125
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signal ADDR14 126
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signal ADDR15 127
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signal ADDR16 128
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signal ADDR17 129
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signal ADDR18 132
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signal ADDR19 133
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signal ADDR20 134
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signal ADDR21 135
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signal XDATA0 136
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signal XDATA1 137
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signal XDATA2 138
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signal XDATA3 139
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signal XDATA4 140
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signal XDATA5 141
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signal XDATA6 144
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signal XDATA7 145
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signal XDATA8 146
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signal XDATA9 147
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signal XDATA10 148
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signal XDATA11 149
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signal XDATA12 150
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signal XDATA13 151
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signal XDATA14 152
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signal XDATA15 153
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signal XDATA16 154
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signal XDATA17 159
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signal XDATA18 160
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signal XDATA19 161
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signal XDATA20 162
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signal XDATA21 163
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signal XDATA22 164
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signal XDATA23 165
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signal XDATA24 166
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signal XDATA25 169
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signal XDATA26 170
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signal XDATA27 171
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signal XDATA28 172
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signal XDATA29 173
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signal XDATA30 174
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signal XDATA31 175
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signal P0 176
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signal P1 179
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signal P2 180
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signal P3 181
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signal P4 182
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signal P5 183
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signal P6 184
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signal P7 185
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signal P8 186
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signal P9 189
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signal P10 190
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signal P11 191
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signal P12 192
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signal P13 193
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signal P14 194
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signal P15 195
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signal P16 196
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signal P17 199
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signal SCL 200
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signal SDA 201
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signal UARXD0 202
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signal nUADTR0 203
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signal UATXD0 204
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signal nUADSR0 205
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signal UARXD1 206
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signal VDDP 1 21 41 53 78 103 118 142 157 177 197
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signal VDDI 11 31 51 65 92 105 130 155 167 187 207
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signal VSSP 2 22 42 54 79 93 106 131 156 168 188 208
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signal VSSI 12 32 52 66 81 104 119 143 158 178 198
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# mandatory data registers
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register BSR 233 # Boundary Scan Register (see Appendix-A (Page A-16) in [1])
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register BR 1 # Bypass Register
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# optional data registers
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register DIR 32 # Device Identification Register
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# Appendix-A (Page A-16) in [1]
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instruction length 4
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# see Table A-6 in [1]
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# mandatory instructions
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instruction EXTEST 0000 BSR
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instruction SAMPLE/PRELOAD 0011 BSR
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instruction BYPASS 1111 BR
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# optional instructions
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instruction CLAMP 1001 BR
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instruction HIGHZ 0111 BR
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instruction IDCODE 1110 DIR
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# see Table A-2 or BSDL file (Page: A-16 ~ A-23) in [1]
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bit 232 I ? nUADTR1
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bit 231 O ? UATXD1
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bit 230 O ? nUADSR1
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bit 229 O ? nDTRA
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bit 228 I ? RXDA
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bit 227 O ? nRTSA
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bit 226 O ? TXDA
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bit 225 I ? nCTSA
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bit 224 I ? nDCDA
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bit 223 I ? RXCA
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bit 222 O ? nSYNCA
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bit 221 I ? TXCA
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bit 220 O ? TXCA 219 1 Z
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bit 219 C 1 TXCA
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bit 218 O ? nDTRB
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bit 217 I ? RXDB
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bit 216 O ? nRTSB
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bit 215 O ? TXDB
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bit 214 I ? nCTSB
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bit 213 I ? nDCDB
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bit 212 I ? RXCB
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bit 211 O ? nSYNCB
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bit 210 I ? TXCB
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bit 209 O ? TXCB 208 1 Z
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bit 208 C 1 TXCB
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bit 207 I ? CRS_CRS_10M
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bit 206 I ? RX_DV_LINK10
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bit 205 I ? RXD0_RXD_10M
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bit 204 I ? RXD1
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bit 203 I ? RXD2
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bit 202 I ? RXD3
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bit 201 I ? RX_ERR
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bit 200 I ? RX_CLK_RXCLK_10M
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bit 199 I ? COL_COL_10M
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bit 198 O ? TXD0_TXD_10M
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bit 197 O ? TXD1_LOOP10
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bit 196 O ? TXD2
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bit 195 O ? TXD3
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bit 194 O ? TX_ERR_PCOMP_10M
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bit 193 I ? TX_CLK_TXCLK_10M
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bit 192 O ? TX_EN_TXEN_10M
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bit 191 I ? MDIO
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bit 190 O ? MDIO 189 1 Z
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bit 189 C 1 MDIO
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bit 188 I ? LITTLE
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bit 187 O ? MDC
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bit 186 I ? TMODE
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bit 185 I ? UCLK
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bit 184 C 1 .
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bit 183 O ? nECS0 184 1 Z
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bit 182 O ? nECS1 184 1 Z
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bit 181 O ? nECS2 184 1 Z
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bit 180 O ? nECS3 184 1 Z
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bit 179 I ? nEWAIT
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bit 178 O ? nOE 184 1 Z
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bit 177 I ? B0SIZE0
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bit 176 I ? B0SIZE1
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bit 175 O ? nRCS0 184 1 Z
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bit 174 I ? CLKOEN
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bit 173 O ? MCLKO
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bit 172 I ? MCLK
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bit 171 I ? nRESET
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bit 170 I ? CLKSEL
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bit 169 O ? nRCS1 184 1 Z
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bit 168 O ? nRCS2 184 1 Z
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bit 167 O ? nRCS3 184 1 Z
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bit 166 O ? nRCS4 184 1 Z
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bit 165 O ? nRCS5 184 1 Z
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bit 164 O ? nRAS0 184 1 Z
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bit 163 O ? nRAS1 184 1 Z
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bit 162 O ? nRAS2 184 1 Z
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bit 161 O ? nRAS3 184 1 Z
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bit 160 O ? nCAS0 184 1 Z
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bit 159 O ? nCAS1 184 1 Z
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bit 158 O ? nCAS2 184 1 Z
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bit 157 O ? nCAS3 184 1 Z
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bit 156 O ? nDWE 184 1 Z
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bit 155 O ? nWBE0 184 1 Z
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bit 154 O ? nWBE1 184 1 Z
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bit 153 O ? nWBE2 184 1 Z
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bit 152 O ? nWBE3 184 1 Z
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bit 151 I ? ExtMREQ
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bit 150 O ? ExtMACK
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bit 149 O ? ADDR0 184 1 Z
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bit 148 O ? ADDR1 184 1 Z
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bit 147 O ? ADDR2 184 1 Z
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bit 146 O ? ADDR3 184 1 Z
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bit 145 O ? ADDR4 184 1 Z
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bit 144 O ? ADDR5 184 1 Z
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bit 143 O ? ADDR6 184 1 Z
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bit 142 O ? ADDR7 184 1 Z
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bit 141 O ? ADDR8 184 1 Z
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bit 140 O ? ADDR9 184 1 Z
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bit 139 O ? ADDR10 184 1 Z
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bit 138 O ? ADDR11 184 1 Z
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bit 137 O ? ADDR12 184 1 Z
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bit 136 O ? ADDR13 184 1 Z
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bit 135 O ? ADDR14 184 1 Z
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bit 134 O ? ADDR15 184 1 Z
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bit 133 O ? ADDR16 184 1 Z
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bit 132 O ? ADDR17 184 1 Z
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bit 131 O ? ADDR18 184 1 Z
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bit 130 O ? ADDR19 184 1 Z
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bit 129 O ? ADDR20 184 1 Z
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bit 128 O ? ADDR21 184 1 Z
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bit 127 C 1 .
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bit 126 I ? XDATA0
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bit 125 O ? XDATA0 127 1 Z
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bit 124 I ? XDATA1
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bit 123 O ? XDATA1 127 1 Z
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bit 122 I ? XDATA2
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bit 121 O ? XDATA2 127 1 Z
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bit 120 I ? XDATA3
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bit 119 O ? XDATA3 127 1 Z
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bit 118 I ? XDATA4
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bit 117 O ? XDATA4 127 1 Z
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bit 116 I ? XDATA5
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bit 115 O ? XDATA5 127 1 Z
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bit 114 I ? XDATA6
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bit 113 O ? XDATA6 127 1 Z
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bit 112 I ? XDATA7
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bit 111 O ? XDATA7 127 1 Z
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bit 110 I ? XDATA8
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bit 109 O ? XDATA8 127 1 Z
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bit 108 I ? XDATA9
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bit 107 O ? XDATA9 127 1 Z
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bit 106 I ? XDATA10
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bit 105 O ? XDATA10 127 1 Z
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bit 104 I ? XDATA11
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bit 103 O ? XDATA11 127 1 Z
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bit 102 I ? XDATA12
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bit 101 O ? XDATA12 127 1 Z
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bit 100 I ? XDATA13
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bit 99 O ? XDATA13 127 1 Z
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bit 98 I ? XDATA14
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bit 97 O ? XDATA14 127 1 Z
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bit 96 I ? XDATA15
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bit 95 O ? XDATA15 127 1 Z
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bit 94 I ? XDATA16
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bit 93 O ? XDATA16 127 1 Z
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bit 92 I ? XDATA17
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bit 91 O ? XDATA17 127 1 Z
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bit 90 I ? XDATA18
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bit 89 O ? XDATA18 127 1 Z
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bit 88 I ? XDATA19
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bit 87 O ? XDATA19 127 1 Z
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bit 86 I ? XDATA20
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bit 85 O ? XDATA20 127 1 Z
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bit 84 I ? XDATA21
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bit 83 O ? XDATA21 127 1 Z
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bit 82 I ? XDATA22
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bit 81 O ? XDATA22 127 1 Z
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bit 80 I ? XDATA23
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bit 79 O ? XDATA23 127 1 Z
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bit 78 I ? XDATA24
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bit 77 O ? XDATA24 127 1 Z
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bit 76 I ? XDATA25
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bit 75 O ? XDATA25 127 1 Z
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bit 74 I ? XDATA26
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bit 73 O ? XDATA26 127 1 Z
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bit 72 I ? XDATA27
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bit 71 O ? XDATA27 127 1 Z
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bit 70 I ? XDATA28
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bit 69 O ? XDATA28 127 1 Z
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bit 68 I ? XDATA29
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bit 67 O ? XDATA29 127 1 Z
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bit 66 I ? XDATA30
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bit 65 O ? XDATA30 127 1 Z
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bit 64 I ? XDATA31
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bit 63 O ? XDATA31 127 1 Z
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bit 62 I ? P0
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bit 61 O ? P0 60 1 Z
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bit 60 C 1 P0
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bit 59 I ? P1
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bit 58 O ? P1 57 1 Z
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bit 57 C 1 P1
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bit 56 I ? P2
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bit 55 O ? P2 54 1 Z
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bit 54 C 1 P2
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bit 53 I ? P3
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bit 52 O ? P3 51 1 Z
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bit 51 C 1 P3
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bit 50 I ? P4
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bit 49 O ? P4 48 1 Z
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bit 48 C 1 P4
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bit 47 I ? P5
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bit 46 O ? P5 45 1 Z
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bit 45 C 1 P5
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bit 44 I ? P6
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bit 43 O ? P6 42 1 Z
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bit 42 C 1 P6
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bit 41 I ? P7
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bit 40 O ? P7 39 1 Z
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bit 39 C 1 P7
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bit 38 I ? P8
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bit 37 O ? P8 36 1 Z
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bit 36 C 1 P8
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bit 35 I ? P9
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bit 34 O ? P9 33 1 Z
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bit 33 C 1 P9
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bit 32 I ? P10
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bit 31 O ? P10 30 1 Z
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bit 30 C 1 P10
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bit 29 I ? P11
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bit 28 O ? P11 27 1 Z
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bit 27 C 1 P11
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bit 26 I ? P12
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bit 25 O ? P12 24 1 Z
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bit 24 C 1 P12
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bit 23 I ? P13
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bit 22 O ? P13 21 1 Z
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bit 21 C 1 P13
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bit 20 I ? P14
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bit 19 O ? P14 18 1 Z
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bit 18 C 1 P14
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bit 17 I ? P15
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bit 16 O ? P15 15 1 Z
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bit 15 C 1 P15
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bit 14 I ? P16
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bit 13 O ? P16 12 1 Z
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bit 12 C 1 P16
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bit 11 I ? P17
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bit 10 O ? P17 9 1 Z
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bit 9 C 1 P17
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bit 8 I 0 SCL
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bit 7 O 1 SCL 7 1 Z
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bit 6 I ? SDA
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bit 5 O 1 SDA 5 1 Z
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bit 4 I ? UARXD0
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bit 3 I ? nUADTR0
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bit 2 O ? UATXD0
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bit 1 O ? nUADSR0
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bit 0 I ? UARXD1
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