From 6e02ae3a5d8a7a0b4602f52359f04af1c634048e Mon Sep 17 00:00:00 2001
From: Marcel Telka <marcel@telka.sk>
Date: Thu, 27 Jun 2002 13:15:38 +0000
Subject: [PATCH] Added GPIO Registers.

git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@30 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
---
 include/arm/sa11x0/gpio.h | 67 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 include/arm/sa11x0/gpio.h

diff --git a/include/arm/sa11x0/gpio.h b/include/arm/sa11x0/gpio.h
new file mode 100644
index 00000000..92b802a1
--- /dev/null
+++ b/include/arm/sa11x0/gpio.h
@@ -0,0 +1,67 @@
+/*
+ * $Id$
+ *
+ * StrongARM SA-1110 GPIO Registers
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+ *     Developer's Manual", October 2001, Order Number: 278240-004
+ * [2] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+ *     Specification Update", December 2001, Order Number: 278259-023
+ *
+ */
+
+#ifndef	SA11X0_GPIO_H
+#define	SA11X0_GPIO_H
+
+#ifndef uint32_t
+typedef	unsigned int	uint32_t;
+#endif
+
+/* GPIO Registers */
+
+#define	GPIO_BASE	0x90040000
+
+typedef volatile struct GPIO_registers {
+	uint32_t gplr;
+	uint32_t gpdr;
+	uint32_t gpsr;
+	uint32_t gpcr;
+	uint32_t grer;
+	uint32_t gfer;
+	uint32_t gedr;
+	uint32_t gafr;
+} GPIO_registers;
+
+#ifndef GPIO_pointer
+#define	GPIO_pointer	((GPIO_registers*) GPIO_BASE)
+#endif
+
+#define	GPLR		GPIO_pointer->gplr
+#define	GPDR		GPIO_pointer->gpdr
+#define	GPSR		GPIO_pointer->gpsr
+#define	GPCR		GPIO_pointer->gpcr
+#define	GRER		GPIO_pointer->grer
+#define	GFER		GPIO_pointer->gfer
+#define	GEDR		GPIO_pointer->gedr
+#define	GAFR		GPIO_pointer->gafr
+
+#endif	/* SA11X0_GPIO_H */