From 76bed8191033ab65a07bc88e1dbb03efb350c773 Mon Sep 17 00:00:00 2001 From: Marcel Telka Date: Thu, 27 Jun 2002 13:20:19 +0000 Subject: [PATCH] Added Interrupt Controller Registers. git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@31 b68d4a1b-bc3d-0410-92ed-d4ac073336b7 --- include/arm/sa11x0/ic.h | 64 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 include/arm/sa11x0/ic.h diff --git a/include/arm/sa11x0/ic.h b/include/arm/sa11x0/ic.h new file mode 100644 index 00000000..3363173b --- /dev/null +++ b/include/arm/sa11x0/ic.h @@ -0,0 +1,64 @@ +/* + * $Id$ + * + * StrongARM SA-1110 Interrupt Controller Registers + * Copyright (C) 2002 ETC s.r.o. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + * 02111-1307, USA. + * + * Written by Marcel Telka , 2002. + * + * Documentation: + * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor + * Developer's Manual", October 2001, Order Number: 278240-004 + * [2] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor + * Specification Update", December 2001, Order Number: 278259-023 + * + */ + +#ifndef SA11X0_IC_H +#define SA11X0_IC_H + +#ifndef uint32_t +typedef unsigned int uint32_t; +#endif + +/* Interrupt Controller Registers */ + +#define IC_BASE 0x90050000 + +typedef volatile struct IC_registers { + uint32_t icip; + uint32_t icmr; + uint32_t iclr; + uint32_t iccr; + uint32_t icfp; + uint32_t __reserved[3]; + uint32_t icpr; +} IC_registers; + +#ifndef IC_pointer +#define IC_pointer ((IC_registers*) IC_BASE) +#endif + +#define ICIP IC_pointer->icip +#define ICMR IC_pointer->icmr +#define ICLR IC_pointer->iclr +#define ICCR IC_pointer->iccr +#define ICFP IC_pointer->icfp +#define ICPR IC_pointer->icpr + +#endif /* SA11X0_IC_H */