USB to JTAG Interface (experimental) http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html
USB to JTAG Interface (experimental) <ulink url="http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html">http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html</ulink>
@ -2381,6 +2466,39 @@ the respective driver is selected. If both libraries are available, then
FTD2XX is selected. That's simply because FTD2XX showed some performance
advantages over libftdi in the past. You can still force libftdi with the
respective parameter.</P
><DIV
CLASS="warning"
><P
></P
><TABLE
CLASS="warning"
WIDTH="100%"
BORDER="0"
><TR
><TD
WIDTH="25"
ALIGN="CENTER"
VALIGN="TOP"
><IMG
SRC="../images/warning.gif"
HSPACE="5"
ALT="Warning"></TD
><TD
ALIGN="LEFT"
VALIGN="TOP"
><P
>There's one quirk to consider when using FTDI's FTD2XX driver. It
connects to any known FTDI chip, randomly. I.e. if there's more than one FTDI
device connected to the host, chances are that the driver connects to the
wrong USB device. This might be an OEM USB-serial converter and you'll be
banging your head why there's no proper reading from the JTAG chain. Therefore
it's strongly recommended to specify the desc=xxx parameter for the cable
command if the ftd2xx driver is to be used. Set xxx to the product or serial
number descriptor string that are exhibited by the USB device.</P
></TD
></TR
></TABLE
></DIV
></DIV
><DIV
CLASS="section"
@ -2422,7 +2540,9 @@ NAME="_print"
>3.2.3.3. print</A
></H4
><P
>Print a list of parts in the chain and the currently active instruction per part.</P
>Print a list of parts in the chain and the currently active instruction per part.
Further details of bus, signals and instructions can be obtained with dedicated
command options, see "help print".</P
></DIV
><DIV
CLASS="section"
@ -2536,7 +2656,7 @@ CLASS="informaltable"
><P
></P
><A
NAME="AEN602"
NAME="AEN628"
></A
><TABLE
BORDER="0"
@ -2645,7 +2765,7 @@ CLASS="informaltable"
><P
></P
><A
NAME="AEN634"
NAME="AEN660"
></A
><TABLE
BORDER="0"
@ -2720,6 +2840,25 @@ CLASS="emphasis"
CLASS="strong"
><B
CLASS="emphasis"
>pod</B
></SPAN
>
</P
></TD
><TD
> <P
> low level direct access to POD signals like TRST; use with care
</P
>
</TD
></TR
><TR
><TD
><P
> <SPAN
CLASS="strong"
><B
CLASS="emphasis"
>scan</B
></SPAN
>
@ -2793,7 +2932,7 @@ CLASS="informaltable"
><P
></P
><A
NAME="AEN678"
NAME="AEN710"
></A
><TABLE
BORDER="0"
@ -3028,7 +3167,7 @@ CLASS="emphasis"
></SPAN
> at the svf command.</P
><P
>The absence of error or warning messages indicate that the SVF file could be
>The absence of error or warning messages indicate that the SVF file was
executed without problems. To get a progress reporting while the player advances
through the SVF file, specify <SPAN
CLASS="emphasis"
@ -3046,7 +3185,7 @@ CELLPADDING="5"
><DIV
CLASS="sidebar"
><A
NAME="AEN744"
NAME="AEN776"
></A
><P
><B
@ -3152,11 +3291,21 @@ NAME="AEN744"
></LI
></UL
><P
>Operation can be slowed down significantly when the FREQUENCY command has
been specified. This is not a problem of the SVF player itself but seem to
happen when the frequency of UrJTAG is set to a value larger than 0.
Configuration takes very long although the maximum allowed frequency is 10 MHz.
Consider to comment out the FREQUENCY command at the beginning of the SVF file.</P
>SVF files for programming flash-based devices might or might not work for a given
setup. This has been observed for Actel IGLOO devices where success and failure
depends on the actual clocking rate of the chosen cable.</P
><P
>The ref_freq=<…> option to the svf command allows to tweak the calculation
of <SPAN
CLASS="emphasis"
><I
CLASS="emphasis"
>RUNTEST xxx SEC</I
></SPAN
> commands. For these commands, the SVF player needs to
calculate the equivalent number of clocks and per default it will use the
current cable clock frequency. This can be overridden with the ref_freq option
that specifies a fixed reference frequency for such calculations.</P
></DIV
></TD
></TR
@ -3427,7 +3576,7 @@ CLASS="informaltable"
><P
></P
><A
NAME="AEN833"
NAME="AEN867"
></A
><TABLE
BORDER="0"
@ -4632,7 +4781,11 @@ CLASS="variablelist"
>Q. The documentation is incomplete. Where can I get more information?</DT
><DD
><P
> A. Please ask in the "Using UrJTAG" Forum on http://urjtag.org
> A. Please ask in the "Using UrJTAG" Forum on <A
HREF="http://urjtag.org"
TARGET="_top"
>http://urjtag.org</A
>
</P
></DD
><DT
@ -4712,6 +4865,49 @@ CLASS="literal"
> A. If you want to install into a system directory (the default /usr/local is one), you'll have to run "make install" as the superuser, e.g. do "sudo make install".
</P
></DD
><DT
>Q. My BSDL file defines the bus DAT as bit_vector(15 downto 0), how should I access single elements?</DT
><DD
><P
> A. BSDL syntax is an extension of the VHDL language. Array elements are indexed with
parentheses: DAT(4) selects index number 4 of the DAT vector. Also refer to the "print
signals" command.
</P
></DD
><DT
>Q. My board requires certain signals to be set to dedicated values before external memories can be accessed.</DT
><DD
><P
> A. Most (if not all) BSR-based bus drivers allow for static configurations of
pins that are controlled by BSR bits. Apply the required "set" commands before
issueing the "initbus …" command. These settings are preserved by all bus
related commands if they don't collide with the signals required for bus operation.
</P
></DD
><DT
>Q. My USB pod seems slow.</DT
><DD
><P
> A. USB-based JTAG pods suffer from a couple of intrinsic issues. Consider the
following to get maximum performance:
</P
><P
></P
><UL
><LI
><P
> Run UrJTAG on native linux. Cygwin and VMWare are reportedly slower.
</P
></LI
><LI
><P
> Connect the pod via a high speed USB hub to a high speed USB host port.
Even though the pod is a full speed device, it benefits from the shorter
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
<HTML
><HEAD
><TITLE
@ -87,7 +87,11 @@ CLASS="variablelist"
>Q. The documentation is incomplete. Where can I get more information?</DT
><DD
><P
> A. Please ask in the "Using UrJTAG" Forum on http://urjtag.org
> A. Please ask in the "Using UrJTAG" Forum on <A
HREF="http://urjtag.org"
TARGET="_top"
>http://urjtag.org</A
>
</P
></DD
><DT
@ -167,6 +171,49 @@ CLASS="literal"
> A. If you want to install into a system directory (the default /usr/local is one), you'll have to run "make install" as the superuser, e.g. do "sudo make install".
</P
></DD
><DT
>Q. My BSDL file defines the bus DAT as bit_vector(15 downto 0), how should I access single elements?</DT
><DD
><P
> A. BSDL syntax is an extension of the VHDL language. Array elements are indexed with
parentheses: DAT(4) selects index number 4 of the DAT vector. Also refer to the "print
signals" command.
</P
></DD
><DT
>Q. My board requires certain signals to be set to dedicated values before external memories can be accessed.</DT
><DD
><P
> A. Most (if not all) BSR-based bus drivers allow for static configurations of
pins that are controlled by BSR bits. Apply the required "set" commands before
issueing the "initbus …" command. These settings are preserved by all bus
related commands if they don't collide with the signals required for bus operation.
</P
></DD
><DT
>Q. My USB pod seems slow.</DT
><DD
><P
> A. USB-based JTAG pods suffer from a couple of intrinsic issues. Consider the
following to get maximum performance:
</P
><P
></P
><UL
><LI
><P
> Run UrJTAG on native linux. Cygwin and VMWare are reportedly slower.
</P
></LI
><LI
><P
> Connect the pod via a high speed USB hub to a high speed USB host port.
Even though the pod is a full speed device, it benefits from the shorter
Arnim Läuger
16 years ago