diff --git a/urjtag/ChangeLog b/urjtag/ChangeLog index a0cff6a7..76cb4396 100644 --- a/urjtag/ChangeLog +++ b/urjtag/ChangeLog @@ -1,3 +1,9 @@ +2009-07-15 Arnim + + * src/flash/amd.c: [ 2806917 ] Atmel AT49BV322D flash support (MURANAKA Masaki) + Work around flash chips that support multi byte write mode with a + different programming algorithm. + 2009-07-10 Arnim Laeuger * src/tap/cable/ft2232.c: disable "Set Data bits LowByte" for diff --git a/urjtag/src/flash/amd.c b/urjtag/src/flash/amd.c index 5ba61a8f..49f00abe 100644 --- a/urjtag/src/flash/amd.c +++ b/urjtag/src/flash/amd.c @@ -345,6 +345,12 @@ amd_flash_print_info (urj_log_level_t ll, urj_flash_cfi_array_t *cfi_array) urj_log (ll, _("\n\tChip: ")); switch (cid) { + case 0x01c8: + urj_log (ll, "AT49BV322D"); + break; + case 0x01c9: + urj_log (ll, "AT49BV322DT"); + break; case 0x01d2: urj_log (ll, "AT49BW642DT"); break; @@ -587,21 +593,27 @@ amd_flash_program (urj_flash_cfi_array_t *cfi_array, uint32_t adr, #endif /* multi-byte writes supported? */ - if (max_bytes_write > 1) - return amd_flash_program_buffer (cfi_array, adr, buffer, count); + if (max_bytes_write > 1) { + int result; + result = amd_flash_program_buffer (cfi_array, adr, buffer, count); + if (result == 0) + return 0; + + /* Some flashes support max_bytes_write. + * But some of them don't support S29 style write buffer. + * See also the datasheet about AT49BV322D. + */ + cfi->device_geometry.max_bytes_write = 1; + } - else + /* unroll buffer to single writes */ + int idx; + for (idx = 0; idx < count; idx++) { - /* unroll buffer to single writes */ - int idx; - - for (idx = 0; idx < count; idx++) - { - int status = amd_flash_program_single (cfi_array, adr, buffer[idx]); - if (status != URJ_STATUS_OK) - return status; - adr += cfi_array->bus_width; - } + int status = amd_flash_program_single (cfi_array, adr, buffer[idx]); + if (status != URJ_STATUS_OK) + return status; + adr += cfi_array->bus_width; } return URJ_STATUS_OK;