2003-06-02 Marcel Telka <marcel@telka.sk>
* Makefile.am (SUBDIRS): Added libbrux. * configure.ac (AC_CONFIG_FILES): Removed src/flash/Makefile. (AC_CONFIG_SUBDIRS): Added libbrux. * src/Makefile.am (SUBDIRS): Removed flash. (jtag_DEPENDENCIES): Removed flash/libflash.a, added ../libbrux/libbrux.a. (jtag_LDADD): Removed libflash, added libbrux. * src/flash/Makefile.am: File removed. * src/flash/amd.c: File moved to module libbrux, directory flash. * src/flash/cfi.c: Ditto. * src/flash/intel.c: Ditto. git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@454 b68d4a1b-bc3d-0410-92ed-d4ac073336b7master
Marcel Telka
22 years ago
parent
782f11499d
commit
84e187b996
@ -1,3 +0,0 @@
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.deps
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Makefile
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Makefile.in
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@ -1,31 +0,0 @@
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#
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# $Id$
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#
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# Copyright (C) 2003 ETC s.r.o.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; either version 2
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# of the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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# 02111-1307, USA.
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#
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# Written by Marcel Telka <marcel@telka.sk>, 2003.
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#
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include $(top_srcdir)/Makefile.rules
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noinst_LIBRARIES = libflash.a
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libflash_a_SOURCES = \
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cfi.c \
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amd.c \
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intel.c
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@ -1,253 +0,0 @@
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/*
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* $Id$
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*
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* Flash driver for AMD Am29LV640D, Am29LV641D, Am29LV642D
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* Copyright (C) 2003 AH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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* 02111-1307, USA.
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*
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* Written by August Hörandl <august.hoerandl@gmx.at>
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*
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* Documentation:
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* [1] Advanced Micro Devices, "Am29LV640D/Am29LV641D",
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* September 20, 2002 Rev B, 22366b8.pdf
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* [2] Advanced Micro Devices, "Am29LV642D",
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* August 14, 2001 Rev A, 25022.pdf
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*
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*/
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#include <config.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <flash/cfi.h>
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#include <flash/intel.h>
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#include <unistd.h>
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#include "flash.h"
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#include "bus.h"
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static int dbg = 0;
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static int amd_flash_erase_block( bus_t *bus, uint32_t adr );
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static int amd_flash_unlock_block( bus_t *bus, uint32_t adr );
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static int amd_flash_program( bus_t *bus, uint32_t adr, uint32_t data );
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static void amd_flash_read_array( bus_t *bus );
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/* autodetect, we can handle this chip */
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static int
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amd_flash_autodetect( bus_t *bus, cfi_query_structure_t *cfi )
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{
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return (cfi->identification_string.pri_id_code == CFI_VENDOR_AMD_SCS);
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}
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/*
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* check device status
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* 1/true PASS
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* 0/false FAIL
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*/
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/*
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* first implementation: see [1], page 29
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*/
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#if 0
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static int
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amdstatus29( parts *ps, uint32_t adr, uint32_t data )
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{
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int o = 2;
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int timeout;
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uint32_t dq7mask = ((1 << 7) << 16) + (1 << 7);
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uint32_t dq5mask = ((1 << 5) << 16) + (1 << 5);
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uint32_t bit7 = (data & (1 << 7)) != 0;
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uint32_t data1;
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for (timeout = 0; timeout < 100; timeout++) {
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data1 = bus_read( ps, adr << o );
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data1 = bus_read( ps, adr << o );
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if (dbg)
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printf( "amdstatus %d: %04X (%04X) = %04X\n", timeout, data1, (data1 & dq7mask), bit7 );
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if (((data1 & dq7mask) == dq7mask) == bit7) /* FIXME: This looks non-portable */
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return 1;
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if ((data1 & dq5mask) == dq5mask)
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break;
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usleep( 100 );
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}
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data1 = bus_read( ps, adr << o );
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if (((data1 & dq7mask) == dq7mask) == bit7) /* FIXME: This looks non-portable */
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return 1;
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return 0;
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}
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#endif /* 0 */
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/*
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* second implementation: see [1], page 30
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*/
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static int
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amdstatus( bus_t *bus, uint32_t adr, int data )
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{
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int timeout;
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uint32_t togglemask = ((1 << 6) << 16) + (1 << 6); /* DQ 6 */
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/* int dq5mask = ((1 << 5) << 16) + (1 << 5); DQ5 */
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for (timeout = 0; timeout < 100; timeout++) {
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uint32_t data1 = bus_read( bus, adr );
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uint32_t data2 = bus_read( bus, adr );
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/*printf("amdstatus %d: %04X/%04X %04X/%04X \n", */
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/* timeout, data1, data2, (data1 & togglemask), (data2 & togglemask)); */
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if ( (data1 & togglemask) == (data2 & togglemask)) /* no toggle */
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return 1;
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/* if ( (data1 & dq5mask) != 0 ) TODO */
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/* return 0; */
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if (dbg)
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printf( "amdstatus %d: %04X/%04X\n", timeout, data1, data2 );
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else
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printf( "." );
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usleep( 100 );
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}
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return 0;
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}
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#if 0
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static int
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amdisprotected( parts *ps, uint32_t adr )
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{
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uint32_t data;
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int o = 2;
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bus_write( ps, 0x0555 << o, 0x00aa00aa ); /* autoselect p29, sector erase */
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bus_write( ps, 0x02aa << o, 0x00550055 );
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bus_write( ps, 0x0555 << o, 0x00900090 );
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data = bus_read( ps, adr + (0x0002 << 2) );
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/* Read Array */
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amd_flash_read_array( ps ); /* AMD reset */
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return ((data & 0x00ff00ff) != 0);
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}
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#endif /* 0 */
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static void
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amd_flash_print_info( bus_t *bus )
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{
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int o = 2;
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int mid, cid, prot;
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bus_write( bus, 0x0555 << o, 0x00aa00aa ); /* autoselect p29 */
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bus_write( bus, 0x02aa << o, 0x00550055 );
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bus_write( bus, 0x0555 << o, 0x00900090 );
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mid = bus_read( bus, 0x00 << o ) & 0xFFFF;
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cid = bus_read( bus, 0x01 << o ) & 0xFFFF;
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prot = bus_read( bus, 0x02 << o ) & 0xFF;
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amd_flash_read_array( bus ); /* AMD reset */
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printf( _("Chip: AMD Flash\n\tManufacturer: ") );
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switch (mid) {
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case 0x0001:
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printf( _("AMD") );
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break;
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default:
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printf( _("Unknown manufacturer (ID 0x%04x)"), mid );
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break;
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}
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printf( _("\n\tChip: ") );
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switch (cid) {
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case 0x22D7:
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printf( _("Am29LV640D/Am29LV641D/Am29LV642D") );
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break;
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default:
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printf ( _("Unknown (ID 0x%04x)"), cid );
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break;
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}
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printf( _("\n\tProtected: %04x\n"), prot );
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}
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static int
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amd_flash_erase_block( bus_t *bus, uint32_t adr )
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{
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int o = 2;
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printf("flash_erase_block 0x%08X\n", adr);
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/* printf("protected: %d\n", amdisprotected(ps, adr)); */
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bus_write( bus, 0x0555 << o, 0x00aa00aa ); /* autoselect p29, sector erase */
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bus_write( bus, 0x02aa << o, 0x00550055 );
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bus_write( bus, 0x0555 << o, 0x00800080 );
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bus_write( bus, 0x0555 << o, 0x00aa00aa );
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bus_write( bus, 0x02aa << o, 0x00550055 );
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bus_write( bus, adr, 0x00300030 );
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if (amdstatus( bus, adr, 0xffff )) {
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printf( "flash_erase_block 0x%08X DONE\n", adr );
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amd_flash_read_array( bus ); /* AMD reset */
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return 0;
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}
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printf( "flash_erase_block 0x%08X FAILED\n", adr );
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/* Read Array */
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amd_flash_read_array( bus ); /* AMD reset */
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return CFI_INTEL_ERROR_UNKNOWN;
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}
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static int
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amd_flash_unlock_block( bus_t *bus, uint32_t adr )
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{
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printf( "flash_unlock_block 0x%08X IGNORE\n", adr );
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return 0;
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}
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static int
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amd_flash_program( bus_t *bus, uint32_t adr, uint32_t data )
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{
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int o = 2;
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int status;
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if (dbg)
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printf("\nflash_program 0x%08X = 0x%08X\n", adr, data);
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bus_write( bus, 0x0555 << o, 0x00aa00aa ); /* autoselect p29, program */
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bus_write( bus, 0x02aa << o, 0x00550055 );
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bus_write( bus, 0x0555 << o, 0x00A000A0 );
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bus_write( bus, adr, data );
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status = amdstatus( bus, adr, data );
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/* amd_flash_read_array(ps); */
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return !status;
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}
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static void
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amd_flash_read_array( bus_t *bus )
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{
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/* Read Array */
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bus_write( bus, 0x0, 0x00F000F0 ); /* AMD reset */
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}
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flash_driver_t amd_32_flash_driver = {
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4, /* buswidth */
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N_("AMD/Fujitsu Standard Command Set"),
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N_("supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"),
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amd_flash_autodetect,
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amd_flash_print_info,
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amd_flash_erase_block,
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amd_flash_unlock_block,
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amd_flash_program,
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amd_flash_read_array,
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};
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@ -1,253 +0,0 @@
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/*
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* $Id$
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*
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* Copyright (C) 2002, 2003 ETC s.r.o.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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* 02111-1307, USA.
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*
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* Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
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*
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* Documentation:
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* [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
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* September 1999, Order Number: JESD68
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* [2] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
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* Application Note 646", April 2000, Order Number: 292204-004
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*
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <flash/cfi.h>
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#include "cfi.h"
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#include "bus.h"
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void
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cfi_array_free( cfi_array_t *cfi_array )
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{
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if (!cfi_array)
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return;
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if (cfi_array->cfi_chips) {
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int i;
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for (i = 0; i < cfi_array->bus_width; i++) {
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if (!cfi_array->cfi_chips[i])
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continue;
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free( cfi_array->cfi_chips[i]->cfi.device_geometry.erase_block_regions );
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free( cfi_array->cfi_chips[i] );
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}
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free( cfi_array->cfi_chips );
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}
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free( cfi_array );
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}
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int
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detect_cfi( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array )
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{
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int bw; /* bus width */
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int d; /* data offset */
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int ba; /* bus width address multiplier */
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int ma; /* flash mode address multiplier */
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if (!cfi_array || !bus)
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return -1; /* invalid parameters */
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*cfi_array = calloc( 1, sizeof (cfi_array_t) );
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if (!*cfi_array)
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return -2; /* out of memory */
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(*cfi_array)->bus = bus;
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(*cfi_array)->address = adr;
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bw = bus_width( bus, adr );
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if (bw != 8 && bw != 16 && bw != 32)
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return -3; /* invalid bus width */
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(*cfi_array)->bus_width = ba = bw / 8;
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(*cfi_array)->cfi_chips = calloc( ba, sizeof (cfi_chip_t *) );
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if (!(*cfi_array)->cfi_chips)
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return -2; /* out of memory */
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for (d = 0; d < bw; d += 8) {
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#define A(off) (adr + (off) * ba * ma)
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#define D(data) ((data) << d)
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#define gD(data) (((data) >> d) & 0xFF)
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#define read1(off) gD(bus_read( bus, A(off) ))
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#define read2(off) (bus_read_start( bus, A(off) ), gD(bus_read_next( bus, A(off + 1) )) | gD(bus_read_end( bus )) << 8)
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#define write1(off,data) bus_write( bus, A(off), D(data) )
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cfi_query_structure_t *cfi;
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uint32_t tmp;
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ma = 1;
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/* detect CFI capable devices - see Table 1 in [1] */
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write1( CFI_CMD_QUERY_OFFSET, CFI_CMD_QUERY );
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if (read1(CFI_QUERY_ID_OFFSET) != 'Q') {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -4; /* CFI not detected (Q) */
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}
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for (; ma <= 4; ma *= 2)
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if (read1(CFI_QUERY_ID_OFFSET + 1) == 'R')
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break;
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if (ma > 4) {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -5; /* CFI not detected (R) */
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||||
}
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||||
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if (read1(CFI_QUERY_ID_OFFSET + 2) != 'Y') {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -6; /* CFI not detected (Y) */
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||||
}
|
||||
|
||||
(*cfi_array)->cfi_chips[d / 8] = calloc( 1, sizeof (cfi_chip_t) );
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if (!(*cfi_array)->cfi_chips[d / 8]) {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -2; /* out of memory */
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||||
}
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||||
cfi = &(*cfi_array)->cfi_chips[d / 8]->cfi;
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||||
|
||||
/* Identification string - see Table 6 in [1] */
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cfi->identification_string.pri_id_code = read2(PRI_VENDOR_ID_OFFSET);
|
||||
cfi->identification_string.pri_vendor_tbl = NULL;
|
||||
cfi->identification_string.alt_id_code = read2(ALT_VENDOR_ID_OFFSET);
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||||
cfi->identification_string.alt_vendor_tbl = NULL;
|
||||
|
||||
/* System interface information - see Table 7 in [1] */
|
||||
tmp = read1(VCC_MIN_WEV_OFFSET);
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||||
cfi->system_interface_info.vcc_min_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
|
||||
tmp = read1(VCC_MAX_WEV_OFFSET);
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cfi->system_interface_info.vcc_max_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
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||||
tmp = read1(VPP_MIN_WEV_OFFSET);
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cfi->system_interface_info.vpp_min_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
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||||
tmp = read1(VPP_MAX_WEV_OFFSET);
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cfi->system_interface_info.vpp_max_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
|
||||
|
||||
/* TODO: Add out of range checks for timeouts */
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||||
tmp = read1(TYP_SINGLE_WRITE_TIMEOUT_OFFSET);
|
||||
cfi->system_interface_info.typ_single_write_timeout = tmp ? (1 << tmp) : 0;
|
||||
|
||||
tmp = read1(TYP_BUFFER_WRITE_TIMEOUT_OFFSET);
|
||||
cfi->system_interface_info.typ_buffer_write_timeout = tmp ? (1 << tmp) : 0;
|
||||
|
||||
tmp = read1(TYP_BLOCK_ERASE_TIMEOUT_OFFSET);
|
||||
cfi->system_interface_info.typ_block_erase_timeout = tmp ? (1 << tmp) : 0;
|
||||
|
||||
tmp = read1(TYP_CHIP_ERASE_TIMEOUT_OFFSET);
|
||||
cfi->system_interface_info.typ_chip_erase_timeout = tmp ? (1 << tmp) : 0;
|
||||
|
||||
tmp = read1(MAX_SINGLE_WRITE_TIMEOUT_OFFSET);
|
||||
cfi->system_interface_info.max_single_write_timeout =
|
||||
(tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_single_write_timeout;
|
||||
|
||||
tmp = read1(MAX_BUFFER_WRITE_TIMEOUT_OFFSET);
|
||||
cfi->system_interface_info.max_buffer_write_timeout =
|
||||
(tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_buffer_write_timeout;
|
||||
|
||||
tmp = read1(MAX_BLOCK_ERASE_TIMEOUT_OFFSET);
|
||||
cfi->system_interface_info.max_block_erase_timeout =
|
||||
(tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_block_erase_timeout;
|
||||
|
||||
tmp = read1(MAX_CHIP_ERASE_TIMEOUT_OFFSET);
|
||||
cfi->system_interface_info.max_chip_erase_timeout =
|
||||
(tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_chip_erase_timeout;
|
||||
|
||||
/* Device geometry - see Table 8 in [1] */
|
||||
/* TODO: Add out of range check */
|
||||
cfi->device_geometry.device_size = 1 << read1(DEVICE_SIZE_OFFSET);
|
||||
|
||||
cfi->device_geometry.device_interface = read2(FLASH_DEVICE_INTERFACE_OFFSET);
|
||||
|
||||
/* TODO: Add out of range check */
|
||||
cfi->device_geometry.max_bytes_write = 1 << read2(MAX_BYTES_WRITE_OFFSET);
|
||||
|
||||
tmp = cfi->device_geometry.number_of_erase_regions = read1(NUMBER_OF_ERASE_REGIONS_OFFSET);
|
||||
|
||||
cfi->device_geometry.erase_block_regions = malloc( tmp * sizeof (cfi_erase_block_region_t) );
|
||||
if (!cfi->device_geometry.erase_block_regions) {
|
||||
write1( 0, CFI_CMD_READ_ARRAY1 );
|
||||
return -2; /* out of memory */
|
||||
}
|
||||
|
||||
{
|
||||
int a;
|
||||
int i;
|
||||
|
||||
for (i = 0, a = ERASE_BLOCK_REGION_OFFSET; i < tmp; i++, a += 4) {
|
||||
uint32_t y = read2(a);
|
||||
uint32_t z = read2(a + 2) << 8;
|
||||
if (z == 0)
|
||||
z = 128;
|
||||
cfi->device_geometry.erase_block_regions[i].erase_block_size = z;
|
||||
cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks = y + 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* TODO: Intel Primary Algorithm Extended Query Table - see Table 5. in [2] */
|
||||
|
||||
/* Read Array */
|
||||
write1( 0, CFI_CMD_READ_ARRAY1 );
|
||||
|
||||
#undef A
|
||||
#undef D
|
||||
#undef gD
|
||||
#undef read1
|
||||
#undef read2
|
||||
#undef write1
|
||||
|
||||
switch (cfi->device_geometry.device_interface) {
|
||||
case CFI_INTERFACE_X8:
|
||||
if (ma != 1)
|
||||
return -7; /* error in device detection */
|
||||
(*cfi_array)->cfi_chips[d / 8]->width = 1;
|
||||
break;
|
||||
case CFI_INTERFACE_X16:
|
||||
if (ma != 1)
|
||||
return -7; /* error in device detection */
|
||||
(*cfi_array)->cfi_chips[d / 8]->width = 2;
|
||||
d += 8;
|
||||
break;
|
||||
case CFI_INTERFACE_X8_X16:
|
||||
if (ma != 1 && ma != 2)
|
||||
return -7; /* error in device detection */
|
||||
(*cfi_array)->cfi_chips[d / 8]->width = 2 / ma;
|
||||
if (ma == 1)
|
||||
d += 8;
|
||||
break;
|
||||
case CFI_INTERFACE_X32:
|
||||
if (ma != 1)
|
||||
return -7; /* error in device detection */
|
||||
(*cfi_array)->cfi_chips[d / 8]->width = 4;
|
||||
d += 24;
|
||||
break;
|
||||
case CFI_INTERFACE_X16_X32:
|
||||
if (ma != 1 && ma != 2)
|
||||
return -7; /* error in device detection */
|
||||
(*cfi_array)->cfi_chips[d / 8]->width = 4 / ma;
|
||||
if (ma == 1)
|
||||
d += 24;
|
||||
else
|
||||
d += 8;
|
||||
break;
|
||||
default:
|
||||
return -7; /* error in device detection */
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1,310 +0,0 @@
|
||||
/*
|
||||
* $Id$
|
||||
*
|
||||
* Copyright (C) 2002 ETC s.r.o.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
|
||||
* 02111-1307, USA.
|
||||
*
|
||||
* Written by Marcel Telka <marcel@telka.sk>, 2002.
|
||||
* Changed by August Hörandl, 2003
|
||||
*
|
||||
* Documentation:
|
||||
* [1] Advanced Micro Devices, "Common Flash Memory Interface Specification Release 2.0",
|
||||
* December 1, 2001
|
||||
* [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
|
||||
* Developer's Manual", February 2002, Order Number: 278522-001
|
||||
* [3] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
|
||||
* Application Note 646", April 2000, Order Number: 292204-004
|
||||
* [4] Advanced Micro Devices, "Common Flash Memory Interface Publication 100 Vendor & Device
|
||||
* ID Code Assignments", December 1, 2001, Volume Number: 96.1
|
||||
*
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <flash/cfi.h>
|
||||
#include <flash/intel.h>
|
||||
#include <std/mic.h>
|
||||
|
||||
#include "flash.h"
|
||||
#include "bus.h"
|
||||
|
||||
static int intel_flash_erase_block( bus_t *bus, uint32_t adr );
|
||||
static int intel_flash_unlock_block( bus_t *bus, uint32_t adr );
|
||||
static int intel_flash_program( bus_t *bus, uint32_t adr, uint32_t data );
|
||||
static int intel_flash_erase_block32( bus_t *bus, uint32_t adr );
|
||||
static int intel_flash_unlock_block32( bus_t *bus, uint32_t adr );
|
||||
static int intel_flash_program32( bus_t *bus, uint32_t adr, uint32_t data );
|
||||
|
||||
/* autodetect, we can handle this chip */
|
||||
static int
|
||||
intel_flash_autodetect32( bus_t *bus, cfi_query_structure_t *cfi )
|
||||
{
|
||||
return (cfi->identification_string.pri_id_code == CFI_VENDOR_INTEL_ECS) && (bus_width( bus, 0 ) == 32);
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_autodetect( bus_t *bus, cfi_query_structure_t *cfi )
|
||||
{
|
||||
return (cfi->identification_string.pri_id_code == CFI_VENDOR_INTEL_ECS) && (bus_width( bus, 0 ) == 16);
|
||||
}
|
||||
|
||||
static void
|
||||
_intel_flash_print_info( bus_t *bus, int o )
|
||||
{
|
||||
uint32_t mid, cid;
|
||||
|
||||
mid = (bus_read( bus, 0x00 << o ) & 0xFF);
|
||||
switch (mid) {
|
||||
case STD_MIC_INTEL:
|
||||
printf( _("Manufacturer: %s\n"), STD_MICN_INTEL );
|
||||
break;
|
||||
default:
|
||||
printf( _("Unknown manufacturer (0x%04X)!\n"), mid);
|
||||
break;
|
||||
}
|
||||
|
||||
printf( _("Chip: ") );
|
||||
cid = (bus_read( bus, 0x01 << o ) & 0xFFFF);
|
||||
switch (cid) {
|
||||
case 0x0016:
|
||||
printf( "28F320J3A\n" );
|
||||
break;
|
||||
case 0x0017:
|
||||
printf( "28F640J3A\n" );
|
||||
break;
|
||||
case 0x0018:
|
||||
printf( "28F128J3A\n" );
|
||||
break;
|
||||
case 0x8801:
|
||||
printf( "28F640K3\n" );
|
||||
break;
|
||||
case 0x8802:
|
||||
printf( "28F128K3\n" );
|
||||
break;
|
||||
case 0x8803:
|
||||
printf( "28F256K3\n" );
|
||||
break;
|
||||
case 0x8805:
|
||||
printf( "28F640K18\n" );
|
||||
break;
|
||||
case 0x8806:
|
||||
printf( "28F128K18\n" );
|
||||
break;
|
||||
case 0x8807:
|
||||
printf( "28F256K18\n" );
|
||||
break;
|
||||
default:
|
||||
printf( _("Unknown (0x%02X)!\n"), cid );
|
||||
break;
|
||||
}
|
||||
|
||||
/* Read Array */
|
||||
bus_write( bus, 0 << o, 0x00FF00FF );
|
||||
}
|
||||
|
||||
static void
|
||||
intel_flash_print_info( bus_t *bus )
|
||||
{
|
||||
int o = 1;
|
||||
/* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
|
||||
/* TODO */
|
||||
|
||||
/* Clear Status Register */
|
||||
bus_write( bus, 0 << o, 0x0050 );
|
||||
|
||||
/* Read Identifier Command */
|
||||
bus_write( bus, 0 << 0, 0x0090 );
|
||||
|
||||
_intel_flash_print_info( bus, o );
|
||||
}
|
||||
|
||||
static void
|
||||
intel_flash_print_info32( bus_t *bus )
|
||||
{
|
||||
int o = 2;
|
||||
/* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
|
||||
/* TODO */
|
||||
|
||||
/* Clear Status Register */
|
||||
bus_write( bus, 0 << o, 0x00500050 );
|
||||
|
||||
/* Read Identifier Command */
|
||||
bus_write( bus, 0 << 0, 0x00900090 );
|
||||
|
||||
_intel_flash_print_info( bus, o );
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_erase_block( bus_t *bus, uint32_t adr )
|
||||
{
|
||||
uint16_t sr;
|
||||
|
||||
bus_write( bus, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( bus, adr, CFI_INTEL_CMD_BLOCK_ERASE );
|
||||
bus_write( bus, adr, CFI_INTEL_CMD_CONFIRM );
|
||||
|
||||
while (!((sr = bus_read( bus, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
switch (sr & ~CFI_INTEL_SR_READY) {
|
||||
case 0:
|
||||
return 0;
|
||||
case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_PROGRAM_ERROR:
|
||||
printf( _("flash: invalid command seq\n") );
|
||||
return CFI_INTEL_ERROR_INVALID_COMMAND_SEQUENCE;
|
||||
case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_VPEN_ERROR:
|
||||
printf( _("flash: low vpen\n") );
|
||||
return CFI_INTEL_ERROR_LOW_VPEN;
|
||||
case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_BLOCK_LOCKED:
|
||||
printf( _("flash: block locked\n") );
|
||||
return CFI_INTEL_ERROR_BLOCK_LOCKED;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_unlock_block( bus_t *bus, uint32_t adr )
|
||||
{
|
||||
uint16_t sr;
|
||||
|
||||
bus_write( bus, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( bus, adr, CFI_INTEL_CMD_LOCK_SETUP );
|
||||
bus_write( bus, adr, CFI_INTEL_CMD_UNLOCK_BLOCK );
|
||||
|
||||
while (!((sr = bus_read( bus, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != CFI_INTEL_SR_READY) {
|
||||
printf( _("flash: unknown error while unblocking\n") );
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_program( bus_t *bus, uint32_t adr, uint32_t data )
|
||||
{
|
||||
uint16_t sr;
|
||||
|
||||
bus_write( bus, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( bus, adr, CFI_INTEL_CMD_PROGRAM1 );
|
||||
bus_write( bus, adr, data );
|
||||
|
||||
while (!((sr = bus_read( bus, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != CFI_INTEL_SR_READY) {
|
||||
printf( _("flash: unknown error while programming\n") );
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_erase_block32( bus_t *bus, uint32_t adr )
|
||||
{
|
||||
uint32_t sr;
|
||||
|
||||
bus_write( bus, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( bus, adr, (CFI_INTEL_CMD_BLOCK_ERASE << 16) | CFI_INTEL_CMD_BLOCK_ERASE );
|
||||
bus_write( bus, adr, (CFI_INTEL_CMD_CONFIRM << 16) | CFI_INTEL_CMD_CONFIRM );
|
||||
|
||||
while (((sr = bus_read( bus, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
|
||||
printf( "\nsr = 0x%08X\n", sr );
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_unlock_block32( bus_t *bus, uint32_t adr )
|
||||
{
|
||||
uint32_t sr;
|
||||
|
||||
bus_write( bus, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( bus, adr, (CFI_INTEL_CMD_LOCK_SETUP << 16) | CFI_INTEL_CMD_LOCK_SETUP );
|
||||
bus_write( bus, adr, (CFI_INTEL_CMD_UNLOCK_BLOCK << 16) | CFI_INTEL_CMD_UNLOCK_BLOCK );
|
||||
|
||||
while (((sr = bus_read( bus, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
|
||||
printf( "\nsr = 0x%08X\n", sr );
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_program32( bus_t *bus, uint32_t adr, uint32_t data )
|
||||
{
|
||||
uint32_t sr;
|
||||
|
||||
bus_write( bus, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( bus, adr, (CFI_INTEL_CMD_PROGRAM1 << 16) | CFI_INTEL_CMD_PROGRAM1 );
|
||||
bus_write( bus, adr, data );
|
||||
|
||||
while (((sr = bus_read( bus, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
|
||||
printf( "\nsr = 0x%08X\n", sr );
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
intel_flash_readarray32( bus_t *bus )
|
||||
{
|
||||
/* Read Array */
|
||||
bus_write( bus, 0, 0x00FF00FF );
|
||||
}
|
||||
|
||||
static void
|
||||
intel_flash_readarray( bus_t *bus )
|
||||
{
|
||||
/* Read Array */
|
||||
bus_write( bus, 0, 0x00FF00FF );
|
||||
}
|
||||
|
||||
flash_driver_t intel_32_flash_driver = {
|
||||
4, /* buswidth */
|
||||
N_("Intel Standard Command Set"),
|
||||
N_("supported: 28Fxxxx, 2 x 16 bit"),
|
||||
intel_flash_autodetect32,
|
||||
intel_flash_print_info32,
|
||||
intel_flash_erase_block32,
|
||||
intel_flash_unlock_block32,
|
||||
intel_flash_program32,
|
||||
intel_flash_readarray32,
|
||||
};
|
||||
|
||||
flash_driver_t intel_16_flash_driver = {
|
||||
2, /* buswidth */
|
||||
N_("Intel Standard Command Set"),
|
||||
N_("supported: 28Fxxxx, 1 x 16 bit"),
|
||||
intel_flash_autodetect,
|
||||
intel_flash_print_info,
|
||||
intel_flash_erase_block,
|
||||
intel_flash_unlock_block,
|
||||
intel_flash_program,
|
||||
intel_flash_readarray,
|
||||
};
|
||||
Loading…
Reference in New Issue