diff --git a/jtag/data/MANUFACTURERS b/jtag/data/MANUFACTURERS index 87c3766e..a3fe8e7a 100644 --- a/jtag/data/MANUFACTURERS +++ b/jtag/data/MANUFACTURERS @@ -27,6 +27,7 @@ # # bits 11-1 of the Device Identification Register +00000000110 lexra Lexr 00000000111 hitachi Hitachi 00000001001 intel Intel 00000001110 freescale Freescale (Motorola) @@ -43,4 +44,5 @@ 00010101011 lattice Lattice Semiconductors 00010111111 broadcom Broadcom 00101010000 broadcom Broadcom # or "Sibyte, Incorporated" ? +00101110000 brecis Brecis (PMC-Sierra) 11110000111 sharp Sharp diff --git a/jtag/data/Makefile.am b/jtag/data/Makefile.am index 156a1a6e..f465e4df 100644 --- a/jtag/data/Makefile.am +++ b/jtag/data/Makefile.am @@ -25,6 +25,7 @@ include $(top_srcdir)/Makefile.rules nobase_dist_pkgdata_DATA = \ MANUFACTURERS \ + admtek/adm5120/adm5120 \ altera/PARTS \ altera/ep1c20f400/STEPPINGS \ altera/ep1c20f400/ep1c20f400 \ @@ -41,6 +42,7 @@ nobase_dist_pkgdata_DATA = \ altera/epm3064a/l44 \ altera/epm3064a/t100 \ altera/epm3064a/t44 \ + atheros/ar2312/ar2312 \ atmel/PARTS \ atmel/atmega128/STEPPINGS \ atmel/atmega128/atmega128 \ @@ -50,17 +52,24 @@ nobase_dist_pkgdata_DATA = \ analog/PARTS \ analog/bf533/STEPPINGS \ analog/bf533/bf533 \ + brecis/PARTS \ + brecis/msp2006/STEPPINGS \ + brecis/msp2006/msp2006 \ broadcom/PARTS \ broadcom/bcm1250/STEPPINGS \ broadcom/bcm1250/bcm1250 \ broadcom/bcm3310/STEPPINGS \ broadcom/bcm3310/bcm3310 \ + broadcom/bcm4712/STEPPINGS \ + broadcom/bcm4712/bcm4712 \ broadcom/bcm5421s/STEPPINGS \ broadcom/bcm5421s/bcm5421s \ dec/PARTS \ dec/sa1100/STEPPINGS \ dec/sa1100/sa1100 \ hitachi/PARTS \ + hitachi/ar7300/STEPPINGS \ + hitachi/ar7300/ar7300 \ hitachi/hd64465/hd64465 \ hitachi/sh7727/STEPPINGS \ hitachi/sh7727/sh7727 \ @@ -91,6 +100,9 @@ nobase_dist_pkgdata_DATA = \ lattice/m4a3-256.192-fpbga256/m4a3-256.192-fpbga256 \ lattice/m4a3-64.32-tqfp48/STEPPINGS \ lattice/m4a3-64.32-tqfp48/m4a3-64.32-tqfp48 \ + lexra/PARTS \ + lexra/lx5280/STEPPINGS \ + lexra/lx5280/lx5280 \ motorola/mpc8245/1.2 \ philips/PARTS \ philips/xcr3128xl-cs144/STEPPINGS \ diff --git a/jtag/data/admtek/adm5120/adm5120 b/jtag/data/admtek/adm5120/adm5120 new file mode 100644 index 00000000..999dacaf --- /dev/null +++ b/jtag/data/admtek/adm5120/adm5120 @@ -0,0 +1,50 @@ +# +# $Id$ +# +# JTAG declarations for ADMtek/Infineon ADM5120 +# Copyright (C) 2005 Marek Michalkiewicz +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Marek Michalkiewicz , 2005. +# + +register BR 1 +register BSR 1 +register DIR 32 +register EJIMPCODE 32 +register EJADDRESS 32 +register EJDATA 32 +register EJCONTROL 32 +register EJALL 96 +register EJFASTDATA 33 + +instruction length 5 + +instruction BYPASS 11111 BR +instruction SAMPLE/PRELOAD 00010 BSR +instruction IDCODE 00001 DIR +instruction EJTAG_IMPCODE 00011 EJIMPCODE +instruction EJTAG_ADDRESS 01000 EJADDRESS +instruction EJTAG_DATA 01001 EJDATA +instruction EJTAG_CONTROL 01010 EJCONTROL +instruction EJTAG_ALL 01011 EJALL +instruction EJTAGBOOT 01100 BR +instruction NORMALBOOT 01101 BR +instruction EJTAG_FASTDATA 01110 EJFASTDATA + +initbus ejtag +endian little diff --git a/jtag/data/atheros/ar2312/ar2312 b/jtag/data/atheros/ar2312/ar2312 new file mode 100644 index 00000000..8b3461cd --- /dev/null +++ b/jtag/data/atheros/ar2312/ar2312 @@ -0,0 +1,50 @@ +# +# $Id$ +# +# JTAG declarations for Atheros AR2312 +# Copyright (C) 2005 Marek Michalkiewicz +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Marek Michalkiewicz , 2005. +# + +register BR 1 +register BSR 1 +register DIR 32 +register EJIMPCODE 32 +register EJADDRESS 32 +register EJDATA 32 +register EJCONTROL 32 +register EJALL 96 +register EJFASTDATA 33 + +instruction length 5 + +instruction BYPASS 11111 BR +instruction SAMPLE/PRELOAD 00010 BSR +instruction IDCODE 00001 DIR +instruction EJTAG_IMPCODE 00011 EJIMPCODE +instruction EJTAG_ADDRESS 01000 EJADDRESS +instruction EJTAG_DATA 01001 EJDATA +instruction EJTAG_CONTROL 01010 EJCONTROL +instruction EJTAG_ALL 01011 EJALL +instruction EJTAGBOOT 01100 BR +instruction NORMALBOOT 01101 BR +instruction EJTAG_FASTDATA 01110 EJFASTDATA + +initbus ejtag +endian big diff --git a/jtag/data/brecis/PARTS b/jtag/data/brecis/PARTS new file mode 100644 index 00000000..cd16ac09 --- /dev/null +++ b/jtag/data/brecis/PARTS @@ -0,0 +1,23 @@ +# +# $Id$ +# +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# + +# bits 27-12 of the Device Identification Register +0000001000000010 msp2006 MSP2006 diff --git a/jtag/data/brecis/msp2006/STEPPINGS b/jtag/data/brecis/msp2006/STEPPINGS new file mode 100644 index 00000000..a4848c7f --- /dev/null +++ b/jtag/data/brecis/msp2006/STEPPINGS @@ -0,0 +1,23 @@ +# +# $Id$ +# +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# + +# bits 31-28 of the Device Identification Register +0001 msp2006 1 diff --git a/jtag/data/brecis/msp2006/msp2006 b/jtag/data/brecis/msp2006/msp2006 new file mode 100644 index 00000000..9a5ca06c --- /dev/null +++ b/jtag/data/brecis/msp2006/msp2006 @@ -0,0 +1,29 @@ +# +# $Id$ + +register BR 1 +register BSR 1 +register DIR 32 +register EJIMPCODE 32 +register EJADDRESS 32 +register EJDATA 32 +register EJCONTROL 32 +register EJALL 96 +register EJFASTDATA 33 + +instruction length 5 + +instruction BYPASS 11111 BR +instruction SAMPLE/PRELOAD 00010 BSR +instruction IDCODE 00001 DIR +instruction EJTAG_IMPCODE 00011 EJIMPCODE +instruction EJTAG_ADDRESS 01000 EJADDRESS +instruction EJTAG_DATA 01001 EJDATA +instruction EJTAG_CONTROL 01010 EJCONTROL +instruction EJTAG_ALL 01011 EJALL +instruction EJTAGBOOT 01100 BR +instruction NORMALBOOT 01101 BR +instruction EJTAG_FASTDATA 01110 EJFASTDATA + +initbus ejtag +endian big diff --git a/jtag/data/hitachi/PARTS b/jtag/data/hitachi/PARTS index 1a498484..f26dab0f 100644 --- a/jtag/data/hitachi/PARTS +++ b/jtag/data/hitachi/PARTS @@ -22,5 +22,6 @@ # # bits 27-12 of the Device Identification Register +0000000000000001 ar7300 AR7300 0000000001000010 sh7727 SH7727 0111010101101110 sh7727 SH7727 diff --git a/jtag/data/hitachi/ar7300/STEPPINGS b/jtag/data/hitachi/ar7300/STEPPINGS new file mode 100644 index 00000000..12d09af0 --- /dev/null +++ b/jtag/data/hitachi/ar7300/STEPPINGS @@ -0,0 +1,23 @@ +# +# $Id$ +# +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# + +# bits 31-28 of the Device Identification Register +0000 ar7300 0 diff --git a/jtag/data/hitachi/ar7300/ar7300 b/jtag/data/hitachi/ar7300/ar7300 new file mode 100644 index 00000000..9a5ca06c --- /dev/null +++ b/jtag/data/hitachi/ar7300/ar7300 @@ -0,0 +1,29 @@ +# +# $Id$ + +register BR 1 +register BSR 1 +register DIR 32 +register EJIMPCODE 32 +register EJADDRESS 32 +register EJDATA 32 +register EJCONTROL 32 +register EJALL 96 +register EJFASTDATA 33 + +instruction length 5 + +instruction BYPASS 11111 BR +instruction SAMPLE/PRELOAD 00010 BSR +instruction IDCODE 00001 DIR +instruction EJTAG_IMPCODE 00011 EJIMPCODE +instruction EJTAG_ADDRESS 01000 EJADDRESS +instruction EJTAG_DATA 01001 EJDATA +instruction EJTAG_CONTROL 01010 EJCONTROL +instruction EJTAG_ALL 01011 EJALL +instruction EJTAGBOOT 01100 BR +instruction NORMALBOOT 01101 BR +instruction EJTAG_FASTDATA 01110 EJFASTDATA + +initbus ejtag +endian big diff --git a/jtag/data/lexra/PARTS b/jtag/data/lexra/PARTS new file mode 100644 index 00000000..2ab3e9e7 --- /dev/null +++ b/jtag/data/lexra/PARTS @@ -0,0 +1,25 @@ +# +# $Id$ +# +# Copyright (C) 2005 Marek Michalkiewicz +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Marek Michalkiewicz , 2005. +# + +# bits 27-12 of the Device Identification Register +0101001010000000 lx5280 LX5280 diff --git a/jtag/data/lexra/lx5280/STEPPINGS b/jtag/data/lexra/lx5280/STEPPINGS new file mode 100644 index 00000000..71fbbd18 --- /dev/null +++ b/jtag/data/lexra/lx5280/STEPPINGS @@ -0,0 +1,25 @@ +# +# $Id$ +# +# Copyright (C) 2005 Marek Michalkiewicz +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Marek Michalkiewicz , 2005. +# + +# bits 31-28 of the Device Identification Register +0001 lx5280 1 diff --git a/jtag/data/lexra/lx5280/lx5280 b/jtag/data/lexra/lx5280/lx5280 new file mode 100644 index 00000000..c0111909 --- /dev/null +++ b/jtag/data/lexra/lx5280/lx5280 @@ -0,0 +1,44 @@ +# +# $Id$ +# +# JTAG declarations for Lexra LX5280 (Realtek RTL8181, RTL8186) +# Copyright (C) 2005 Marek Michalkiewicz +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Marek Michalkiewicz , 2005. +# + +register BR 1 +register DIR 32 +register EJIMPCODE 32 +register EJADDRESS 32 +register EJDATA 32 +register EJCONTROL 32 +register EJALL 96 + +instruction length 5 + +instruction BYPASS 11111 BR +instruction IDCODE 00001 DIR +instruction EJTAG_IMPCODE 00011 EJIMPCODE +instruction EJTAG_ADDRESS 01000 EJADDRESS +instruction EJTAG_DATA 01001 EJDATA +instruction EJTAG_CONTROL 01010 EJCONTROL +instruction EJTAG_ALL 01011 EJALL + +initbus ejtag +endian big diff --git a/jtag/doc/README.ejtag b/jtag/doc/README.ejtag new file mode 100644 index 00000000..e4b1e227 --- /dev/null +++ b/jtag/doc/README.ejtag @@ -0,0 +1,57 @@ +This diff files add: +1) EJTAG support. It supply ability to flash almost ALL EJTAG-capable boards (ARM, MIPS). +It is not needed to search BSDL sescriptors. it uses STANDARD path to access flash. +For new CPU it is needed just add data files wich can be authomatically +generated, but jtag-tools originally used this files and auto generation for EJTAG-capable +CPUs is not wroted. Anybody can wrote this code. + +EJTAG driver written by Marek Marek Michalkiewicz , 2005 +under GPL http://www.amelek.gda.pl/rtl8181/jtag/ + +2) data files for very different EJTAG capable MIPS CPUs in file data-add.diff +Realtek RTL8181, RTL8186, Admtek ADM5120, Atheros AR2312, TI AR7, Brecis (PMC-Sierra) MSP2006. +anybody can create files for nes CPUs using this files as template. +Truly say, it is needed to change just +"instruction length" and "endian" strings. +Instruction length can be given by "detect" command: +jtag> detect +IR length: 5 +Chain length: 1 +Device Id: 0001-0000001000000010-00101110000-1 + ^^^^ ^^^^^^^^^^^^^^^^ ^^^^^^^^^^^ +--->>>> step-PARTS -MANUFACTURER + +3) address-support.diff contains support for non-zero flash address. +Different CPUs use different flash addresses. + +Example: TI AR7 (famouse ADSL modems) uses 0x30000000 +another MIPS CPUs uses 0x3fc00000 (standard for MIPS32 boards). +0x1------- is for 8bit access to flash (example: 0x1fc00000) +0x3------- is for 16-bit access to flash (example: 0x3fc00000) +0x5------- is for 32-bit access to flash (example: 0x5fc00000) +length depends on flash. It is possible to try any from this address regions. +Many CPUs map flash to all of this addresses. + +So, for EJTAG non-zero flash address support IS NEEDED. Unfortunetly, ejtag-tools +not maintained by owner and this patch is not implemented more than 2 years. +But, i think, it is not needed to create new sourceforge project. + +For success flashing it is needed to take into attention: +in file /libbrux/flash/amd.c there are strings: + o = 1; /* Heuristic */ +Flash can be connected to board using switch in address. In some cases it is needed +to add 1 to this digit. For example, MSP2006 boards uses amd_flash_autodetect8 +with o = 1. And AR7 uses o = 0. + +4) example of successful flashing using EJTAG: http://forum.openwrt.org/viewtopic.php?id=4191 + +Patch do not conflicts with another patches. +it +1)adds /src/bus/ejtag.c file +2) register this file in /src/bus/buses.c buses.h makefile.am +3) removes one check from /src/tap/parport/ppdev.c +4) change in flash.c is not needed, but can speedup flashing. It just exclude "printf" from cycle. +5) comment two strings in libbrux/flash/detectflash.c +it is not needed +6) add non-zero flash address support to libbrux/flash/jedec.c and amd.c +i wonder why this is not added to CVS tree. This patch was given by different peoples many times.