diff --git a/jtag/ChangeLog b/jtag/ChangeLog
index fe36c7d9..1ec39503 100644
--- a/jtag/ChangeLog
+++ b/jtag/ChangeLog
@@ -1,3 +1,11 @@
+2009-03-05  Arnim Laeuger  <arniml>
+
+  * src/tap/print_queue.c, src/bus/bscoach.c, src/bus/ejtag_dma.c,
+    src/bus/pxa2x0.c, src/bus/zefant-xs3.c, src/bus/jopcyc.c,
+    src/bus/s3c4510x.c, src/bus/ejtag.c: skip operations of *_bus_init()
+    if TAP is not in RUNTEST/IDLE state
+    [ 2658604 ] Errors when part description contains commands accessing TAP
+
 2009-03-04  Arnim Laeuger  <arniml>
 
   * src/bus/mpc5200.c: add additional address decoding to mpc5200 bus driver
diff --git a/jtag/src/bus/bscoach.c b/jtag/src/bus/bscoach.c
index 1517f017..29729190 100644
--- a/jtag/src/bus/bscoach.c
+++ b/jtag/src/bus/bscoach.c
@@ -37,6 +37,7 @@
 #include "jtag.h"
 #include "buses.h"
 #include "generic_bus.h"
+#include "state.h"
 
 
 typedef struct{
@@ -162,7 +163,14 @@ flashbscoach_bus_init( bus_t *bus )
 	chain_t *chain = CHAIN;
 	int i=0;
 
-	
+	if (tap_state(chain) != Run_Test_Idle) {
+		/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+		   this is required to avoid interfering with detect when initbus
+		   is contained in the part description file
+		   bus_init() will be called latest by bus_prepare() */
+		return URJTAG_STATUS_OK;
+	}
+
 
 	part_set_instruction( p, "SAMPLE/PRELOAD" );
 	chain_shift_instructions( chain );
@@ -189,7 +197,7 @@ flashbscoach_bus_init( bus_t *bus )
 
 	INITIALIZED = 1;
 
-	return 0;
+	return URJTAG_STATUS_OK;
 }
 
 
diff --git a/jtag/src/bus/ejtag.c b/jtag/src/bus/ejtag.c
index 49c324fb..369df152 100644
--- a/jtag/src/bus/ejtag.c
+++ b/jtag/src/bus/ejtag.c
@@ -40,6 +40,7 @@
 #include "jtag.h"
 #include "buses.h"
 #include "generic_bus.h"
+#include "state.h"
 
 typedef struct {
 	uint32_t impcode;  /* EJTAG Implementation Register */
@@ -273,6 +274,14 @@ ejtag_bus_init( bus_t *bus )
 		0x3c030000				// lui $3,0
 	};
 
+	if (tap_state(CHAIN) != Run_Test_Idle) {
+		/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+		   this is required to avoid interfering with detect when initbus
+		   is contained in the part description file
+		   bus_init() will be called latest by bus_prepare() */
+		return URJTAG_STATUS_OK;
+	}
+
 	ejctrl = part_find_data_register( PART, "EJCONTROL" );
 	ejimpl = part_find_data_register( PART, "EJIMPCODE" );
 	ejaddr = part_find_data_register( PART, "EJADDRESS" );
diff --git a/jtag/src/bus/ejtag_dma.c b/jtag/src/bus/ejtag_dma.c
index 8313d606..9881dba5 100644
--- a/jtag/src/bus/ejtag_dma.c
+++ b/jtag/src/bus/ejtag_dma.c
@@ -47,6 +47,7 @@
 #include "jtag.h"
 #include "buses.h"
 #include "generic_bus.h"
+#include "state.h"
 
 typedef struct {
 	uint32_t impcode;  /* EJTAG Implementation Register */
@@ -334,6 +335,14 @@ int ejtag_dma_bus_init( bus_t *bus )
 	data_register *ejctrl=NULL, *ejimpl=NULL, *ejaddr=NULL, *ejdata=NULL;
 	int timeout=100;
 
+	if (tap_state(CHAIN) != Run_Test_Idle) {
+		/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+		   this is required to avoid interfering with detect when initbus
+		   is contained in the part description file
+		   bus_init() will be called latest by bus_prepare() */
+		return URJTAG_STATUS_OK;
+	}
+
 	ejctrl = part_find_data_register( PART, "EJCONTROL" );
 	ejimpl = part_find_data_register( PART, "EJIMPCODE" );
 	ejaddr = part_find_data_register( PART, "EJADDRESS" );
diff --git a/jtag/src/bus/jopcyc.c b/jtag/src/bus/jopcyc.c
index 80d9f21c..b7757acb 100644
--- a/jtag/src/bus/jopcyc.c
+++ b/jtag/src/bus/jopcyc.c
@@ -67,6 +67,7 @@
 #include "jtag.h"
 #include "buses.h"
 #include "generic_bus.h"
+#include "state.h"
 
 #define RAM_ADDR_WIDTH 18
 #define RAM_DATA_WIDTH 16
@@ -433,6 +434,14 @@ jopcyc_bus_init( bus_t *bus )
 	chain_t *chain = CHAIN;
 	component_t *comp;
 
+	if (tap_state(chain) != Run_Test_Idle) {
+		/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+		   this is required to avoid interfering with detect when initbus
+		   is contained in the part description file
+		   bus_init() will be called latest by bus_prepare() */
+		return URJTAG_STATUS_OK;
+	}
+
 	/* Preload update registers
 	   See AN039, "Guidelines for IEEE Std. 1149.1 Boundary Scan Testing */
 
diff --git a/jtag/src/bus/pxa2x0.c b/jtag/src/bus/pxa2x0.c
index 4843d93a..a056254e 100644
--- a/jtag/src/bus/pxa2x0.c
+++ b/jtag/src/bus/pxa2x0.c
@@ -42,6 +42,7 @@
 #include "jtag.h"
 #include "buses.h"
 #include "generic_bus.h"
+#include "state.h"
 
 #include "pxa2x0_mc.h"
 
@@ -251,6 +252,14 @@ pxa2xx_bus_init( bus_t *bus )
 	chain_t *chain = CHAIN;
 	part_t *p = PART;
 
+	if (tap_state(chain) != Run_Test_Idle) {
+		/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+		   this is required to avoid interfering with detect when initbus
+		   is contained in the part description file
+		   bus_init() will be called latest by bus_prepare() */
+		return URJTAG_STATUS_OK;
+	}
+
 	part_set_instruction( p, "SAMPLE/PRELOAD" );
 	chain_shift_instructions( chain );
 	chain_shift_data_registers( chain, 1 );
diff --git a/jtag/src/bus/s3c4510x.c b/jtag/src/bus/s3c4510x.c
index 8a7c55e2..99fc43af 100644
--- a/jtag/src/bus/s3c4510x.c
+++ b/jtag/src/bus/s3c4510x.c
@@ -65,6 +65,7 @@
 #include "jtag.h"
 #include "buses.h"
 #include "generic_bus.h"
+#include "state.h"
 
 
 #ifndef DEBUG_LVL2
@@ -188,8 +189,16 @@ s3c4510_bus_printinfo( bus_t *bus )
 static int
 s3c4510_bus_init( bus_t *bus )
 {
-		part_t *p = PART;
-        chain_t *chain = CHAIN;
+	part_t *p = PART;
+	chain_t *chain = CHAIN;
+
+	if (tap_state(chain) != Run_Test_Idle) {
+		/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+		   this is required to avoid interfering with detect when initbus
+		   is contained in the part description file
+		   bus_init() will be called latest by bus_prepare() */
+		return URJTAG_STATUS_OK;
+	}
 
         part_set_instruction( p, "SAMPLE/PRELOAD" );
         chain_shift_instructions( chain );
diff --git a/jtag/src/bus/zefant-xs3.c b/jtag/src/bus/zefant-xs3.c
index 190538ad..9162fa03 100644
--- a/jtag/src/bus/zefant-xs3.c
+++ b/jtag/src/bus/zefant-xs3.c
@@ -67,6 +67,7 @@
 #include "jtag.h"
 #include "buses.h"
 #include "generic_bus.h"
+#include "state.h"
 
 /* EEPROM commands */
 #define EEPROM_CMD_WREN  0x06
@@ -555,8 +556,15 @@ zefant_xs3_bus_init( bus_t *bus )
 	chain_t *chain = CHAIN;
 	component_t *comp;
 
-	/* Preload update registers
-	   See AN039, "Guidelines for IEEE Std. 1149.1 Boundary Scan Testing */
+	if (tap_state(chain) != Run_Test_Idle) {
+		/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+		   this is required to avoid interfering with detect when initbus
+		   is contained in the part description file
+		   bus_init() will be called latest by bus_prepare() */
+		return URJTAG_STATUS_OK;
+	}
+
+	/* Preload update registers */
 
 	part_set_instruction( p, "SAMPLE/PRELOAD" );
 	chain_shift_instructions( chain );