From 96967f5d3a0d0e0dae752c0f32d867fdffe99f36 Mon Sep 17 00:00:00 2001 From: Marcel Telka Date: Fri, 30 May 2003 11:43:40 +0000 Subject: [PATCH] 2003-05-30 Marcel Telka * Makefile.am (nobase_openwinceinc_HEADERS): Added brux/bus.h. * brux/bus.h: New file extracted from include/bus.h from jtag module. git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@452 b68d4a1b-bc3d-0410-92ed-d4ac073336b7 --- include/ChangeLog | 5 ++++ include/Makefile.am | 1 + include/NEWS | 1 + include/brux/bus.h | 63 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 70 insertions(+) create mode 100644 include/brux/bus.h diff --git a/include/ChangeLog b/include/ChangeLog index e8fe5a0e..b8c9b6f0 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2003-05-30 Marcel Telka + + * Makefile.am (nobase_openwinceinc_HEADERS): Added brux/bus.h. + * brux/bus.h: New file extracted from include/bus.h from jtag module. + 2003-04-26 Marcel Telka * arm/pxa2x0/ac97.h: Changed comments for PXA255. Replaced PXA2X0_NOPXA26X with diff --git a/include/Makefile.am b/include/Makefile.am index 747621ad..8e7a0713 100644 --- a/include/Makefile.am +++ b/include/Makefile.am @@ -70,6 +70,7 @@ nobase_openwinceinc_HEADERS = \ arm/pxa2x0/ssp.h \ arm/pxa2x0/uart.h \ arm/pxa2x0/udc.h \ + brux/bus.h \ device/codec/ac97.h \ device/codec/ucb1400.h \ device/flash/28fxxxj.h \ diff --git a/include/NEWS b/include/NEWS index 51a549aa..ecacd4ed 100644 --- a/include/NEWS +++ b/include/NEWS @@ -9,6 +9,7 @@ $Id$ - added CCCR_M_4 multiplier for PXA255 and above - added new register UDCCFR for PXA255 and above * Added ARM System Control Coprocessor Register 1 (Control Register) bits. + * Added brux common headers. include-0.2.3 (2003-04-04): diff --git a/include/brux/bus.h b/include/brux/bus.h new file mode 100644 index 00000000..67a979ad --- /dev/null +++ b/include/brux/bus.h @@ -0,0 +1,63 @@ +/* + * $Id$ + * + * Bus driver interface + * Copyright (C) 2002, 2003 ETC s.r.o. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the ETC s.r.o. nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Written by Marcel Telka , 2002, 2003. + * + */ + +#ifndef BRUX_BUS_H +#define BRUX_BUS_H + +#include + +typedef struct bus bus_t; + +struct bus { + void *params; + void (*prepare)( bus_t *bus ); + int (*width)( bus_t *bus, uint32_t adr ); + void (*read_start)( bus_t *bus, uint32_t adr ); + uint32_t (*read_next)( bus_t *bus, uint32_t adr ); + uint32_t (*read_end)( bus_t *bus ); + uint32_t (*read)( bus_t *bus, uint32_t adr ); + void (*write)( bus_t *bus, uint32_t adr, uint32_t data ); + void (*free)( bus_t *bus ); +}; + +#define bus_prepare(bus) bus->prepare(bus) +#define bus_width(bus,adr) bus->width(bus,adr) +#define bus_read_start(bus,adr) bus->read_start(bus,adr) +#define bus_read_next(bus,adr) bus->read_next(bus,adr) +#define bus_read_end(bus) bus->read_end(bus) +#define bus_read(bus,adr) bus->read(bus,adr) +#define bus_write(bus,adr,data) bus->write(bus,adr,data) +#define bus_free(bus) bus->free(bus) + +#endif /* BRUX_BUS_H */