diff --git a/urjtag/ChangeLog b/urjtag/ChangeLog index ea250a3d..9474f974 100644 --- a/urjtag/ChangeLog +++ b/urjtag/ChangeLog @@ -1,3 +1,9 @@ +2011-06-17 Mike Frysinger + + * data/xilinx/PARTS: Add xilinx xc18v02pc44 parts by Steve Tell. + * data/xilinx/xc18v02pc44/xc18v02pc44, data/xilinx/xc18v02pc44/STEPPINGS: + Add data files for new xilinx parts. + 2011-06-11 Mike Frysinger * src/bus/bf518f_ezbrd.c, src/bus/bf537_stamp.c, src/bus/bf561_ezkit.c, diff --git a/urjtag/THANKS b/urjtag/THANKS index 0c1d6699..abe079e3 100644 --- a/urjtag/THANKS +++ b/urjtag/THANKS @@ -100,6 +100,7 @@ Snowel (snowweihua) Juergen Stuber Hartley Sweeten Marcel Telka +Steve Tell Mike Tesch Ville Voipio David Vrabel diff --git a/urjtag/data/xilinx/PARTS b/urjtag/data/xilinx/PARTS index 94edb539..d6a7bd40 100644 --- a/urjtag/data/xilinx/PARTS +++ b/urjtag/data/xilinx/PARTS @@ -88,6 +88,8 @@ 0000101000011100 xc2s200e-pq208 XC2S200E-PQ208 0001001001111110 xc2vp30-ffg896 XC2VP30-FFG896 0101000000100110 xc18v04pc44 XC18V04_PC44 +0101000000100101 xc18v02pc44 XC18V02_PC44 +0101000000110101 xc18v02pc44 XC18V02_PC44 0001000000010000 xc2v80-fg256 XC2V80-FG256 0001000000011000 xc2v250-fg256 XC2V250-FG256 0001000000101000 xc2v1000-fg256 XC2V1000-FG256 diff --git a/urjtag/data/xilinx/xc18v02pc44/STEPPINGS b/urjtag/data/xilinx/xc18v02pc44/STEPPINGS new file mode 100644 index 00000000..c9ab817e --- /dev/null +++ b/urjtag/data/xilinx/xc18v02pc44/STEPPINGS @@ -0,0 +1,25 @@ +# +# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $ +# +# Copyright (C) 2003 Tower Technologies s.r.l. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. +# +# Written by Alessandro Zummo , 2003. +# DJF:w + +# bits 31-28 of the Device Identification Register +0000 xc18v02pc44 0 diff --git a/urjtag/data/xilinx/xc18v02pc44/xc18v02pc44 b/urjtag/data/xilinx/xc18v02pc44/xc18v02pc44 new file mode 100644 index 00000000..c6d7c05b --- /dev/null +++ b/urjtag/data/xilinx/xc18v02pc44/xc18v02pc44 @@ -0,0 +1,88 @@ +signal CLK +signal D2 +signal Gnd_1 +signal D0 +signal Vcc_2 +signal Vcco_4 +signal Vpp +signal TDO +signal D1 +signal Gnd_4 +signal D3 +signal Vcco_3 +signal D5 +signal CEO +signal D7 +signal Gnd_3 +signal Vcc_1 +signal Vcco_2 +signal CE +signal D6 +signal Reset_OE +signal CF +signal D4 +signal Vcco_1 +signal TCK +signal Gnd_2 +signal TMS +signal TDI +instruction length 8 +register DIR 32 +register USERCODE 32 +register BSR 25 +register BYPASS 1 +register USERCODEV 32 +register ADDRESS 16 +register DATA3 3 +register DATA1 2097152 +register DATA0 4096 +register ISPENABLE 6 +instruction CONFIG 11101110 BYPASS +instruction NORMRST 11110000 BYPASS +instruction FBLANK6 11100100 USERCODEV +instruction FBLANK3 11100001 DATA3 +instruction FBLANK0 11100101 DATA1 +instruction FDATA3 11110011 DATA3 +instruction FDATA0 11101101 DATA0 +instruction SERASE 00001010 ADDRESS +instruction FERASE 11101100 ADDRESS +instruction FVFY6 11100110 USERCODEV +instruction FVFY3 11100010 DATA3 +instruction FVFY1 11111000 DATA1 +instruction FVFY0 11101111 DATA0 +instruction FADDR 11101011 ADDRESS +instruction FPGM 11101010 BYPASS +instruction ISPENC 11101001 ISPENABLE +instruction ISPEN 11101000 ISPENABLE +instruction CLAMP 11111010 BYPASS +instruction HIGHZ 11111100 BYPASS +instruction USERCODE 11111101 DIR +instruction IDCODE 11111110 DIR +instruction EXTEST 00000000 BSR +instruction SAMPLE/PRELOAD 00000001 BSR +instruction BYPASS 11111111 BYPASS +bit 0 I ? CLK +bit 1 C 0 * +bit 2 O ? D2 1 0 Z +bit 3 C 0 * +bit 4 O ? D0 3 0 Z +bit 5 C 0 * +bit 6 O ? D1 5 0 Z +bit 7 C 0 * +bit 8 O ? D3 7 0 Z +bit 9 C 0 * +bit 10 O ? D5 9 0 Z +bit 11 C 0 * +bit 12 O ? CEO 11 0 Z +bit 13 C 0 * +bit 14 O ? D7 13 0 Z +bit 15 I ? CE +bit 16 C 0 * +bit 17 O ? D6 16 0 Z +bit 18 C 0 * +bit 19 O ? Reset_OE 18 0 Z +bit 20 I ? Reset_OE +bit 21 C 0 * +bit 22 O ? CF 21 0 Z +bit 23 C 0 * +bit 24 O ? D4 23 0 Z