bus: fix style in random drivers

git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1956 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Mike Frysinger 14 years ago
parent 2cb4134c84
commit a919e31530

@ -1,3 +1,8 @@
2011-07-04 Mike Frysinger <vapier@gentoo.org>
* src/bus/arm9tdmi.c, src/bus/ejtag_dma.c, src/bus/ixp435.c,
src/bus/mpc837x.c, src/bus/sharc21369_ezkit.c: Fix coding style.
2011-06-30 Mike Frysinger <vapier@gentoo.org>
* include/urjtag/bfin.h (bfin_part_data.emu_oab): Constify.

@ -49,13 +49,13 @@ typedef struct
#define BP ((bus_params_t *) bus->params)
#define ARM9TDMI_ICE_DBGCTL 0x00
#define ARM9TDMI_ICE_DBGSTAT 0x01
#define ARM9TDMI_ICE_DBGCTL 0x00
#define ARM9TDMI_ICE_DBGSTAT 0x01
#define DEBUG_SPEED 0
#define SYSTEM_SPEED 1
#define DEBUG_SPEED 0
#define SYSTEM_SPEED 1
#define ARM_NOP 0xE1A00000
#define ARM_NOP 0xE1A00000
static urj_data_register_t *scann = NULL;
static urj_data_register_t *scan1 = NULL;
@ -69,7 +69,7 @@ static uint32_t _data_read;
*/
static urj_bus_t *
arm9tdmi_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
const urj_param_t *cmd_params[])
const urj_param_t *cmd_params[])
{
return urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
}
@ -103,7 +103,7 @@ arm9tdmi_debug_in_reg(urj_data_register_t *reg)
urj_log(URJ_LOG_LEVEL_ALL, "in :");
for (i = 0; i < reg->in->len; i++)
urj_log(URJ_LOG_LEVEL_ALL, reg->in->data[i]?"1":"0");
urj_log(URJ_LOG_LEVEL_ALL, reg->in->data[i]?"1":"0");
urj_log(URJ_LOG_LEVEL_ALL, "\n");
}
@ -114,7 +114,7 @@ arm9tdmi_debug_out_reg(urj_data_register_t *reg)
urj_log(URJ_LOG_LEVEL_ALL, "out :");
for (i = 0; i < reg->out->len; i++)
urj_log(URJ_LOG_LEVEL_ALL, reg->out->data[i]?"1":"0");
urj_log(URJ_LOG_LEVEL_ALL, reg->out->data[i]?"1":"0");
urj_log(URJ_LOG_LEVEL_ALL, "\n");
}
#endif
@ -125,12 +125,12 @@ arm9tdmi_exec_instruction(urj_bus_t *bus, unsigned int c1_inst, unsigned int c1_
int i;
for (i = 0; i < 32; i++)
scan1->in->data[66-i] = (c1_inst >> i) & 1;
scan1->in->data[66-i] = (c1_inst >> i) & 1;
scan1->in->data[34] = flags;
scan1->in->data[33] = 0;
scan1->in->data[32] = 0;
for (i = 0; i < 32; i++)
scan1->in->data[i] = (c1_data >> i) & 1;
scan1->in->data[i] = (c1_data >> i) & 1;
#if (ARM9DEBUG)
arm9tdmi_debug_in_reg(scan1);
#endif
@ -149,7 +149,7 @@ arm9tdmi_select_scanchain(urj_bus_t *bus, unsigned int chain)
urj_tap_chain_shift_instructions (bus->chain);
for (i = 0; i < scann->in->len; i++)
scann->in->data[i] = (chain >> i) & 1;
scann->in->data[i] = (chain >> i) & 1;
urj_tap_chain_shift_data_registers (bus->chain, 0);
}
@ -159,17 +159,15 @@ arm9tdmi_ice_read(urj_bus_t *bus, unsigned int reg_addr, unsigned int *reg_val)
int i;
for (i = 0; i < 32; i++)
scan2->in->data[i] = 0;
scan2->in->data[i] = 0;
for (i = 0; i < 5; i++)
scan2->in->data[i+32] = (reg_addr >> i) & 1;
scan2->in->data[i+32] = (reg_addr >> i) & 1;
scan2->in->data[37] = 0;
urj_tap_chain_shift_data_registers (bus->chain, 1);
for (i = 0; i < 32; i++)
{
if (scan2->out->data[i])
*reg_val |= (1 << i);
}
if (scan2->out->data[i])
*reg_val |= (1 << i);
}
static void
@ -178,9 +176,9 @@ arm9tdmi_ice_write(urj_bus_t *bus, unsigned int reg_addr, unsigned int reg_val)
int i;
for (i = 0; i < 32; i++)
scan2->in->data[i] = (reg_val >> i) & 1;
scan2->in->data[i] = (reg_val >> i) & 1;
for (i = 0; i < 5; i++)
scan2->in->data[i+32] = (reg_addr >> i) & 1;
scan2->in->data[i+32] = (reg_addr >> i) & 1;
scan2->in->data[37] = 1;
urj_tap_chain_shift_data_registers (bus->chain, 0);
}
@ -220,13 +218,13 @@ arm9tdmi_write(urj_bus_t *bus, unsigned int addr, unsigned int data, unsigned in
arm9tdmi_exec_instruction(bus, c1_inst, c1_data, DEBUG_SPEED);
if (sz == 32)
c1_inst = 0xE5801000; /* STR R1, [R0] */
c1_inst = 0xE5801000; /* STR R1, [R0] */
else if (sz == 16)
c1_inst = 0xE1C010B0; /* STRH R1, [R0] */
c1_inst = 0xE1C010B0; /* STRH R1, [R0] */
else if (sz == 8)
c1_inst = 0xE5C01000; /* STRB R1, [R0] */
c1_inst = 0xE5C01000; /* STRB R1, [R0] */
c1_data = 0;
arm9tdmi_exec_instruction(bus, c1_inst, c1_data, DEBUG_SPEED);
@ -283,13 +281,13 @@ arm9tdmi_read (urj_bus_t *bus, unsigned int addr, unsigned int sz)
arm9tdmi_exec_instruction(bus, c1_inst, c1_data, DEBUG_SPEED);
if (sz == 32)
c1_inst = 0xE5901000; /* LDR R1, [R0] */
c1_inst = 0xE5901000; /* LDR R1, [R0] */
else if (sz == 16)
c1_inst = 0xE1D010B0; /* LDRH R1, [R0] */
c1_inst = 0xE1D010B0; /* LDRH R1, [R0] */
else if (sz == 8)
c1_inst = 0xE5D01000; /* LDRB R1, [R0] */
c1_inst = 0xE5D01000; /* LDRB R1, [R0] */
c1_data = 0;
arm9tdmi_exec_instruction(bus, c1_inst, c1_data, DEBUG_SPEED);
@ -333,8 +331,8 @@ arm9tdmi_read (urj_bus_t *bus, unsigned int addr, unsigned int sz)
result = 0;
for (i = 0; i < 32; i++)
{
if (scan1->out->data[i])
result |= (1 << i);
if (scan1->out->data[i])
result |= (1 << i);
}
arm9tdmi_exec_instruction(bus, c1_inst, c1_data, DEBUG_SPEED);
return result;
@ -402,35 +400,34 @@ arm9tdmi_bus_init (urj_bus_t *bus)
status = 0;
while (i++ < 10) {
urj_part_set_instruction (bus->part, "INTEST2");
urj_tap_chain_shift_instructions (bus->chain);
arm9tdmi_ice_read(bus, ARM9TDMI_ICE_DBGSTAT, &status);
arm9tdmi_ice_read(bus, ARM9TDMI_ICE_DBGSTAT, &status);
if (status & 0x01) {
success = 1;
break;
}
urj_part_set_instruction (bus->part, "RESTART");
urj_tap_chain_shift_instructions (bus->chain);
usleep(100);
if (status & 0x01) {
success = 1;
break;
}
urj_part_set_instruction (bus->part, "RESTART");
urj_tap_chain_shift_instructions (bus->chain);
usleep(100);
}
if (!success)
{
urj_error_set (URJ_ERROR_TIMEOUT,
_("Failed to enter debug mode, ctrl=%s"),
urj_tap_register_get_string (scan2->out));
return URJ_STATUS_FAIL;
_("Failed to enter debug mode, ctrl=%s"),
urj_tap_register_get_string (scan2->out));
return URJ_STATUS_FAIL;
}
arm9tdmi_ice_write(bus, ARM9TDMI_ICE_DBGCTL, 0x00);
urj_log (URJ_LOG_LEVEL_NORMAL, _("The target is halted in "));
if (status & 0x10)
urj_log (URJ_LOG_LEVEL_NORMAL, _("THUMB mode.\n"));
urj_log (URJ_LOG_LEVEL_NORMAL, _("THUMB mode.\n"));
else
urj_log (URJ_LOG_LEVEL_NORMAL, _("ARM mode.\n"));
urj_log (URJ_LOG_LEVEL_NORMAL, _("ARM mode.\n"));
/* select scan chain 1, and use INTEST instruction */
arm9tdmi_select_scanchain(bus, 1);

@ -342,19 +342,19 @@ ejtag_dma_read (urj_bus_t *bus, unsigned int addr, int sz)
switch (sz)
{
case DMA_HALFWORD:
if (addr & 2)
if (addr & 2)
ret = (ret >> 16) & 0xffff;
else
else
ret = ret & 0xffff;
break;
case DMA_BYTE:
if ((addr & 3) == 3)
if ((addr & 3) == 3)
ret = (ret >> 24) & 0xff;
else if ((addr & 3) == 2)
else if ((addr & 3) == 2)
ret = (ret >> 16) & 0xff;
else if ((addr & 3) == 1)
else if ((addr & 3) == 1)
ret = (ret >> 8) & 0xff;
else
else
ret = ret & 0xff;
break;
case DMA_WORD:

@ -46,11 +46,11 @@ typedef struct {
urj_part_signal_t *ex_rd;
} bus_params_t;
#define EX_CS ((bus_params_t *) bus->params)->ex_cs
#define EX_ADDR ((bus_params_t *) bus->params)->ex_addr
#define EX_DATA ((bus_params_t *) bus->params)->ex_data
#define EX_WR ((bus_params_t *) bus->params)->ex_wr
#define EX_RD ((bus_params_t *) bus->params)->ex_rd
#define EX_CS ((bus_params_t *) bus->params)->ex_cs
#define EX_ADDR ((bus_params_t *) bus->params)->ex_addr
#define EX_DATA ((bus_params_t *) bus->params)->ex_data
#define EX_WR ((bus_params_t *) bus->params)->ex_wr
#define EX_RD ((bus_params_t *) bus->params)->ex_rd
/**
* bus->driver->(*new_bus)

@ -38,190 +38,192 @@
#include "buses.h"
#include "generic_bus.h"
#define LBC_NUM_LCS 4
#define LBC_NUM_LWE 4
#define LBC_NUM_LAD 32
#define LBC_NUM_LCS 4
#define LBC_NUM_LWE 4
#define LBC_NUM_LAD 32
typedef struct {
uint32_t last_adr;
urj_part_signal_t *nlcs[LBC_NUM_LCS];
urj_part_signal_t *lad[LBC_NUM_LAD];
urj_part_signal_t *la[LBC_NUM_LAD];
urj_part_signal_t *nlwe[LBC_NUM_LWE];
urj_part_signal_t *nloe;
urj_part_signal_t *ale;
urj_part_signal_t *lbctl;
int lbc_muxed;
int lbc_num_ad;
int lbc_num_d;
uint32_t last_adr;
urj_part_signal_t *nlcs[LBC_NUM_LCS];
urj_part_signal_t *lad[LBC_NUM_LAD];
urj_part_signal_t *la[LBC_NUM_LAD];
urj_part_signal_t *nlwe[LBC_NUM_LWE];
urj_part_signal_t *nloe;
urj_part_signal_t *ale;
urj_part_signal_t *lbctl;
int lbc_muxed;
int lbc_num_ad;
int lbc_num_d;
} bus_params_t;
#define LAST_ADR ((bus_params_t *) bus->params)->last_adr/* Last used address */
#define nCS ((bus_params_t *) bus->params)->nlcs /* Chipselect# */
#define nWE ((bus_params_t *) bus->params)->nlwe /* Write enable# */
#define nOE ((bus_params_t *) bus->params)->nloe /* Output enable# */
#define ALE ((bus_params_t *) bus->params)->ale /* Addres strobe */
#define BCTL ((bus_params_t *) bus->params)->lbctl /* Write /Read# */
#define LAST_ADR ((bus_params_t *) bus->params)->last_adr /* Last used address */
#define nCS ((bus_params_t *) bus->params)->nlcs /* Chipselect# */
#define nWE ((bus_params_t *) bus->params)->nlwe /* Write enable# */
#define nOE ((bus_params_t *) bus->params)->nloe /* Output enable# */
#define ALE ((bus_params_t *) bus->params)->ale /* Addres strobe */
#define BCTL ((bus_params_t *) bus->params)->lbctl /* Write /Read# */
#define LAD ((bus_params_t *) bus->params)->lad /* Addres/Data Bus Mux */
#define LA ((bus_params_t *) bus->params)->la /* Addres Bus nonMux */
#define LAD ((bus_params_t *) bus->params)->lad /* Addres/Data Bus Mux */
#define LA ((bus_params_t *) bus->params)->la /* Addres Bus nonMux */
/**
* bus->driver->(*new_bus)
*
*/
static urj_bus_t *
mpc837x_bus_new( urj_chain_t *chain, const urj_bus_driver_t *driver, const urj_param_t *cmd_params[] )
mpc837x_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
const urj_param_t *cmd_params[])
{
urj_bus_t *bus;
bus_params_t *bp;
urj_part_t *part;
char buff[10];
int i;
int failed = 0;
bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
if (bus == NULL)
return NULL;
part = bus->part;
bp = bus->params;
/* default values */
bp->lbc_muxed = 0;
bp->lbc_num_d = 8;
bp->lbc_num_ad = 25;
for (i = 0; cmd_params[i] != NULL; i++)
{
switch (cmd_params[i]->key)
{
case URJ_BUS_PARAM_KEY_HELP:
urj_bus_generic_free (bus);
urj_log (URJ_LOG_LEVEL_NORMAL,
_("Usage: initbus mpc837x [mux] [width=WIDTH]\n" \
" MUX multiplexed data bus (default no)\n" \
" WIDTH data bus width - 8, 16, 32 (default 8)\n"));
return NULL;
case URJ_BUS_PARAM_KEY_MUX:
bp->lbc_muxed = 1;
break;
case URJ_BUS_PARAM_KEY_WIDTH:
switch (cmd_params[i]->value.lu)
{
case 8:
bp->lbc_num_d = 8;
break;
case 16:
bp->lbc_num_d = 16;
break;
case 32:
bp->lbc_num_d = 32;
break;
default:
urj_error_set (URJ_ERROR_UNSUPPORTED,
_(" Only 8, 16, 32 bus width are suported\n"));
}
break;
default:
urj_bus_generic_free (bus);
urj_error_set (URJ_ERROR_SYNTAX, "unrecognised bus parameter '%s'", \
urj_param_string(&urj_bus_param_list, cmd_params[i]));
return NULL;
}
}
if ((!bp->lbc_muxed) && (bp->lbc_num_d > 16))
{
urj_bus_generic_free (bus);
urj_error_set (URJ_ERROR_UNSUPPORTED,
_(" Only 8 and 16 non multiplexed bus width are suported\n"));
return NULL;
}
if (bp->lbc_muxed)
bp->lbc_num_ad = 32;
/* Get the signals */
if (bp->lbc_muxed)
{
failed |= urj_bus_generic_attach_sig( part, &(ALE), "LALE" );
for (i = 0; i < LBC_NUM_LAD; i++) {
sprintf( buff, "LAD%d", i );
failed |= urj_bus_generic_attach_sig( part, &(LAD[i]), buff );
}
}
else
{
failed |= urj_bus_generic_attach_sig( part, &(LA[7]), "LDP2" );
failed |= urj_bus_generic_attach_sig( part, &(LA[8]), "LDP3" );
failed |= urj_bus_generic_attach_sig( part, &(LA[9]), "LGPL5" );
failed |= urj_bus_generic_attach_sig( part, &(LA[10]), "LALE" );
for (i = 11; i < 27; i++) {
sprintf( buff, "LAD%d", i + 5 );
failed |= urj_bus_generic_attach_sig( part, &(LA[i]), buff );
}
}
for (i = 27; i < LBC_NUM_LAD; i++) {
sprintf( buff, "LA%d", i );
failed |= urj_bus_generic_attach_sig( part, &(LA[i]), buff );
}
for (i = 0; i < LBC_NUM_LCS; i++) {
sprintf( buff, "LCS_B%d", i );
failed |= urj_bus_generic_attach_sig( part, &(nCS[i]), buff );
}
for (i = 0; i < LBC_NUM_LWE; i++) {
sprintf( buff, "LWE_B%d", i );
failed |= urj_bus_generic_attach_sig( part, &(nWE[i]), buff );
}
failed |= urj_bus_generic_attach_sig( part, &(nOE), "LGPL2" );
failed |= urj_bus_generic_attach_sig( part, &(BCTL), "LBCTL" );
if (failed) {
urj_bus_generic_free (bus);
return NULL;
}
urj_log(URJ_LOG_LEVEL_NORMAL,
"%sMUXed %db address, %db data bus\n",
((bp->lbc_muxed) ? "" : "Non-"), bp->lbc_num_ad, bp->lbc_num_d);
return bus;
urj_bus_t *bus;
bus_params_t *bp;
urj_part_t *part;
char buff[10];
int i;
int failed = 0;
bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
if (bus == NULL)
return NULL;
part = bus->part;
bp = bus->params;
/* default values */
bp->lbc_muxed = 0;
bp->lbc_num_d = 8;
bp->lbc_num_ad = 25;
for (i = 0; cmd_params[i] != NULL; i++)
{
switch (cmd_params[i]->key)
{
case URJ_BUS_PARAM_KEY_HELP:
urj_bus_generic_free (bus);
urj_log (URJ_LOG_LEVEL_NORMAL,
_("Usage: initbus mpc837x [mux] [width=WIDTH]\n"
" MUX multiplexed data bus (default no)\n"
" WIDTH data bus width - 8, 16, 32 (default 8)\n"));
return NULL;
case URJ_BUS_PARAM_KEY_MUX:
bp->lbc_muxed = 1;
break;
case URJ_BUS_PARAM_KEY_WIDTH:
switch (cmd_params[i]->value.lu)
{
case 8:
bp->lbc_num_d = 8;
break;
case 16:
bp->lbc_num_d = 16;
break;
case 32:
bp->lbc_num_d = 32;
break;
default:
urj_error_set (URJ_ERROR_UNSUPPORTED,
_(" Only 8, 16, 32 bus width are suported\n"));
}
break;
default:
urj_bus_generic_free (bus);
urj_error_set (URJ_ERROR_SYNTAX, "unrecognised bus parameter '%s'",
urj_param_string (&urj_bus_param_list, cmd_params[i]));
return NULL;
}
}
if (!bp->lbc_muxed && (bp->lbc_num_d > 16))
{
urj_bus_generic_free (bus);
urj_error_set (URJ_ERROR_UNSUPPORTED,
_(" Only 8 and 16 non multiplexed bus width are suported\n"));
return NULL;
}
if (bp->lbc_muxed)
bp->lbc_num_ad = 32;
/* Get the signals */
if (bp->lbc_muxed)
{
failed |= urj_bus_generic_attach_sig (part, &(ALE), "LALE");
for (i = 0; i < LBC_NUM_LAD; i++)
{
sprintf (buff, "LAD%d", i);
failed |= urj_bus_generic_attach_sig (part, &(LAD[i]), buff);
}
}
else
{
failed |= urj_bus_generic_attach_sig (part, &(LA[7]), "LDP2");
failed |= urj_bus_generic_attach_sig (part, &(LA[8]), "LDP3");
failed |= urj_bus_generic_attach_sig (part, &(LA[9]), "LGPL5");
failed |= urj_bus_generic_attach_sig (part, &(LA[10]), "LALE");
for (i = 11; i < 27; i++)
{
sprintf (buff, "LAD%d", i + 5);
failed |= urj_bus_generic_attach_sig (part, &(LA[i]), buff);
}
}
for (i = 27; i < LBC_NUM_LAD; i++)
{
sprintf (buff, "LA%d", i);
failed |= urj_bus_generic_attach_sig (part, &(LA[i]), buff);
}
for (i = 0; i < LBC_NUM_LCS; i++)
{
sprintf (buff, "LCS_B%d", i);
failed |= urj_bus_generic_attach_sig (part, &(nCS[i]), buff);
}
for (i = 0; i < LBC_NUM_LWE; i++)
{
sprintf (buff, "LWE_B%d", i);
failed |= urj_bus_generic_attach_sig (part, &(nWE[i]), buff);
}
failed |= urj_bus_generic_attach_sig (part, &(nOE), "LGPL2");
failed |= urj_bus_generic_attach_sig (part, &(BCTL), "LBCTL");
if (failed)
{
urj_bus_generic_free (bus);
return NULL;
}
urj_log (URJ_LOG_LEVEL_NORMAL,
"%sMUXed %db address, %db data bus\n",
((bp->lbc_muxed) ? "" : "Non-"),
bp->lbc_num_ad, bp->lbc_num_d);
return bus;
}
/**
* bus->driver->(*printinfo)
*
*/
static void
mpc837x_bus_printinfo( urj_log_level_t ll, urj_bus_t *bus )
mpc837x_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
{
int i;
int i;
for (i = 0; i < bus->chain->parts->len; i++)
if (bus->part == bus->chain->parts->parts[i])
break;
urj_log (ll, _("Freescale MPC837X compatible bus driver via BSR (JTAG part No. %d)\n"), i );
for (i = 0; i < bus->chain->parts->len; i++)
if (bus->part == bus->chain->parts->parts[i])
break;
urj_log (ll, _("Freescale MPC837X compatible bus driver via BSR (JTAG part No. %d)\n"), i);
}
/**
* bus->driver->(*area)
*
*/
static int
mpc837x_bus_area( urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area )
mpc837x_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
{
bus_params_t *bp = (bus_params_t *) bus->params;
bus_params_t *bp = bus->params;
area->description = N_("Local Bus Controller");
area->start = UINT32_C(0x00000000);
@ -230,84 +232,76 @@ mpc837x_bus_area( urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area )
return URJ_STATUS_OK;
}
static void
setup_address( urj_bus_t *bus, uint32_t a )
setup_address (urj_bus_t *bus, uint32_t a)
{
bus_params_t *bp = (bus_params_t *) bus->params;
urj_part_t *p = bus->part;
int i;
if (bp->lbc_muxed)
{
for (i = 0; i < bp->lbc_num_ad; i++)
urj_part_set_signal( p, LAD[LBC_NUM_LAD - i - 1], 1, (a >> i) & 1 );
for (i = 0; i < 5; i++)
urj_part_set_signal( p, LA[LBC_NUM_LAD - i - 1], 1, (a >> i) & 1 );
}
else
{
for (i = 0; i < bp->lbc_num_ad; i++)
urj_part_set_signal( p, LA[LBC_NUM_LAD - i - 1], 1, (a >> i) & 1 );
}
bus_params_t *bp = bus->params;
urj_part_t *p = bus->part;
int i;
if (bp->lbc_muxed)
{
for (i = 0; i < bp->lbc_num_ad; i++)
urj_part_set_signal (p, LAD[LBC_NUM_LAD - i - 1], 1, (a >> i) & 1);
for (i = 0; i < 5; i++)
urj_part_set_signal (p, LA[LBC_NUM_LAD - i - 1], 1, (a >> i) & 1);
}
else
{
for (i = 0; i < bp->lbc_num_ad; i++)
urj_part_set_signal (p, LA[LBC_NUM_LAD - i - 1], 1, (a >> i) & 1);
}
}
static void
set_data_in( urj_bus_t *bus, uint32_t adr )
set_data_in (urj_bus_t *bus, uint32_t adr)
{
bus_params_t *bp = (bus_params_t *) bus->params;
urj_part_t *p = bus->part;
urj_bus_area_t area;
int i;
bus_params_t *bp = bus->params;
urj_part_t *p = bus->part;
urj_bus_area_t area;
int i;
mpc837x_bus_area( bus, adr, &area);
if (area.width > bp->lbc_num_d)
return;
for (i = 0; i < area.width; i++)
urj_part_set_signal( p, LAD[bp->lbc_num_d - i - 1], 0, 0 );
mpc837x_bus_area (bus, adr, &area);
if (area.width > bp->lbc_num_d)
return;
for (i = 0; i < area.width; i++)
urj_part_set_signal (p, LAD[bp->lbc_num_d - i - 1], 0, 0);
}
static void
setup_data( urj_bus_t *bus, uint32_t adr, uint32_t d )
setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
{
bus_params_t *bp = (bus_params_t *) bus->params;
urj_part_t *p = bus->part;
urj_bus_area_t area;
int i;
bus_params_t *bp = bus->params;
urj_part_t *p = bus->part;
urj_bus_area_t area;
int i;
mpc837x_bus_area( bus, adr, &area);
if (area.width > bp->lbc_num_d)
return;
mpc837x_bus_area (bus, adr, &area);
if (area.width > bp->lbc_num_d)
return;
for (i = 0; i < area.width; i++)
urj_part_set_signal( p, LAD[bp->lbc_num_d - i - 1], 1, (d >> i) & 1 );
for (i = 0; i < area.width; i++)
urj_part_set_signal (p, LAD[bp->lbc_num_d - i - 1], 1, (d >> i) & 1);
}
static uint32_t
get_data( urj_bus_t *bus, uint32_t adr )
get_data (urj_bus_t *bus, uint32_t adr)
{
bus_params_t *bp = (bus_params_t *) bus->params;
urj_part_t *p = bus->part;
urj_bus_area_t area;
uint32_t d = 0;
int i;
mpc837x_bus_area( bus, adr, &area);
if (area.width > bp->lbc_num_d)
return 0;
for (i = 0; i < area.width; i++) {
d |= (uint32_t) (urj_part_get_signal( p, LAD[bp->lbc_num_d - i - 1] ) << i);
}
return d;
bus_params_t *bp = bus->params;
urj_part_t *p = bus->part;
urj_bus_area_t area;
uint32_t d = 0;
int i;
mpc837x_bus_area (bus, adr, &area);
if (area.width > bp->lbc_num_d)
return 0;
for (i = 0; i < area.width; i++)
d |= (urj_part_get_signal (p, LAD[bp->lbc_num_d - i - 1]) << i);
return d;
}
/**
@ -315,48 +309,45 @@ get_data( urj_bus_t *bus, uint32_t adr )
*
*/
static int
mpc837x_bus_read_start( urj_bus_t *bus, uint32_t adr )
mpc837x_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
bus_params_t *bp = (bus_params_t *) bus->params;
urj_chain_t *chain = bus->chain;
urj_part_t *p = bus->part;
uint8_t cs;
int i;
LAST_ADR = adr;
cs = 0;
for (i = 0; i < LBC_NUM_LCS; i++) {
urj_part_set_signal( p, nCS[i], 1, !(cs==i) );
}
for (i = 0; i < LBC_NUM_LWE; i++) {
urj_part_set_signal( p, nWE[i], 1, 1 );
}
setup_address( bus, adr );
if (bp->lbc_muxed)
{
urj_part_set_signal( p, BCTL,1, 1 ); /* Address Out */
urj_part_set_signal( p, ALE, 1, 1 );
urj_part_set_signal( p, nOE, 1, 1 );
urj_tap_chain_shift_data_registers( chain, 0 );
urj_part_set_signal( p, BCTL,1, 0 ); /* Data In */
urj_part_set_signal( p, ALE, 1, 0 );
urj_part_set_signal( p, nOE, 1, 0 );
}
else
{
urj_part_set_signal( p, BCTL,1, 0 ); /* Data In */
urj_part_set_signal( p, nOE, 1, 0 );
set_data_in( bus, adr );
}
urj_tap_chain_shift_data_registers( chain, 0 );
return URJ_STATUS_OK;
bus_params_t *bp = bus->params;
urj_chain_t *chain = bus->chain;
urj_part_t *p = bus->part;
uint8_t cs;
int i;
LAST_ADR = adr;
cs = 0;
for (i = 0; i < LBC_NUM_LCS; i++)
urj_part_set_signal (p, nCS[i], 1, !(cs == i));
for (i = 0; i < LBC_NUM_LWE; i++)
urj_part_set_signal (p, nWE[i], 1, 1);
setup_address (bus, adr);
if (bp->lbc_muxed)
{
urj_part_set_signal (p, BCTL,1, 1); /* Address Out */
urj_part_set_signal (p, ALE, 1, 1);
urj_part_set_signal (p, nOE, 1, 1);
urj_tap_chain_shift_data_registers (chain, 0);
urj_part_set_signal (p, BCTL,1, 0); /* Data In */
urj_part_set_signal (p, ALE, 1, 0);
urj_part_set_signal (p, nOE, 1, 0);
}
else
{
urj_part_set_signal (p, BCTL,1, 0); /* Data In */
urj_part_set_signal (p, nOE, 1, 0);
set_data_in (bus, adr);
}
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**
@ -364,44 +355,43 @@ mpc837x_bus_read_start( urj_bus_t *bus, uint32_t adr )
*
*/
static uint32_t
mpc837x_bus_read_next( urj_bus_t *bus, uint32_t adr )
mpc837x_bus_read_next (urj_bus_t *bus, uint32_t adr)
{
bus_params_t *bp = (bus_params_t *) bus->params;
urj_chain_t *chain = bus->chain;
urj_part_t *p = bus->part;
uint32_t d;
if (bp->lbc_muxed)
{
set_data_in( bus, adr );
urj_tap_chain_shift_data_registers( chain, 0 );
urj_tap_chain_shift_data_registers( chain, 1 );
d = get_data( bus, LAST_ADR );
setup_address( bus, adr );
LAST_ADR = adr;
urj_part_set_signal( p, BCTL,1, 1 ); /* Address Out */
urj_part_set_signal( p, ALE, 1, 1 );
urj_part_set_signal( p, nOE, 1, 1 );
urj_tap_chain_shift_data_registers( chain, 0 );
urj_part_set_signal( p, BCTL,1, 0 ); /* Data In*/
urj_part_set_signal( p, ALE, 1, 0 );
urj_part_set_signal( p, nOE, 1, 0 );
urj_tap_chain_shift_data_registers( chain, 0 );
}
else
{
setup_address( bus, adr ); /* Data In */
urj_tap_chain_shift_data_registers( chain, 1 );
d = get_data( bus, LAST_ADR );
}
LAST_ADR = adr;
return d;
bus_params_t *bp = bus->params;
urj_chain_t *chain = bus->chain;
urj_part_t *p = bus->part;
uint32_t d;
if (bp->lbc_muxed)
{
set_data_in (bus, adr);
urj_tap_chain_shift_data_registers (chain, 0);
urj_tap_chain_shift_data_registers (chain, 1);
d = get_data (bus, LAST_ADR);
setup_address (bus, adr);
LAST_ADR = adr;
urj_part_set_signal (p, BCTL,1, 1); /* Address Out */
urj_part_set_signal (p, ALE, 1, 1);
urj_part_set_signal (p, nOE, 1, 1);
urj_tap_chain_shift_data_registers (chain, 0);
urj_part_set_signal (p, BCTL,1, 0); /* Data In */
urj_part_set_signal (p, ALE, 1, 0);
urj_part_set_signal (p, nOE, 1, 0);
urj_tap_chain_shift_data_registers (chain, 0);
}
else
{
setup_address (bus, adr); /* Data In */
urj_tap_chain_shift_data_registers (chain, 1);
d = get_data (bus, LAST_ADR);
}
LAST_ADR = adr;
return d;
}
/**
@ -409,31 +399,29 @@ mpc837x_bus_read_next( urj_bus_t *bus, uint32_t adr )
*
*/
static uint32_t
mpc837x_bus_read_end( urj_bus_t *bus )
mpc837x_bus_read_end (urj_bus_t *bus)
{
bus_params_t *bp = (bus_params_t *) bus->params;
urj_chain_t *chain = bus->chain;
urj_part_t *p = bus->part;
int i;
bus_params_t *bp = bus->params;
urj_chain_t *chain = bus->chain;
urj_part_t *p = bus->part;
int i;
if (bp->lbc_muxed)
{
set_data_in (bus, LAST_ADR);
urj_tap_chain_shift_data_registers (chain, 0);
urj_part_set_signal (p, ALE, 1, 1);
}
if (bp->lbc_muxed)
{
set_data_in( bus, LAST_ADR );
urj_tap_chain_shift_data_registers( chain, 0 );
urj_part_set_signal( p, ALE, 1, 1 );
}
for (i = 0; i < LBC_NUM_LCS; i++)
urj_part_set_signal (p, nCS[i], 1, 1);
for (i = 0; i < LBC_NUM_LCS; i++) {
urj_part_set_signal( p, nCS[i], 1, 1 );
}
urj_part_set_signal (p, BCTL,1, 1);
urj_part_set_signal (p, nOE, 1, 1);
urj_part_set_signal( p, BCTL,1, 1 );
urj_part_set_signal( p, nOE, 1, 1 );
urj_tap_chain_shift_data_registers( chain, 1 );
urj_tap_chain_shift_data_registers (chain, 1);
return get_data( bus, LAST_ADR );
return get_data (bus, LAST_ADR);
}
/**
@ -441,85 +429,77 @@ mpc837x_bus_read_end( urj_bus_t *bus )
*
*/
static void
mpc837x_bus_write( urj_bus_t *bus, uint32_t adr, uint32_t data )
mpc837x_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
{
bus_params_t *bp = (bus_params_t *) bus->params;
urj_chain_t *chain = bus->chain;
urj_part_t *p = bus->part;
urj_bus_area_t area;
uint8_t cs;
int i;
mpc837x_bus_area( bus, adr, &area);
if (area.width > bp->lbc_num_d)
return;
cs = 0;
urj_part_set_signal( p, BCTL,1, 1 );
urj_part_set_signal( p, nOE, 1, 1 );
for (i = 0; i < LBC_NUM_LWE; i++) {
urj_part_set_signal( p, nWE[i], 1, 1 );
}
if (bp->lbc_muxed)
{
setup_address( bus, adr );
urj_part_set_signal( p, ALE, 1, 1 );
urj_tap_chain_shift_data_registers( chain, 0 );
urj_part_set_signal( p, ALE, 1, 0 );
urj_tap_chain_shift_data_registers( chain, 0 );
}
else
{
setup_address( bus, adr );
}
for (i = 0; i < LBC_NUM_LCS; i++) {
urj_part_set_signal( p, nCS[i], 1, !(cs==i) );
}
setup_data( bus, adr, data );
urj_tap_chain_shift_data_registers( chain, 0 );
switch (area.width)
{
case 32:
urj_part_set_signal( p, nWE[3], 1, 0 );
urj_part_set_signal( p, nWE[2], 1, 0 );
case 16:
urj_part_set_signal( p, nWE[1], 1, 0 );
case 8:
urj_part_set_signal( p, nWE[0], 1, 0 );
default:
break;
}
urj_tap_chain_shift_data_registers( chain, 0 );
for (i = 0; i < LBC_NUM_LWE; i++) {
urj_part_set_signal( p, nWE[i], 1, 1 );
}
urj_tap_chain_shift_data_registers( chain, 0 );
bus_params_t *bp = bus->params;
urj_chain_t *chain = bus->chain;
urj_part_t *p = bus->part;
urj_bus_area_t area;
uint8_t cs;
int i;
mpc837x_bus_area (bus, adr, &area);
if (area.width > bp->lbc_num_d)
return;
cs = 0;
urj_part_set_signal (p, BCTL,1, 1);
urj_part_set_signal (p, nOE, 1, 1);
for (i = 0; i < LBC_NUM_LWE; i++)
urj_part_set_signal (p, nWE[i], 1, 1);
if (bp->lbc_muxed)
{
setup_address (bus, adr);
urj_part_set_signal (p, ALE, 1, 1);
urj_tap_chain_shift_data_registers (chain, 0);
urj_part_set_signal (p, ALE, 1, 0);
urj_tap_chain_shift_data_registers (chain, 0);
}
else
setup_address (bus, adr);
for (i = 0; i < LBC_NUM_LCS; i++)
urj_part_set_signal (p, nCS[i], 1, !(cs == i));
setup_data (bus, adr, data);
urj_tap_chain_shift_data_registers (chain, 0);
switch (area.width)
{
case 32:
urj_part_set_signal (p, nWE[3], 1, 0);
urj_part_set_signal (p, nWE[2], 1, 0);
case 16:
urj_part_set_signal (p, nWE[1], 1, 0);
case 8:
urj_part_set_signal (p, nWE[0], 1, 0);
default:
break;
}
urj_tap_chain_shift_data_registers (chain, 0);
for (i = 0; i < LBC_NUM_LWE; i++)
urj_part_set_signal (p, nWE[i], 1, 1);
urj_tap_chain_shift_data_registers (chain, 0);
}
const urj_bus_driver_t urj_bus_mpc837x_bus = {
"mpc837x",
N_("Freescale MPC837x compatible bus driver via BSR, parameter: [mux] [width]"),
mpc837x_bus_new,
urj_bus_generic_free,
mpc837x_bus_printinfo,
urj_bus_generic_prepare_extest,
mpc837x_bus_area,
mpc837x_bus_read_start,
mpc837x_bus_read_next,
mpc837x_bus_read_end,
urj_bus_generic_read,
mpc837x_bus_write,
urj_bus_generic_no_init
"mpc837x",
N_("Freescale MPC837x compatible bus driver via BSR, parameter: [mux] [width]"),
mpc837x_bus_new,
urj_bus_generic_free,
mpc837x_bus_printinfo,
urj_bus_generic_prepare_extest,
mpc837x_bus_area,
mpc837x_bus_read_start,
mpc837x_bus_read_next,
mpc837x_bus_read_end,
urj_bus_generic_read,
mpc837x_bus_write,
urj_bus_generic_no_init
};

@ -45,22 +45,22 @@
//no SDRAM access
typedef struct {
uint32_t last_adr;
urj_part_signal_t *addr[24];
urj_part_signal_t *data[32];
urj_part_signal_t *ms0; //boot memory select
urj_part_signal_t *ms1; //boot memory select
urj_part_signal_t *nwe;
urj_part_signal_t *nrd;
uint32_t last_adr;
urj_part_signal_t *addr[24];
urj_part_signal_t *data[32];
urj_part_signal_t *ms0; //boot memory select
urj_part_signal_t *ms1; //boot memory select
urj_part_signal_t *nwe;
urj_part_signal_t *nrd;
} bus_params_t;
#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
#define ADDR ((bus_params_t *) bus->params)->addr
#define DATA ((bus_params_t *) bus->params)->data
#define MS0 ((bus_params_t *) bus->params)->ms0
#define MS1 ((bus_params_t *) bus->params)->ms1
#define nWE ((bus_params_t *) bus->params)->nwe
#define nRD ((bus_params_t *) bus->params)->nrd
#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
#define ADDR ((bus_params_t *) bus->params)->addr
#define DATA ((bus_params_t *) bus->params)->data
#define MS0 ((bus_params_t *) bus->params)->ms0
#define MS1 ((bus_params_t *) bus->params)->ms1
#define nWE ((bus_params_t *) bus->params)->nwe
#define nRD ((bus_params_t *) bus->params)->nrd
/**
* bus->driver->(*new_bus)
@ -68,7 +68,7 @@ typedef struct {
*/
static urj_bus_t *
sharc_21369_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
const urj_param_t *cmd_params[])
const urj_param_t *cmd_params[])
{
urj_bus_t *bus;
urj_part_t *part;
@ -78,17 +78,17 @@ sharc_21369_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
if (bus == NULL)
return NULL;
return NULL;
part = bus->part;
for (i = 0; i < 24; i++) {
sprintf( buff, "ADDR%d", i );
failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
sprintf( buff, "ADDR%d", i );
failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
}
for (i = 0; i < 32; i++) {
sprintf( buff, "DATA%d", i );
failed |= urj_bus_generic_attach_sig( part, &(DATA[i]), buff );
sprintf( buff, "DATA%d", i );
failed |= urj_bus_generic_attach_sig( part, &(DATA[i]), buff );
}
failed |= urj_bus_generic_attach_sig( part, &(MS0), "MS0_B" );
@ -98,8 +98,8 @@ sharc_21369_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
if (failed)
{
urj_bus_generic_free (bus);
return NULL;
urj_bus_generic_free (bus);
return NULL;
}
return bus;
@ -115,10 +115,10 @@ sharc_21369_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus )
int i;
for (i = 0; i < bus->chain->parts->len; i++)
if (bus->part == bus->chain->parts->parts[i])
break;
if (bus->part == bus->chain->parts->parts[i])
break;
urj_log(ll, _("Analog Device's SHARC 21369 compatible bus driver via BSR (JTAG part No. %d)\n"),
i );
i );
}
/**
@ -132,24 +132,24 @@ sharc_21369_ezkit_bus_area ( urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
if (UINT32_C(0x200000) <= adr && adr <= UINT32_C(0x027FFFF))
{
area->description = N_("Boot Memory Select");
area->start = UINT32_C(0x200000);
area->length = UINT64_C(0x080000);
area->width = 8;
area->description = N_("Boot Memory Select");
area->start = UINT32_C(0x200000);
area->length = UINT64_C(0x080000);
area->width = 8;
urj_part_set_signal( p, MS0, 1, 1);
urj_part_set_signal( p, MS1, 1, 0);
urj_part_set_signal( p, MS0, 1, 1);
urj_part_set_signal( p, MS1, 1, 0);
}
else
{
area->description = NULL;
area->start = UINT32_C(0xffffffff);
area->length = UINT64_C(0x080000);
area->width = 0;
area->description = NULL;
area->start = UINT32_C(0xffffffff);
area->length = UINT64_C(0x080000);
area->width = 0;
urj_part_set_signal(p, MS0, 1, 1);
urj_part_set_signal(p, MS1, 1, 1);
urj_part_set_signal(p, MS0, 1, 1);
urj_part_set_signal(p, MS1, 1, 1);
}
return URJ_STATUS_OK;
@ -158,24 +158,24 @@ sharc_21369_ezkit_bus_area ( urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
static void
setup_address (urj_bus_t *bus, uint32_t a)
{
int i;
urj_part_t *p = bus->part;
int i;
urj_part_t *p = bus->part;
for (i = 0; i < 24; i++)
urj_part_set_signal (p, ADDR[i], 1, (a >> i) & 1);
for (i = 0; i < 24; i++)
urj_part_set_signal (p, ADDR[i], 1, (a >> i) & 1);
}
static void
set_data_in(urj_bus_t *bus, uint32_t adr)
{
int i;
urj_part_t *p = bus->part;
urj_bus_area_t area;
int i;
urj_part_t *p = bus->part;
urj_bus_area_t area;
bus->driver->area (bus, adr, &area);
bus->driver->area (bus, adr, &area);
for (i = 0; i < area.width; i++)
urj_part_set_signal( p, DATA[i], 0, 0 );
for (i = 0; i < area.width; i++)
urj_part_set_signal( p, DATA[i], 0, 0 );
}
@ -189,7 +189,7 @@ setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
bus->driver->area (bus, adr, &area);
for (i = 0; i < area.width; i++)
urj_part_set_signal(p, DATA[i], 1, (d >> i) & 1);
urj_part_set_signal(p, DATA[i], 1, (d >> i) & 1);
}
/**
@ -239,7 +239,7 @@ sharc_21369_bus_read_next (urj_bus_t *bus, uint32_t adr )
urj_tap_chain_shift_data_registers( chain, 1 );
for (i = 0; i < area.width; i++)
d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
return d;
}
@ -265,7 +265,7 @@ sharc_21369_bus_read_end( urj_bus_t *bus )
urj_tap_chain_shift_data_registers (chain, 1);
for (i = 0; i < area.width; i++)
d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
return d;
}

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