Make the 2 GPIO cables (ts7800 and (vision_)ep9307) compile again

git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1644 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Rutger Hofman 16 years ago
parent 99f3950ac4
commit b4ae3d63e0

@ -1,3 +1,8 @@
2009-06-05 Rutger Hofman <rfhh>
* src/tap/cable/ts7800.c, src/tap/cable/vision_ep9307.c: make them compile
again
2009-06-04 Arnim Laeuger <arniml>
* src/bsdl/bsdl_flex.l: force Base = DECIMAL for BOUNDARY_LENGTH attribute

@ -62,7 +62,7 @@ cmd_pod_run (urj_chain_t *chain, char *params[])
if (!eq)
{
urj_error_set (URJ_ERROR_SYNTAX,
"parameter format should be 'SIGNAL=#', not '%s'",
"parameter format should be 'SIGNAL=[0|1]', not '%s'",
params[j]);
return URJ_STATUS_FAIL;
}

@ -39,7 +39,7 @@
#include <urjtag/cable.h>
#include <urjtag/chain.h>
#include <urjtag/generic.h>
#include "generic.h"
#include <cmd.h>
@ -105,7 +105,7 @@ ts7800_gpio_open (urj_cable_t *cable)
}
/* Create the pointers to access the GPIO registers */
p->gpio_base = (uint32_t *) p->map_base;
p->gpio_base = p->map_base;
/* Set the GPIO pins as inputs/outputs as needed for the JTAG interface */
p->gpio_base[GPIO_DIR] =
@ -133,7 +133,6 @@ ts7800_gpio_close (urj_cable_t *cable)
static int
ts7800_gpio_write (urj_cable_t *cable, uint8_t data)
{
int sigs;
ts7800_params_t *p = cable->params;
p->gpio_base[GPIO_OUT] = p->lastout = (p->lastout & GPIO_BITMASK) | data;
@ -249,9 +248,8 @@ static int
ts7800_current_signals (urj_cable_t *cable)
{
ts7800_params_t *p = cable->params;
int sigs = p->signals & ~(URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK);
int sigs =
p->signals & ~(URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK);
if (p->lastout & (1 << TCK))
sigs |= URJ_POD_CS_TCK;
if (p->lastout & (1 << TDI))
@ -265,18 +263,16 @@ ts7800_current_signals (urj_cable_t *cable)
static int
ts7800_set_signal (urj_cable_t *cable, int mask, int val)
{
ts7800_params_t *p = cable->params;
int prev_sigs = current_signals (cable);
int prev_sigs = ts7800_current_signals (cable);
mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS); // only these can be modified
if (mask != 0)
{
sigs = (prev_sigs & ~mask) | (val & mask);
tms = (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
tdi = (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
tck = (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
int sigs = (prev_sigs & ~mask) | (val & mask);
int tms = (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
int tdi = (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
int tck = (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
ts7800_gpio_write (cable, tms | tdi | tck);
}
@ -286,9 +282,7 @@ ts7800_set_signal (urj_cable_t *cable, int mask, int val)
static int
ts7800_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig)
{
ts7800_params_t *p = cable->params;
return (current_signals (cable) & sig) ? 1 : 0;
return (ts7800_current_signals (cable) & sig) ? 1 : 0;
}
static void

@ -37,7 +37,7 @@
#include <urjtag/cable.h>
#include <urjtag/chain.h>
#include <urjtag/generic.h>
#include "generic.h"
#include <urjtag/cmd.h>
@ -110,8 +110,8 @@ ep9307_gpio_open (urj_cable_t *cable)
}
/* Create the pointers to access the DeviceCfg and SysSWLock registers */
syscon_devcfg = (uint32_t *) (p->map_base + SYSCON_DEVICE_CONFIG);
syscon_sysswlock = (uint32_t *) (p->map_base + SYSCON_SWLOCK);
syscon_devcfg = (uint32_t *) ((char *) p->map_base + SYSCON_DEVICE_CONFIG);
syscon_sysswlock = (uint32_t *) ((char *) p->map_base + SYSCON_SWLOCK);
/* Set the HonIDE bit in the DeviceCfg register so we can use Port H as GPIO */
tmp = *((uint32_t *) syscon_devcfg);
@ -141,8 +141,8 @@ ep9307_gpio_open (urj_cable_t *cable)
}
/* Create the pointers to access the PHDR and PHDDR registers */
p->gpio_PHDR = (uint32_t *) (p->map_base + GPIO_PHDR);
gpio_PHDDR = (uint32_t *) (p->map_base + GPIO_PHDDR);
p->gpio_PHDR = (uint32_t *) ((char *) p->map_base + GPIO_PHDR);
gpio_PHDDR = (uint32_t *) ((char *) p->map_base + GPIO_PHDDR);
/* Set the GPIO pins as inputs/outputs as needed for the JTAG interface */
tmp = *((uint32_t *) gpio_PHDDR);
@ -173,10 +173,10 @@ ep9307_gpio_write (urj_cable_t *cable, uint8_t data)
ep9307_params_t *p = cable->params;
uint32_t tmp;
tmp = *((uint32_t *) p->gpio_PHDR);
tmp = *p->gpio_PHDR;
tmp &= ~GPIO_OUTPUT_MASK;
tmp |= data;
*((uint32_t *) p->gpio_PHDR) = tmp;
*p->gpio_PHDR = tmp;
p->lastout = tmp;
return 0;
@ -188,7 +188,7 @@ ep9307_gpio_read (urj_cable_t *cable)
ep9307_params_t *p = cable->params;
uint32_t tmp;
tmp = *((uint32_t *) p->gpio_PHDR);
tmp = *p->gpio_PHDR;
return tmp;
}
@ -257,11 +257,13 @@ ep9307_clock (urj_cable_t *cable, int tms, int tdi, int n)
ep9307_params_t *p = cable->params;
int bit_mask;
int i;
int trst;
tms = tms ? 1 : 0;
tdi = tdi ? 1 : 0;
trst = (p->signals & URJ_POD_CS_TRST) ? 1 : 0;
bit_mask = (tms << TMS) | (tdi << TDI) | (p->trst << TRST);
bit_mask = (tms << TMS) | (tdi << TDI) | (trst << TRST);
for (i = 0; i < n; i++)
{
@ -279,8 +281,11 @@ static int
ep9307_get_tdo (urj_cable_t *cable)
{
ep9307_params_t *p = cable->params;
int trst;
ep9307_gpio_write (cable, (0 << TCK) | (p->trst << TRST));
trst = (p->signals & URJ_POD_CS_TRST) ? 1 : 0;
ep9307_gpio_write (cable, (0 << TCK) | (trst << TRST));
urj_tap_cable_wait (cable);
return (ep9307_gpio_read (cable) >> TDO) & 1;
@ -308,11 +313,9 @@ ep9307_current_signals (urj_cable_t *cable)
static int
ep9307_set_signal (urj_cable_t *cable, int mask, int val)
{
ep9307_params_t *p = cable->params;
int prev_sigs = ep9307_current_signals (cable);
int mask &= (URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TRST); // only these can be modified
mask &= (URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TRST); // only these can be modified
if (mask != 0)
{
@ -352,8 +355,8 @@ urj_cable_driver_t urj_tap_cable_ep9307_driver = {
ep9307_clock,
ep9307_get_tdo,
urj_tap_cable_generic_transfer,
ep9307_set_trst,
ep9307_get_trst,
ep9307_set_signal,
ep9307_get_signal,
urj_tap_cable_generic_flush_one_by_one,
ep9307_help
};

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