2003-02-16 Marcel Telka <marcel@telka.sk>
* src/Makefile.am (jtag_SOURCES): Added new flash files with flash driver framework (August Hörandl). * src/flash-amd.c: New file with AMD flash support (August Hörandl). * src/flash-intel.c: New file. Extracted Intel flash support from src/flash.c file (August Hörandl, me). * src/flash.c (set_flash_driver): New function. Added support for flash drivers (August Hörandl). (flashceck): Ditto. (flashmsbin): Added support for flash driver (August Hörandl). (flashmem): Ditto. (flash_erase_block): Function moved to src/flash-intel.c (August Hörandl). (flash_unlock_block): Ditto. (flash_program): Ditto. (flash_erase_block32): Ditto. (flash_unlock_block32): Ditto. (flash_program32): Ditto. * src/flash.h: New file. Interface for flash drivers (August Hörandl). * src/help.c (help): Added list of supported flash drivers for 'flashmem' command (August Hörandl). * src/readmem.c (detectflash): Removed Intel specific code. Enhanced output messages (August Hörandl). git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@356 b68d4a1b-bc3d-0410-92ed-d4ac073336b7master
Marcel Telka
22 years ago
parent
e08ddfcd7d
commit
b7738d12bf
@ -0,0 +1,245 @@
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/*
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* $Id$
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*
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* Flash driver for AMD Am29LV640D, Am29LV641D, Am29LV642D
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* Copyright (C) 2003 AH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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* 02111-1307, USA.
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*
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* Written by August Hörandl <august.hoerandl@gmx.at>
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*
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* Documentation:
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* [1] Advanced Micro Devices, "Am29LV640D/Am29LV641D",
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* September 20, 2002 Rev B, 22366b8.pdf
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* [2] Advanced Micro Devices, "Am29LV642D",
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* August 14, 2001 Rev A, 25022.pdf
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*
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <flash/cfi.h>
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#include <flash/intel.h>
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#include <unistd.h>
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#include "flash.h"
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static int dbg = 0;
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static int amd_flash_erase_block( parts *ps, uint32_t adr );
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static int amd_flash_unlock_block( parts *ps, uint32_t adr );
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static int amd_flash_program( parts *ps, uint32_t adr, uint32_t data );
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static void amd_flash_read_array( parts *ps);
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/* autodetect, we can handle this chip */
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static int
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amd_flash_autodetect( parts *ps, cfi_query_structure_t *cfi )
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{
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return (cfi->identification_string.pri_id_code == CFI_VENDOR_AMD_SCS);
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}
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/*
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* check device status
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* 1/true PASS
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* 0/false FAIL
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*/
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/*
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* first implementation: see [1], page 29
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*/
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static int
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amdstatus29( parts *ps, uint32_t adr, uint32_t data )
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{
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int o = 2;
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int timeout;
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uint32_t dq7mask = ((1 << 7) << 16) + (1 << 7);
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uint32_t dq5mask = ((1 << 5) << 16) + (1 << 5);
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uint32_t bit7 = (data & (1 << 7)) != 0;
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uint32_t data1;
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for (timeout = 0; timeout < 100; timeout++) {
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data1 = bus_read( ps, adr << o );
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data1 = bus_read( ps, adr << o );
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if (dbg)
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printf( "amdstatus %d: %04X (%04X) = %04X\n", timeout, data1, (data1 & dq7mask), bit7 );
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if (((data1 & dq7mask) == dq7mask) == bit7) /* FIXME: This looks non-portable */
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return 1;
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if ((data1 & dq5mask) == dq5mask)
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break;
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usleep( 100 );
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}
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data1 = bus_read( ps, adr << o );
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if (((data1 & dq7mask) == dq7mask) == bit7) /* FIXME: This looks non-portable */
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return 1;
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return 0;
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}
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/*
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* second implementation: see [1], page 30
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*/
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static int
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amdstatus( parts *ps, uint32_t adr, int data )
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{
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int timeout;
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uint32_t togglemask = ((1 << 6) << 16) + (1 << 6); /* DQ 6 */
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/* int dq5mask = ((1 << 5) << 16) + (1 << 5); DQ5 */
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for (timeout = 0; timeout < 100; timeout++) {
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uint32_t data1 = bus_read( ps, adr );
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uint32_t data2 = bus_read( ps, adr );
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/*printf("amdstatus %d: %04X/%04X %04X/%04X \n", */
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/* timeout, data1, data2, (data1 & togglemask), (data2 & togglemask)); */
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if ( (data1 & togglemask) == (data2 & togglemask)) /* no toggle */
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return 1;
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/* if ( (data1 & dq5mask) != 0 ) TODO */
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/* return 0; */
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if (dbg)
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printf( "amdstatus %d: %04X/%04X\n", timeout, data1, data2 );
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else
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printf( "." );
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usleep( 100 );
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}
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return 0;
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}
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static int
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amdisprotected( parts *ps, uint32_t adr )
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{
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uint32_t data;
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int o = 2;
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bus_write( ps, 0x0555 << o, 0x00aa00aa ); /* autoselect p29, sector erase */
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bus_write( ps, 0x02aa << o, 0x00550055 );
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bus_write( ps, 0x0555 << o, 0x00900090 );
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data = bus_read( ps, adr + (0x0002 << 2) );
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/* Read Array */
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amd_flash_read_array( ps ); /* AMD reset */
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return ((data & 0x00ff00ff) != 0);
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}
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static void
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amd_flash_print_info( parts *ps )
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{
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int o = 2;
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int mid, cid, prot;
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bus_write( ps, 0x0555 << o, 0x00aa00aa ); /* autoselect p29 */
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bus_write( ps, 0x02aa << o, 0x00550055 );
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bus_write( ps, 0x0555 << o, 0x00900090 );
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mid = bus_read( ps, 0x00 << o ) & 0xFFFF;
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cid = bus_read( ps, 0x01 << o ) & 0xFFFF;
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prot = bus_read( ps, 0x02 << o ) & 0xFF;
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amd_flash_read_array(ps); /* AMD reset */
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printf( "Chip: AMD Flash\n\tManufacturer: " );
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switch (mid) {
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case 0x0001:
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printf( "AMD" );
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break;
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default:
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printf( "Unknown manufacturer (ID 0x%04x)", mid );
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break;
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}
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printf( "\n\tChip: " );
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switch (cid) {
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case 0x22D7:
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printf( "Am29LV640D/Am29LV641D/Am29LV642D" );
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break;
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default:
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printf ( "Unknown (ID 0x%04x)", cid );
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break;
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}
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printf( "\n\tProtected: %04x\n", prot );
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}
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static int
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amd_flash_erase_block( parts *ps, uint32_t adr )
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{
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int o = 2;
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printf("flash_erase_block 0x%08X\n", adr);
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/* printf("protected: %d\n", amdisprotected(ps, adr)); */
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bus_write( ps, 0x0555 << o, 0x00aa00aa ); /* autoselect p29, sector erase */
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bus_write( ps, 0x02aa << o, 0x00550055 );
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bus_write( ps, 0x0555 << o, 0x00800080 );
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bus_write( ps, 0x0555 << o, 0x00aa00aa );
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bus_write( ps, 0x02aa << o, 0x00550055 );
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bus_write( ps, adr, 0x00300030 );
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if (amdstatus(ps, adr, 0xffff)) {
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printf( "flash_erase_block 0x%08X DONE\n", adr );
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amd_flash_read_array( ps ); /* AMD reset */
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return 0;
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}
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printf( "flash_erase_block 0x%08X FAILED\n", adr );
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/* Read Array */
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amd_flash_read_array( ps ); /* AMD reset */
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return CFI_INTEL_ERROR_UNKNOWN;
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}
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static int
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amd_flash_unlock_block( parts *ps, uint32_t adr )
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{
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printf( "flash_unlock_block 0x%08X IGNORE\n", adr );
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return 0;
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}
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static int
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amd_flash_program( parts *ps, uint32_t adr, uint32_t data )
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{
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int o = 2;
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int status;
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if (dbg)
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printf("\nflash_program 0x%08X = 0x%08X\n", adr, data);
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bus_write( ps, 0x0555 << o, 0x00aa00aa ); /* autoselect p29, program */
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bus_write( ps, 0x02aa << o, 0x00550055 );
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bus_write( ps, 0x0555 << o, 0x00A000A0 );
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bus_write( ps, adr, data );
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status = amdstatus( ps, adr, data );
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/* amd_flash_read_array(ps); */
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return !status;
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}
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static void
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amd_flash_read_array( parts *ps)
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{
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/* Read Array */
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bus_write( ps, 0x0, 0x00F000F0 ); /* AMD reset */
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}
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flash_driver_t amd_32_flash_driver = {
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4, /* buswidth */
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"AMD/Fujitsu Standard Command Set",
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"supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit",
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amd_flash_autodetect,
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amd_flash_print_info,
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amd_flash_erase_block,
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amd_flash_unlock_block,
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amd_flash_program,
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amd_flash_read_array,
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};
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@ -0,0 +1,307 @@
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/*
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* $Id$
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*
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* Copyright (C) 2002 ETC s.r.o.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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* 02111-1307, USA.
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*
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* Written by Marcel Telka <marcel@telka.sk>, 2002.
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* Changed by August Hörandl, 2003
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*
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* Documentation:
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* [1] Advanced Micro Devices, "Common Flash Memory Interface Specification Release 2.0",
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* December 1, 2001
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* [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
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* Developer's Manual", February 2002, Order Number: 278522-001
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* [3] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
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* Application Note 646", April 2000, Order Number: 292204-004
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* [4] Advanced Micro Devices, "Common Flash Memory Interface Publication 100 Vendor & Device
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* ID Code Assignments", December 1, 2001, Volume Number: 96.1
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*
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <flash/cfi.h>
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#include <flash/intel.h>
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#include <std/mic.h>
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#include "flash.h"
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static int intel_flash_erase_block( parts *ps, uint32_t adr );
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static int intel_flash_unlock_block( parts *ps, uint32_t adr );
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static int intel_flash_program( parts *ps, uint32_t adr, uint32_t data );
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static int intel_flash_erase_block32( parts *ps, uint32_t adr );
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static int intel_flash_unlock_block32( parts *ps, uint32_t adr );
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static int intel_flash_program32( parts *ps, uint32_t adr, uint32_t data );
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/* autodetect, we can handle this chip */
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static int
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intel_flash_autodetect32( parts *ps, cfi_query_structure_t *cfi )
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{
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return (cfi->identification_string.pri_id_code == CFI_VENDOR_INTEL_SCS) && (bus_width( ps ) == 32);
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}
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static int
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intel_flash_autodetect( parts *ps, cfi_query_structure_t *cfi )
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{
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return (cfi->identification_string.pri_id_code == CFI_VENDOR_INTEL_SCS) && (bus_width( ps ) == 16);
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}
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static
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void _intel_flash_print_info( parts *ps, int o )
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{
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uint32_t mid, cid;
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mid = (bus_read( ps, 0x00 << o ) & 0xFF);
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switch (mid) {
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case STD_MIC_INTEL:
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printf( "Manufacturer: %s\n", STD_MICN_INTEL );
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break;
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default:
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printf( "Unknown manufacturer (0x%04X)!\n", mid);
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break;
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}
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printf( "Chip: " );
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cid = (bus_read( ps, 0x01 << o ) & 0xFFFF);
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switch (cid) {
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case 0x0016:
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printf( "28F320J3A\n" );
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break;
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case 0x0017:
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printf( "28F640J3A\n" );
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break;
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case 0x0018:
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printf( "28F128J3A\n" );
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break;
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case 0x8801:
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printf( "28F640K3\n" );
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break;
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case 0x8802:
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printf( "28F128K3\n" );
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break;
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case 0x8803:
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printf( "28F256K3\n" );
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break;
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case 0x8805:
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printf( "28F640K18\n" );
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break;
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case 0x8806:
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printf( "28F128K18\n" );
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break;
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case 0x8807:
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printf( "28F256K18\n" );
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break;
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default:
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printf( "Unknown (0x%02X)!\n", cid );
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break;
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}
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/* Read Array */
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bus_write( ps, 0 << o, 0x00FF00FF );
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}
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static
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void intel_flash_print_info( parts *ps )
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{
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int o = 1;
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/* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
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/* TODO */
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/* Clear Status Register */
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bus_write( ps, 0 << o, 0x0050 );
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/* Read Identifier Command */
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bus_write( ps, 0 << 0, 0x0090 );
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_intel_flash_print_info( ps, o );
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}
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static
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void intel_flash_print_info32( parts *ps )
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{
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int o = 2;
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/* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
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/* TODO */
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/* Clear Status Register */
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bus_write( ps, 0 << o, 0x00500050 );
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/* Read Identifier Command */
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bus_write( ps, 0 << 0, 0x00900090 );
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_intel_flash_print_info( ps, o );
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}
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static int
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intel_flash_erase_block( parts *ps, uint32_t adr )
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{
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uint16_t sr;
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bus_write( ps, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
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bus_write( ps, adr, CFI_INTEL_CMD_BLOCK_ERASE );
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bus_write( ps, adr, CFI_INTEL_CMD_CONFIRM );
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while (!((sr = bus_read( ps, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
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switch (sr & ~CFI_INTEL_SR_READY) {
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case 0:
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return 0;
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case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_PROGRAM_ERROR:
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printf("flash: invalid command seq\n");
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return CFI_INTEL_ERROR_INVALID_COMMAND_SEQUENCE;
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case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_VPEN_ERROR:
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printf("flash: low vpen\n");
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return CFI_INTEL_ERROR_LOW_VPEN;
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case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_BLOCK_LOCKED:
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printf("flash: block locked\n");
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return CFI_INTEL_ERROR_BLOCK_LOCKED;
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default:
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break;
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}
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return CFI_INTEL_ERROR_UNKNOWN;
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}
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static int
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intel_flash_unlock_block( parts *ps, uint32_t adr )
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{
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uint16_t sr;
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bus_write( ps, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
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bus_write( ps, adr, CFI_INTEL_CMD_LOCK_SETUP );
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bus_write( ps, adr, CFI_INTEL_CMD_UNLOCK_BLOCK );
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while (!((sr = bus_read( ps, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
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if (sr != CFI_INTEL_SR_READY) {
|
||||
printf("flash: unknown error while unblocking\n");
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_program( parts *ps, uint32_t adr, uint32_t data )
|
||||
{
|
||||
uint16_t sr;
|
||||
|
||||
bus_write( ps, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( ps, adr, CFI_INTEL_CMD_PROGRAM1 );
|
||||
bus_write( ps, adr, data );
|
||||
|
||||
while (!((sr = bus_read( ps, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != CFI_INTEL_SR_READY) {
|
||||
printf("flash: unknown error while programming\n");
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_erase_block32( parts *ps, uint32_t adr )
|
||||
{
|
||||
uint32_t sr;
|
||||
|
||||
bus_write( ps, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( ps, adr, (CFI_INTEL_CMD_BLOCK_ERASE << 16) | CFI_INTEL_CMD_BLOCK_ERASE );
|
||||
bus_write( ps, adr, (CFI_INTEL_CMD_CONFIRM << 16) | CFI_INTEL_CMD_CONFIRM );
|
||||
|
||||
while (((sr = bus_read( ps, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
|
||||
printf( "\nsr = 0x%08X\n", sr );
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_unlock_block32( parts *ps, uint32_t adr )
|
||||
{
|
||||
uint32_t sr;
|
||||
|
||||
bus_write( ps, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( ps, adr, (CFI_INTEL_CMD_LOCK_SETUP << 16) | CFI_INTEL_CMD_LOCK_SETUP );
|
||||
bus_write( ps, adr, (CFI_INTEL_CMD_UNLOCK_BLOCK << 16) | CFI_INTEL_CMD_UNLOCK_BLOCK );
|
||||
|
||||
while (((sr = bus_read( ps, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
|
||||
printf( "\nsr = 0x%08X\n", sr );
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_flash_program32( parts *ps, uint32_t adr, uint32_t data )
|
||||
{
|
||||
uint32_t sr;
|
||||
|
||||
bus_write( ps, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
|
||||
bus_write( ps, adr, (CFI_INTEL_CMD_PROGRAM1 << 16) | CFI_INTEL_CMD_PROGRAM1 );
|
||||
bus_write( ps, adr, data );
|
||||
|
||||
while (((sr = bus_read( ps, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
|
||||
|
||||
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
|
||||
printf( "\nsr = 0x%08X\n", sr );
|
||||
return CFI_INTEL_ERROR_UNKNOWN;
|
||||
} else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
intel_flash_readarray32( parts *ps )
|
||||
{
|
||||
/* Read Array */
|
||||
bus_write( ps, 0, 0x00FF00FF );
|
||||
}
|
||||
|
||||
static void
|
||||
intel_flash_readarray( parts *ps )
|
||||
{
|
||||
/* Read Array */
|
||||
bus_write( ps, 0, 0x00FF00FF );
|
||||
}
|
||||
|
||||
flash_driver_t intel_32_flash_driver = {
|
||||
4, /* buswidth */
|
||||
"Intel Standard Command Set",
|
||||
"supported: 28Fxxxx, 2 x 16 bit",
|
||||
intel_flash_autodetect32,
|
||||
intel_flash_print_info32,
|
||||
intel_flash_erase_block32,
|
||||
intel_flash_unlock_block32,
|
||||
intel_flash_program32,
|
||||
intel_flash_readarray32,
|
||||
};
|
||||
|
||||
flash_driver_t intel_16_flash_driver = {
|
||||
2, /* buswidth */
|
||||
"Intel Standard Command Set",
|
||||
"supported: 28Fxxxx, 1 x 16 bit",
|
||||
intel_flash_autodetect,
|
||||
intel_flash_print_info,
|
||||
intel_flash_erase_block,
|
||||
intel_flash_unlock_block,
|
||||
intel_flash_program,
|
||||
intel_flash_readarray,
|
||||
};
|
||||
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* $Id$
|
||||
*
|
||||
* Flash Memory interface
|
||||
* Copyright (C) 2003 AH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
|
||||
* 02111-1307, USA.
|
||||
*
|
||||
* Written by August Hörandl <august.hoerandl@gmx.at>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef FLASH_H
|
||||
#define FLASH_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "part.h"
|
||||
#include "bus.h"
|
||||
#include <flash/cfi.h>
|
||||
|
||||
/* from cfi.c */
|
||||
cfi_query_structure_t *detect_cfi( parts *ps );
|
||||
|
||||
typedef struct {
|
||||
int buswidth; /* supported bus width, 1/2/4 bytes */
|
||||
const char *name;
|
||||
const char *description;
|
||||
int (*flash_autodetect)( parts *ps, cfi_query_structure_t * );
|
||||
void (*flash_print_info)( parts *ps );
|
||||
int (*flash_erase_block)( parts *ps, uint32_t adr );
|
||||
int (*flash_unlock_block)( parts *ps, uint32_t adr );
|
||||
int (*flash_program)( parts *ps, uint32_t adr, uint32_t data );
|
||||
void (*flash_readarray)( parts *ps );
|
||||
} flash_driver_t;
|
||||
|
||||
extern flash_driver_t *flash_driver;
|
||||
extern flash_driver_t *flash_drivers[];
|
||||
|
||||
/* #define flash_print_info flash_driver->flash_print_info */
|
||||
#define flash_erase_block flash_driver->flash_erase_block
|
||||
#define flash_unlock_block flash_driver->flash_unlock_block
|
||||
#define flash_program flash_driver->flash_program
|
||||
#define flash_readarray flash_driver->flash_readarray
|
||||
|
||||
extern void set_flash_driver( parts *ps, cfi_query_structure_t *cfi );
|
||||
|
||||
#define CFI_INTEL_ERROR_UNKNOWN 1
|
||||
#define CFI_INTEL_ERROR_UNSUPPORTED 2
|
||||
#define CFI_INTEL_ERROR_LOW_VPEN 3
|
||||
#define CFI_INTEL_ERROR_BLOCK_LOCKED 4
|
||||
#define CFI_INTEL_ERROR_INVALID_COMMAND_SEQUENCE 5
|
||||
|
||||
#endif /* FLASH_H */
|
||||
Loading…
Reference in New Issue