2003-01-08 Marcel Telka <marcel@telka.sk>
* include/cable.h: Added cable driver for Xilinx DLC5 JTAG Parallel Cable III. * src/help.c (help): Ditto. * src/jtag.c (main): Ditto. * src/tap/Makefile.am: Ditto. * src/tap/cable/dlc5.c: Ditto. git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@296 b68d4a1b-bc3d-0410-92ed-d4ac073336b7master
Marcel Telka
22 years ago
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/*
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* $Id$
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*
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* Xilinx DLC5 JTAG Parallel Cable III Driver
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* Copyright (C) 2002, 2003 ETC s.r.o.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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* 02111-1307, USA.
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*
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* Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
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*
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* Documentation:
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* [1] Xilinx, Inc., "JTAG Programmer Guide",
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* http://toolbox.xilinx.com/docsan/3_1i/pdf/docs/jtg/jtg.pdf
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*
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*/
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#include <stdio.h>
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#include <sys/io.h>
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#include "cable.h"
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#include "state.h"
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/* see Figure B-1 in [1] */
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/*
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* data D[7:0] (pins 9:2)
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*/
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#define TDI 0
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#define TCK 1
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#define TMS 2
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#define CTRL 3
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#define PROG 4
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/*
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* 7 - BUSY (pin 11)
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* 6 - ACK (pin 10)
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* 5 - PE (pin 12)
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* 4 - SEL (pin 13)
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* 3 - ERROR (pin 15)
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*/
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#define TDO 4
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static unsigned int port;
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static int
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dlc5_init( unsigned int aport )
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{
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tap_state_init();
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port = aport;
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printf( "Initilizing Xilinx DLC5 JTAG Parallel Cable III on parallel port at 0x%x\n", port );
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if (ioperm( port, 2, 1 )) {
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printf( "Error: Initialization failed!\n" );
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return 0;
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}
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return 1;
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}
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static void
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dlc5_done( void )
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{
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ioperm( port, 2, 0 );
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tap_state_done();
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}
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static void
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dlc5_clock( int tms, int tdi )
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{
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tms &= 1;
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tdi &= 1;
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outb( (1 << PROG) | (0 << TCK) | (tms << TMS) | (tdi << TDI), port );
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outb( (1 << PROG) | (1 << TCK) | (tms << TMS) | (tdi << TDI), port );
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tap_state_clock( tms );
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}
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static int
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dlc5_get_tdo( void )
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{
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outb( (1 << PROG) | (0 << TCK), port );
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return ((inb( port + 1 ) ^ 0x80) >> TDO) & 1; /* BUSY is inverted */
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}
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static void
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dlc5_set_trst( int new_trst )
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{
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}
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cable_driver_t dlc5_cable_driver = {
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dlc5_init,
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dlc5_done,
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dlc5_clock,
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dlc5_get_tdo,
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dlc5_set_trst
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};
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