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By hand, rename the bitmask macros because they also occur within strings or comments where they should remain unchanged

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git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1511 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Rutger Hofman 16 years ago
parent 7ecd47c474
commit c488ad4dc2
8 changed files with 274 additions and 270 deletions
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8
urjtag/include/bitmask.h
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@ -55,9 +55,9 @@
#define BITS_ABS(a) (((((a) + MAX_BITS_ABS_VAL) / MAX_BITS_ABS_VAL) * 2 - 1) * (a))
#define BITS_MIN(a,b) (((a) + (b) - BITS_ABS((a) - (b))) / 2)
#define bit(b) (1 << (b))
#define bits(b1,b2) (((2 << BITS_ABS((b1) - (b2))) - 1) << BITS_MIN(b1,b2))
#define bits_val(b1,b2,v) (((v) << BITS_MIN(b1,b2)) & bits(b1,b2))
#define bits_get(b1,b2,v) (((v) & bits(b1,b2)) >> BITS_MIN(b1,b2))
#define URJ_BIT (b) (1 << (b))
#define URJ_BITS (b1,b2) (((2 << BITS_ABS((b1) - (b2))) - 1) << BITS_MIN(b1,b2))
#define URJ_BITS_VAL (b1,b2,v) (((v) << BITS_MIN(b1,b2)) & URJ_BITS (b1,b2))
#define URJ_BITS_GET (b1,b2,v) (((v) & URJ_BITS (b1,b2)) >> BITS_MIN(b1,b2))
#endif /* COMMON_H */

20
urjtag/include/bus_driver.h
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@ -83,15 +83,15 @@ extern bus_t *bus;
#define PART bus->part
#define INITIALIZED bus->initialized
#define bus_printinfo(bus) bus->driver->printinfo(bus)
#define bus_prepare(bus) bus->driver->prepare(bus)
#define bus_area(bus,adr,a) bus->driver->area(bus,adr,a)
#define bus_read_start(bus,adr) bus->driver->read_start(bus,adr)
#define bus_read_next(bus,adr) bus->driver->read_next(bus,adr)
#define bus_read_end(bus) bus->driver->read_end(bus)
#define bus_read(bus,adr) bus->driver->read(bus,adr)
#define bus_write(bus,adr,data) bus->driver->write(bus,adr,data)
#define bus_free(bus) bus->driver->free_bus(bus)
#define bus_init(bus) bus->driver->init(bus)
#define bus_printinfo(bus) (bus)->driver->printinfo(bus)
#define bus_prepare(bus) (bus)->driver->prepare(bus)
#define bus_area(bus,adr,a) (bus)->driver->area(bus,adr,a)
#define bus_read_start(bus,adr) (bus)->driver->read_start(bus,adr)
#define bus_read_next(bus,adr) (bus)->driver->read_next(bus,adr)
#define bus_read_end(bus) (bus)->driver->read_end(bus)
#define bus_read(bus,adr) (bus)->driver->read(bus,adr)
#define bus_write(bus,adr,data) (bus)->driver->write(bus,adr,data)
#define bus_free(bus) (bus)->driver->free_bus(bus)
#define bus_init(bus) (bus)->driver->init(bus)
#endif /* BRUX_BUS_H */

16
urjtag/include/flash/intel.h
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@ -64,14 +64,14 @@
/* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */
#define CFI_INTEL_SR_READY bit(7) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_ERASE_SUSPEND bit(6) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_ERASE_ERROR bit(5) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_PROGRAM_ERROR bit(4) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_VPEN_ERROR bit(3) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_PROGRAM_SUSPEND bit(2) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_BLOCK_LOCKED bit(1) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_BEFP bit(0) /* 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_READY URJ_BIT (7) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_ERASE_SUSPEND URJ_BIT (6) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_ERASE_ERROR URJ_BIT (5) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_PROGRAM_ERROR URJ_BIT (4) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_VPEN_ERROR URJ_BIT (3) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_PROGRAM_SUSPEND URJ_BIT (2) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_BLOCK_LOCKED URJ_BIT (1) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
#define CFI_INTEL_SR_BEFP URJ_BIT (0) /* 28FxxxK3, 28FxxxK18 */
/* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */

16
urjtag/include/tap_state.h
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@ -29,14 +29,14 @@
#include "chain.h"
#define TAPSTAT_DR bit(0)
#define TAPSTAT_IR bit(1)
#define TAPSTAT_SHIFT bit(2) /* register shift with TMS = 0 */
#define TAPSTAT_IDLE bit(3) /* to Run-Test/Idle with TMS = 0 */
#define TAPSTAT_CAPTURE bit(4) /* Capture state */
#define TAPSTAT_UPDATE bit(5) /* to Update with TMS = 1 */
#define TAPSTAT_PAUSE bit(6) /* to Pause with TMS = 0 */
#define TAPSTAT_RESET bit(7) /* Test-Logic-Reset or unknown state */
#define TAPSTAT_DR URJ_BIT (0)
#define TAPSTAT_IR URJ_BIT (1)
#define TAPSTAT_SHIFT URJ_BIT (2) /* register shift with TMS = 0 */
#define TAPSTAT_IDLE URJ_BIT (3) /* to Run-Test/Idle with TMS = 0 */
#define TAPSTAT_CAPTURE URJ_BIT (4) /* Capture state */
#define TAPSTAT_UPDATE URJ_BIT (5) /* to Update with TMS = 1 */
#define TAPSTAT_PAUSE URJ_BIT (6) /* to Pause with TMS = 0 */
#define TAPSTAT_RESET URJ_BIT (7) /* Test-Logic-Reset or unknown state */
#define Unknown_State TAPSTAT_RESET
#define Test_Logic_Reset (TAPSTAT_RESET | TAPSTAT_IDLE)

478
urjtag/src/bus/pxa2x0_mc.h
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@ -147,290 +147,290 @@ typedef volatile struct MC_registers
/* MDCNFG bits - see Table 6-3 in [1] and D25 in [2], Table 6-3 in [3], Table 6-2 in [4] */
#define MDCNFG_DSA1111_2 bit(28)
#define MDCNFG_DLATCH2 bit(27)
#define MDCNFG_DTC2_MASK bits(25,24)
#define MDCNFG_DTC2(x) bits_val(25,24,x)
#define get_MDCNFG_DTC2(x) bits_get(25,24,x)
#define MDCNFG_DNB2 bit(23)
#define MDCNFG_DRAC2_MASK bits(22,21)
#define MDCNFG_DRAC2(x) bits_val(22,21,x)
#define get_MDCNFG_DRAC2(x) bits_get(22,21,x)
#define MDCNFG_DCAC2_MASK bits(20,19)
#define MDCNFG_DCAC2(x) bits_val(20,19,x)
#define get_MDCNFG_DCAC2(x) bits_get(20,19,x)
#define MDCNFG_DWID2 bit(18)
#define MDCNFG_DE3 bit(17)
#define MDCNFG_DE2 bit(16)
#define MDCNFG_DSA1111_0 bit(12)
#define MDCNFG_DLATCH0 bit(11)
#define MDCNFG_DTC0_MASK bits(9,8)
#define MDCNFG_DTC0(x) bits_val(9,8,x)
#define get_MDCNFG_DTC0(x) bits_get(9,8,x)
#define MDCNFG_DNB0 bit(7)
#define MDCNFG_DRAC0_MASK bits(6,5)
#define MDCNFG_DRAC0(x) bits_val(6,5,x)
#define get_MDCNFG_DRAC0(x) bits_get(6,5,x)
#define MDCNFG_DCAC0_MASK bits(4,3)
#define MDCNFG_DCAC0(x) bits_val(4,3,x)
#define get_MDCNFG_DCAC0(x) bits_get(4,3,x)
#define MDCNFG_DWID0 bit(2)
#define MDCNFG_DE1 bit(1)
#define MDCNFG_DE0 bit(0)
#define MDCNFG_DSA1111_2 URJ_BIT (28)
#define MDCNFG_DLATCH2 URJ_BIT (27)
#define MDCNFG_DTC2_MASK URJ_BITS (25,24)
#define MDCNFG_DTC2(x) URJ_BITS_VAL (25,24,x)
#define get_MDCNFG_DTC2(x) URJ_BITS_GET (25,24,x)
#define MDCNFG_DNB2 URJ_BIT (23)
#define MDCNFG_DRAC2_MASK URJ_BITS (22,21)
#define MDCNFG_DRAC2(x) URJ_BITS_VAL (22,21,x)
#define get_MDCNFG_DRAC2(x) URJ_BITS_GET (22,21,x)
#define MDCNFG_DCAC2_MASK URJ_BITS (20,19)
#define MDCNFG_DCAC2(x) URJ_BITS_VAL (20,19,x)
#define get_MDCNFG_DCAC2(x) URJ_BITS_GET (20,19,x)
#define MDCNFG_DWID2 URJ_BIT (18)
#define MDCNFG_DE3 URJ_BIT (17)
#define MDCNFG_DE2 URJ_BIT (16)
#define MDCNFG_DSA1111_0 URJ_BIT (12)
#define MDCNFG_DLATCH0 URJ_BIT (11)
#define MDCNFG_DTC0_MASK URJ_BITS (9,8)
#define MDCNFG_DTC0(x) URJ_BITS_VAL (9,8,x)
#define get_MDCNFG_DTC0(x) URJ_BITS_GET (9,8,x)
#define MDCNFG_DNB0 URJ_BIT (7)
#define MDCNFG_DRAC0_MASK URJ_BITS (6,5)
#define MDCNFG_DRAC0(x) URJ_BITS_VAL (6,5,x)
#define get_MDCNFG_DRAC0(x) URJ_BITS_GET (6,5,x)
#define MDCNFG_DCAC0_MASK URJ_BITS (4,3)
#define MDCNFG_DCAC0(x) URJ_BITS_VAL (4,3,x)
#define get_MDCNFG_DCAC0(x) URJ_BITS_GET (4,3,x)
#define MDCNFG_DWID0 URJ_BIT (2)
#define MDCNFG_DE1 URJ_BIT (1)
#define MDCNFG_DE0 URJ_BIT (0)
/* MDREFR bits - see Table 6-5 in [1], Table 6-6 in [3], Table 6-5 in [4] */
#define MDREFR_K2FREE bit(25)
#define MDREFR_K1FREE bit(24)
#define MDREFR_K0FREE bit(23)
#define MDREFR_SLFRSH bit(22)
#define MDREFR_APD bit(20)
#define MDREFR_K2DB2 bit(19)
#define MDREFR_K2RUN bit(18)
#define MDREFR_K1DB2 bit(17)
#define MDREFR_K1RUN bit(16)
#define MDREFR_E1PIN bit(15)
#define MDREFR_K0DB2 bit(14)
#define MDREFR_K0RUN bit(13)
#define MDREFR_E0PIN bit(12)
#define MDREFR_DRI_MASK bits(11,0)
#define MDREFR_DRI(x) bits_val(11,0,x)
#define get_MDREFR_DRI(x) bits_get(11,0,x)
#define MDREFR_K2FREE URJ_BIT (25)
#define MDREFR_K1FREE URJ_BIT (24)
#define MDREFR_K0FREE URJ_BIT (23)
#define MDREFR_SLFRSH URJ_BIT (22)
#define MDREFR_APD URJ_BIT (20)
#define MDREFR_K2DB2 URJ_BIT (19)
#define MDREFR_K2RUN URJ_BIT (18)
#define MDREFR_K1DB2 URJ_BIT (17)
#define MDREFR_K1RUN URJ_BIT (16)
#define MDREFR_E1PIN URJ_BIT (15)
#define MDREFR_K0DB2 URJ_BIT (14)
#define MDREFR_K0RUN URJ_BIT (13)
#define MDREFR_E0PIN URJ_BIT (12)
#define MDREFR_DRI_MASK URJ_BITS (11,0)
#define MDREFR_DRI(x) URJ_BITS_VAL (11,0,x)
#define get_MDREFR_DRI(x) URJ_BITS_GET (11,0,x)
/* MSC0 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
#define MSC0_RBUFF1 bit(31)
#define MSC0_RRR1_MASK bits(30,28)
#define MSC0_RRR1(x) bits_val(30,28,x)
#define get_MSC0_RRR1(x) bits_get(30,28,x)
#define MSC0_RDN1_MASK bits(27,24)
#define MSC0_RDN1(x) bits_val(27,24,x)
#define get_MSC0_RDN1(x) bits_get(27,24,x)
#define MSC0_RDF1_MASK bits(23,20)
#define MSC0_RDF1(x) bits_val(23,20,x)
#define get_MSC0_RDF1(x) bits_get(23,20,x)
#define MSC0_RBW1 bit(19)
#define MSC0_RT1_MASK bits(18,16)
#define MSC0_RT1(x) bits_val(18,16,x)
#define get_MSC0_RT1(x) bits_get(18,16,x)
#define MSC0_RBUFF0 bit(15)
#define MSC0_RRR0_MASK bits(14,12)
#define MSC0_RRR0(x) bits_val(14,12,x)
#define get_MSC0_RRR0(x) bits_get(14,12,x)
#define MSC0_RDN0_MASK bits(11,9)
#define MSC0_RDN0(x) bits_val(11,8,x)
#define get_MSC0_RDN0(x) bits_get(11,8,x)
#define MSC0_RDF0_MASK bits(7,4)
#define MSC0_RDF0(x) bits_val(7,4,x)
#define get_MSC0_RDF0(x) bits_get(7,4,x)
#define MSC0_RBW0 bit(3)
#define MSC0_RT0_MASK bits(2,0)
#define MSC0_RT0(x) bits_val(2,0,x)
#define get_MSC0_RT0(x) bits_get(2,0,x)
#define MSC0_RBUFF1 URJ_BIT (31)
#define MSC0_RRR1_MASK URJ_BITS (30,28)
#define MSC0_RRR1(x) URJ_BITS_VAL (30,28,x)
#define get_MSC0_RRR1(x) URJ_BITS_GET (30,28,x)
#define MSC0_RDN1_MASK URJ_BITS (27,24)
#define MSC0_RDN1(x) URJ_BITS_VAL (27,24,x)
#define get_MSC0_RDN1(x) URJ_BITS_GET (27,24,x)
#define MSC0_RDF1_MASK URJ_BITS (23,20)
#define MSC0_RDF1(x) URJ_BITS_VAL (23,20,x)
#define get_MSC0_RDF1(x) URJ_BITS_GET (23,20,x)
#define MSC0_RBW1 URJ_BIT (19)
#define MSC0_RT1_MASK URJ_BITS (18,16)
#define MSC0_RT1(x) URJ_BITS_VAL (18,16,x)
#define get_MSC0_RT1(x) URJ_BITS_GET (18,16,x)
#define MSC0_RBUFF0 URJ_BIT (15)
#define MSC0_RRR0_MASK URJ_BITS (14,12)
#define MSC0_RRR0(x) URJ_BITS_VAL (14,12,x)
#define get_MSC0_RRR0(x) URJ_BITS_GET (14,12,x)
#define MSC0_RDN0_MASK URJ_BITS (11,9)
#define MSC0_RDN0(x) URJ_BITS_VAL (11,8,x)
#define get_MSC0_RDN0(x) URJ_BITS_GET (11,8,x)
#define MSC0_RDF0_MASK URJ_BITS (7,4)
#define MSC0_RDF0(x) URJ_BITS_VAL (7,4,x)
#define get_MSC0_RDF0(x) URJ_BITS_GET (7,4,x)
#define MSC0_RBW0 URJ_BIT (3)
#define MSC0_RT0_MASK URJ_BITS (2,0)
#define MSC0_RT0(x) URJ_BITS_VAL (2,0,x)
#define get_MSC0_RT0(x) URJ_BITS_GET (2,0,x)
/* MSC1 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
#define MSC1_RBUFF3 bit(31)
#define MSC1_RRR3_MASK bits(30,28)
#define MSC1_RRR3(x) bits_val(30,28,x)
#define get_MSC1_RRR3(x) bits_get(30,28,x)
#define MSC1_RDN3_MASK bits(27,24)
#define MSC1_RDN3(x) bits_val(27,24,x)
#define get_MSC1_RDN3(x) bits_get(27,24,x)
#define MSC1_RDF3_MASK bits(23,20)
#define MSC1_RDF3(x) bits_val(23,20,x)
#define get_MSC1_RDF3(x) bits_get(23,20,x)
#define MSC1_RBW3 bit(19)
#define MSC1_RT3_MASK bits(18,16)
#define MSC1_RT3(x) bits_val(18,16,x)
#define get_MSC1_RT3(x) bits_get(18,16,x)
#define MSC1_RBUFF2 bit(15)
#define MSC1_RRR2_MASK bits(14,12)
#define MSC1_RRR2(x) bits_val(14,12,x)
#define get_MSC1_RRR2(x) bits_get(14,12,x)
#define MSC1_RDN2_MASK bits(11,9)
#define MSC1_RDN2(x) bits_val(11,8,x)
#define get_MSC1_RDN2(x) bits_get(11,8,x)
#define MSC1_RDF2_MASK bits(7,4)
#define MSC1_RDF2(x) bits_val(7,4,x)
#define get_MSC1_RDF2(x) bits_get(7,4,x)
#define MSC1_RBW2 bit(3)
#define MSC1_RT2_MASK bits(2,0)
#define MSC1_RT2(x) bits_val(2,0,x)
#define get_MSC1_RT2(x) bits_get(2,0,x)
#define MSC1_RBUFF3 URJ_BIT (31)
#define MSC1_RRR3_MASK URJ_BITS (30,28)
#define MSC1_RRR3(x) URJ_BITS_VAL (30,28,x)
#define get_MSC1_RRR3(x) URJ_BITS_GET (30,28,x)
#define MSC1_RDN3_MASK URJ_BITS (27,24)
#define MSC1_RDN3(x) URJ_BITS_VAL (27,24,x)
#define get_MSC1_RDN3(x) URJ_BITS_GET (27,24,x)
#define MSC1_RDF3_MASK URJ_BITS (23,20)
#define MSC1_RDF3(x) URJ_BITS_VAL (23,20,x)
#define get_MSC1_RDF3(x) URJ_BITS_GET (23,20,x)
#define MSC1_RBW3 URJ_BIT (19)
#define MSC1_RT3_MASK URJ_BITS (18,16)
#define MSC1_RT3(x) URJ_BITS_VAL (18,16,x)
#define get_MSC1_RT3(x) URJ_BITS_GET (18,16,x)
#define MSC1_RBUFF2 URJ_BIT (15)
#define MSC1_RRR2_MASK URJ_BITS (14,12)
#define MSC1_RRR2(x) URJ_BITS_VAL (14,12,x)
#define get_MSC1_RRR2(x) URJ_BITS_GET (14,12,x)
#define MSC1_RDN2_MASK URJ_BITS (11,9)
#define MSC1_RDN2(x) URJ_BITS_VAL (11,8,x)
#define get_MSC1_RDN2(x) URJ_BITS_GET (11,8,x)
#define MSC1_RDF2_MASK URJ_BITS (7,4)
#define MSC1_RDF2(x) URJ_BITS_VAL (7,4,x)
#define get_MSC1_RDF2(x) URJ_BITS_GET (7,4,x)
#define MSC1_RBW2 URJ_BIT (3)
#define MSC1_RT2_MASK URJ_BITS (2,0)
#define MSC1_RT2(x) URJ_BITS_VAL (2,0,x)
#define get_MSC1_RT2(x) URJ_BITS_GET (2,0,x)
/* MSC2 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
#define MSC2_RBUFF5 bit(31)
#define MSC2_RRR5_MASK bits(30,28)
#define MSC2_RRR5(x) bits_val(30,28,x)
#define get_MSC2_RRR5(x) bits_get(30,28,x)
#define MSC2_RDN5_MASK bits(27,24)
#define MSC2_RDN5(x) bits_val(27,24,x)
#define get_MSC2_RDN5(x) bits_get(27,24,x)
#define MSC2_RDF5_MASK bits(23,20)
#define MSC2_RDF5(x) bits_val(23,20,x)
#define get_MSC2_RDF5(x) bits_get(23,20,x)
#define MSC2_RBW5 bit(19)
#define MSC2_RT5_MASK bits(18,16)
#define MSC2_RT5(x) bits_val(18,16,x)
#define get_MSC2_RT5(x) bits_get(18,16,x)
#define MSC2_RBUFF4 bit(15)
#define MSC2_RRR4_MASK bits(14,12)
#define MSC2_RRR4(x) bits_val(14,12,x)
#define get_MSC2_RRR4(x) bits_get(14,12,x)
#define MSC2_RDN4_MASK bits(11,9)
#define MSC2_RDN4(x) bits_val(11,8,x)
#define get_MSC2_RDN4(x) bits_get(11,8,x)
#define MSC2_RDF4_MASK bits(7,4)
#define MSC2_RDF4(x) bits_val(7,4,x)
#define get_MSC2_RDF4(x) bits_get(7,4,x)
#define MSC2_RBW4 bit(3)
#define MSC2_RT4_MASK bits(2,0)
#define MSC2_RT4(x) bits_val(2,0,x)
#define get_MSC2_RT4(x) bits_get(2,0,x)
#define MSC2_RBUFF5 URJ_BIT (31)
#define MSC2_RRR5_MASK URJ_BITS (30,28)
#define MSC2_RRR5(x) URJ_BITS_VAL (30,28,x)
#define get_MSC2_RRR5(x) URJ_BITS_GET (30,28,x)
#define MSC2_RDN5_MASK URJ_BITS (27,24)
#define MSC2_RDN5(x) URJ_BITS_VAL (27,24,x)
#define get_MSC2_RDN5(x) URJ_BITS_GET (27,24,x)
#define MSC2_RDF5_MASK URJ_BITS (23,20)
#define MSC2_RDF5(x) URJ_BITS_VAL (23,20,x)
#define get_MSC2_RDF5(x) URJ_BITS_GET (23,20,x)
#define MSC2_RBW5 URJ_BIT (19)
#define MSC2_RT5_MASK URJ_BITS (18,16)
#define MSC2_RT5(x) URJ_BITS_VAL (18,16,x)
#define get_MSC2_RT5(x) URJ_BITS_GET (18,16,x)
#define MSC2_RBUFF4 URJ_BIT (15)
#define MSC2_RRR4_MASK URJ_BITS (14,12)
#define MSC2_RRR4(x) URJ_BITS_VAL (14,12,x)
#define get_MSC2_RRR4(x) URJ_BITS_GET (14,12,x)
#define MSC2_RDN4_MASK URJ_BITS (11,9)
#define MSC2_RDN4(x) URJ_BITS_VAL (11,8,x)
#define get_MSC2_RDN4(x) URJ_BITS_GET (11,8,x)
#define MSC2_RDF4_MASK URJ_BITS (7,4)
#define MSC2_RDF4(x) URJ_BITS_VAL (7,4,x)
#define get_MSC2_RDF4(x) URJ_BITS_GET (7,4,x)
#define MSC2_RBW4 URJ_BIT (3)
#define MSC2_RT4_MASK URJ_BITS (2,0)
#define MSC2_RT4(x) URJ_BITS_VAL (2,0,x)
#define get_MSC2_RT4(x) URJ_BITS_GET (2,0,x)
/* MECR bits - see Table 6-27 in [1], Table 6-31 in [3], Table 6-27 in [4] */
#define MECR_CIT bit(1)
#define MECR_NOS bit(0)
#define MECR_CIT URJ_BIT (1)
#define MECR_NOS URJ_BIT (0)
/* SXCNFG bits - see Table 6-13 in [1], Table 6-14 in [3], Table 6-13 in [4] */
#define SXCNFG_SXLATCH2 bit(30)
#define SXCNFG_SXTP2_MASK bits(29,28)
#define SXCNFG_SXTP2(x) bits_val(29,28,x)
#define get_SXCNFG_SXTP2(x) bits_get(29,28,x)
#define SXCNFG_SXCA2_MASK bits(27,26)
#define SXCNFG_SXCA2(x) bits_val(27,26,x)
#define get_SXCNFG_SXCA2(x) bits_get(27,26,x)
#define SXCNFG_SXRA2_MASK bits(25,24)
#define SXCNFG_SXRA2(x) bits_val(25,24,x)
#define get_SXCNFG_SXRA2(x) bits_get(25,24,x)
#define SXCNFG_SXRL2_MASK bits(23,21)
#define SXCNFG_SXRL2(x) bits(23,21,x)
#define SXCNFG_SXCL2_MASK bits(20,18)
#define SXCNFG_SXCL2(x) bits_val(20,18,x)
#define get_SXCNFG_SXCL2(x) bits_get(20,18,x)
#define SXCNFG_SXEN2_MASK bits(17,16)
#define SXCNFG_SXEN2(x) bits_val(17,16,x)
#define get_SXCNFG_SXEN2(x) bits_get(17,16,x)
#define SXCNFG_SXLATCH0 bit(14)
#define SXCNFG_SXTP0_MASK bits(13,12)
#define SXCNFG_SXTP0(x) bits_val(13,12,x)
#define get_SXCNFG_SXTP0(x) bits_get(13,12,x)
#define SXCNFG_SXCA0_MASK bits(11,10)
#define SXCNFG_SXCA0(x) bits_val(11,10,x)
#define get_SXCNFG_SXCA0(x) bits_get(11,10,x)
#define SXCNFG_SXRA0_MASK bits(9,8)
#define SXCNFG_SXRA0(x) bits_val(9,8,x)
#define get_SXCNFG_SXRA0(x) bits_get(9,8,x)
#define SXCNFG_SXRL0_MASK bits(7,5)
#define SXCNFG_SXRL0(x) bits(7,5,x)
#define SXCNFG_SXCL0_MASK bits(4,2)
#define SXCNFG_SXCL0(x) bits_val(4,2,x)
#define get_SXCNFG_SXCL0(x) bits_get(4,2,x)
#define SXCNFG_SXEN0_MASK bits(1,0)
#define SXCNFG_SXEN0(x) bits_val(1,0,x)
#define get_SXCNFG_SXEN0(x) bits_get(1,0,x)
#define SXCNFG_SXLATCH2 URJ_BIT (30)
#define SXCNFG_SXTP2_MASK URJ_BITS (29,28)
#define SXCNFG_SXTP2(x) URJ_BITS_VAL (29,28,x)
#define get_SXCNFG_SXTP2(x) URJ_BITS_GET (29,28,x)
#define SXCNFG_SXCA2_MASK URJ_BITS (27,26)
#define SXCNFG_SXCA2(x) URJ_BITS_VAL (27,26,x)
#define get_SXCNFG_SXCA2(x) URJ_BITS_GET (27,26,x)
#define SXCNFG_SXRA2_MASK URJ_BITS (25,24)
#define SXCNFG_SXRA2(x) URJ_BITS_VAL (25,24,x)
#define get_SXCNFG_SXRA2(x) URJ_BITS_GET (25,24,x)
#define SXCNFG_SXRL2_MASK URJ_BITS (23,21)
#define SXCNFG_SXRL2(x) URJ_BITS (23,21,x)
#define SXCNFG_SXCL2_MASK URJ_BITS (20,18)
#define SXCNFG_SXCL2(x) URJ_BITS_VAL (20,18,x)
#define get_SXCNFG_SXCL2(x) URJ_BITS_GET (20,18,x)
#define SXCNFG_SXEN2_MASK URJ_BITS (17,16)
#define SXCNFG_SXEN2(x) URJ_BITS_VAL (17,16,x)
#define get_SXCNFG_SXEN2(x) URJ_BITS_GET (17,16,x)
#define SXCNFG_SXLATCH0 URJ_BIT (14)
#define SXCNFG_SXTP0_MASK URJ_BITS (13,12)
#define SXCNFG_SXTP0(x) URJ_BITS_VAL (13,12,x)
#define get_SXCNFG_SXTP0(x) URJ_BITS_GET (13,12,x)
#define SXCNFG_SXCA0_MASK URJ_BITS (11,10)
#define SXCNFG_SXCA0(x) URJ_BITS_VAL (11,10,x)
#define get_SXCNFG_SXCA0(x) URJ_BITS_GET (11,10,x)
#define SXCNFG_SXRA0_MASK URJ_BITS (9,8)
#define SXCNFG_SXRA0(x) URJ_BITS_VAL (9,8,x)
#define get_SXCNFG_SXRA0(x) URJ_BITS_GET (9,8,x)
#define SXCNFG_SXRL0_MASK URJ_BITS (7,5)
#define SXCNFG_SXRL0(x) URJ_BITS (7,5,x)
#define SXCNFG_SXCL0_MASK URJ_BITS (4,2)
#define SXCNFG_SXCL0(x) URJ_BITS_VAL (4,2,x)
#define get_SXCNFG_SXCL0(x) URJ_BITS_GET (4,2,x)
#define SXCNFG_SXEN0_MASK URJ_BITS (1,0)
#define SXCNFG_SXEN0(x) URJ_BITS_VAL (1,0,x)
#define get_SXCNFG_SXEN0(x) URJ_BITS_GET (1,0,x)
/* SXMRS bits - see Table 6-16 in [1], Table 6-17 in [3], Table 6-16 in [4] */
#define SXMRS_SXMRS2_MASK bits(30,16)
#define SXMRS_SXMRS2(x) bits_val(30,16,x)
#define get_SXMRS_SXMRS2(x) bits_get(30,16,x)
#define SXMRS_SXMRS0_MASK bits(14,0)
#define SXMRS_SXMRS0(x) bits_val(14,0,x)
#define get_SXMRS_SXMRS0(x) bits_get(14,0,x)
#define SXMRS_SXMRS2_MASK URJ_BITS (30,16)
#define SXMRS_SXMRS2(x) URJ_BITS_VAL (30,16,x)
#define get_SXMRS_SXMRS2(x) URJ_BITS_GET (30,16,x)
#define SXMRS_SXMRS0_MASK URJ_BITS (14,0)
#define SXMRS_SXMRS0(x) URJ_BITS_VAL (14,0,x)
#define get_SXMRS_SXMRS0(x) URJ_BITS_GET (14,0,x)
/* MCMEMx bits - see Table 6-23 in [1], Table 6-27 in [3], Table 6-23 in [4] */
#define MCMEM_HOLD_MASK bits(19,14)
#define MCMEM_HOLD(x) bits_val(19,14,x)
#define get_MCMEM_HOLD(x) bits_get(19,14,x)
#define MCMEM_ASST_MASK bits(11,7)
#define MCMEM_ASST(x) bits_val(11,7,x)
#define get_MCMEM_ASST(x) bits_get(11,7,x)
#define MCMEM_SET_MASK bits(6,0)
#define MCMEM_SET(x) bits_val(6,0,x)
#define get_MCMEM_SET(x) bits_get(6,0,x)
#define MCMEM_HOLD_MASK URJ_BITS (19,14)
#define MCMEM_HOLD(x) URJ_BITS_VAL (19,14,x)
#define get_MCMEM_HOLD(x) URJ_BITS_GET (19,14,x)
#define MCMEM_ASST_MASK URJ_BITS (11,7)
#define MCMEM_ASST(x) URJ_BITS_VAL (11,7,x)
#define get_MCMEM_ASST(x) URJ_BITS_GET (11,7,x)
#define MCMEM_SET_MASK URJ_BITS (6,0)
#define MCMEM_SET(x) URJ_BITS_VAL (6,0,x)
#define get_MCMEM_SET(x) URJ_BITS_GET (6,0,x)
/* MCATTx bits - see Table 6-24 in [1], Table 6-28 in [3], Table 6-24 in [4] */
#define MCATT_HOLD_MASK bits(19,14)
#define MCATT_HOLD(x) bits_val(19,14,x)
#define get_MCATT_HOLD(x) bits_get(19,14,x)
#define MCATT_ASST_MASK bits(11,7)
#define MCATT_ASST(x) bits_val(11,7,x)
#define get_MCATT_ASST(x) bits_get(11,7,x)
#define MCATT_SET_MASK bits(6,0)
#define MCATT_SET(x) bits_val(6,0,x)
#define get_MCATT_SET(x) bits_get(6,0,x)
#define MCATT_HOLD_MASK URJ_BITS (19,14)
#define MCATT_HOLD(x) URJ_BITS_VAL (19,14,x)
#define get_MCATT_HOLD(x) URJ_BITS_GET (19,14,x)
#define MCATT_ASST_MASK URJ_BITS (11,7)
#define MCATT_ASST(x) URJ_BITS_VAL (11,7,x)
#define get_MCATT_ASST(x) URJ_BITS_GET (11,7,x)
#define MCATT_SET_MASK URJ_BITS (6,0)
#define MCATT_SET(x) URJ_BITS_VAL (6,0,x)
#define get_MCATT_SET(x) URJ_BITS_GET (6,0,x)
/* MCIOx bits - see Table 6-25 in [1], Table 6-29 in [3], Table 6-25 in [4] */
#define MCIO_HOLD_MASK bits(19,14)
#define MCIO_HOLD(x) bits_val(19,14,x)
#define get_MCIO_HOLD(x) bits_get(19,14,x)
#define MCIO_ASST_MASK bits(11,7)
#define MCIO_ASST(x) bits_val(11,7,x)
#define get_MCIO_ASST(x) bits_get(11,7,x)
#define MCIO_SET_MASK bits(6,0)
#define MCIO_SET(x) bits_val(6,0,x)
#define get_MCIO_SET(x) bits_get(6,0,x)
#define MCIO_HOLD_MASK URJ_BITS (19,14)
#define MCIO_HOLD(x) URJ_BITS_VAL (19,14,x)
#define get_MCIO_HOLD(x) URJ_BITS_GET (19,14,x)
#define MCIO_ASST_MASK URJ_BITS (11,7)
#define MCIO_ASST(x) URJ_BITS_VAL (11,7,x)
#define get_MCIO_ASST(x) URJ_BITS_GET (11,7,x)
#define MCIO_SET_MASK URJ_BITS (6,0)
#define MCIO_SET(x) URJ_BITS_VAL (6,0,x)
#define get_MCIO_SET(x) URJ_BITS_GET (6,0,x)
/* MDMRS bits - see Table 6-4 in [1], Table 6-4 in [3], Table 6-3 in [4] */
#define MDMRS_MDMRS2_MASK bits(30,23)
#define MDMRS_MDMRS2(x) bits_val(30,23,x)
#define get_MDMRS_MDMRS2(x) bits_get(30,23,x)
#define MDMRS_MDCL2_MASK bits(22,20)
#define MDMRS_MDCL2(x) bits_val(22,20,x)
#define get_MDMRS_MDCL2(x) bits_get(22,20,x)
#define MDMRS_MDADD2 bit(19)
#define MDMRS_MDBL2_MASK bits(18,16)
#define MDMRS_MDBL2(x) bits_val(18,16,x)
#define get_MDMRS_MDBL2(x) bits_get(18,16,x)
#define MDMRS_MDMRS0_MASK bits(14,7)
#define MDMRS_MDMRS0(x) bits_val(14,7,x)
#define get_MDMRS_MDMRS0(x) bits_get(14,7,x)
#define MDMRS_MDCL0_MASK bits(6,4)
#define MDMRS_MDCL0(x) bits_val(6,4,x)
#define get_MDMRS_MDCL0(x) bits_get(6,4,x)
#define MDMRS_MDADD0 bit(3)
#define MDMRS_MDBL0_MASK bits(2,0)
#define MDMRS_MDBL0(x) bits_val(2,0,x)
#define get_MDMRS_MDBL0(x) bits_get(2,0,x)
#define MDMRS_MDMRS2_MASK URJ_BITS (30,23)
#define MDMRS_MDMRS2(x) URJ_BITS_VAL (30,23,x)
#define get_MDMRS_MDMRS2(x) URJ_BITS_GET (30,23,x)
#define MDMRS_MDCL2_MASK URJ_BITS (22,20)
#define MDMRS_MDCL2(x) URJ_BITS_VAL (22,20,x)
#define get_MDMRS_MDCL2(x) URJ_BITS_GET (22,20,x)
#define MDMRS_MDADD2 URJ_BIT (19)
#define MDMRS_MDBL2_MASK URJ_BITS (18,16)
#define MDMRS_MDBL2(x) URJ_BITS_VAL (18,16,x)
#define get_MDMRS_MDBL2(x) URJ_BITS_GET (18,16,x)
#define MDMRS_MDMRS0_MASK URJ_BITS (14,7)
#define MDMRS_MDMRS0(x) URJ_BITS_VAL (14,7,x)
#define get_MDMRS_MDMRS0(x) URJ_BITS_GET (14,7,x)
#define MDMRS_MDCL0_MASK URJ_BITS (6,4)
#define MDMRS_MDCL0(x) URJ_BITS_VAL (6,4,x)
#define get_MDMRS_MDCL0(x) URJ_BITS_GET (6,4,x)
#define MDMRS_MDADD0 URJ_BIT (3)
#define MDMRS_MDBL0_MASK URJ_BITS (2,0)
#define MDMRS_MDBL0(x) URJ_BITS_VAL (2,0,x)
#define get_MDMRS_MDBL0(x) URJ_BITS_GET (2,0,x)
/* BOOT_DEF bits - see Table 6-37 in [1], Table 6-40 in [3], Table 6-37 in [4] */
#define BOOT_DEF_PKG_TYPE bit(3)
#define BOOT_DEF_BOOT_SEL_MASK bits(2,0)
#define BOOT_DEF_BOOT_SEL(x) bits_val(2,0,x)
#define get_BOOT_DEF_BOOT_SEL(x) bits_get(2,0,x)
#define BOOT_DEF_PKG_TYPE URJ_BIT (3)
#define BOOT_DEF_BOOT_SEL_MASK URJ_BITS (2,0)
#define BOOT_DEF_BOOT_SEL(x) URJ_BITS_VAL (2,0,x)
#define get_BOOT_DEF_BOOT_SEL(x) URJ_BITS_GET (2,0,x)
#if !defined(PXA2X0_NOPXA255)
/* MDMRSLP bits - see Table 6-5 in [3], Table 6-4 in [4] */
#define MDMRSLP_MDLPEN2 bit(31)
#define MDMRSLP_MDMRSLP2_MASK bits(30,16)
#define MDMRSLP_MDMRSLP2(x) bits_val(30,16,x)
#define get_MDMRSLP_MDMRSLP2(x) bits_get(30,16,x)
#define MDMRSLP_MDLPEN0 bit(15)
#define MDMRSLP_MDMRSLP0_MASK bits(14,0)
#define MDMRSLP_MDMRSLP0(x) bits_val(14,0,x)
#define get_MDMRSLP_MDMRSLP0(x) bits_get(14,0,x)
#define MDMRSLP_MDLPEN2 URJ_BIT (31)
#define MDMRSLP_MDMRSLP2_MASK URJ_BITS (30,16)
#define MDMRSLP_MDMRSLP2(x) URJ_BITS_VAL (30,16,x)
#define get_MDMRSLP_MDMRSLP2(x) URJ_BITS_GET (30,16,x)
#define MDMRSLP_MDLPEN0 URJ_BIT (15)
#define MDMRSLP_MDMRSLP0_MASK URJ_BITS (14,0)
#define MDMRSLP_MDMRSLP0(x) URJ_BITS_VAL (14,0,x)
#define get_MDMRSLP_MDMRSLP0(x) URJ_BITS_GET (14,0,x)
#endif /* PXA255 and above only */
#if !defined(PXA2X0_NOPXA260)
/* SA1111CR bits - see Table 6-24 in [3] */
#define SA1111CR_SA1111_5 bit(5)
#define SA1111CR_SA1111_4 bit(4)
#define SA1111CR_SA1111_3 bit(3)
#define SA1111CR_SA1111_2 bit(2)
#define SA1111CR_SA1111_1 bit(1)
#define SA1111CR_SA1111_0 bit(0)
#define SA1111CR_SA1111_5 URJ_BIT (5)
#define SA1111CR_SA1111_4 URJ_BIT (4)
#define SA1111CR_SA1111_3 URJ_BIT (3)
#define SA1111CR_SA1111_2 URJ_BIT (2)
#define SA1111CR_SA1111_1 URJ_BIT (1)
#define SA1111CR_SA1111_0 URJ_BIT (0)
#endif /* PXA260 and above only */
#endif /* PXA2X0_MC_H */

2
urjtag/src/bus/readmem.c
Unescape Escape View File

@ -32,9 +32,11 @@
#include <stdint.h>
#include <string.h>
#ifdef UNUSED /* RFHH */
#include <flash/cfi.h>
#include <flash/intel.h>
#include <flash/mic.h>
#endif
#include "bus.h"
#include "flash.h"

2
urjtag/src/bus/writemem.c
Unescape Escape View File

@ -25,9 +25,11 @@
#include <stdint.h>
#include <string.h>
#ifdef UNUSED /* RFHH */
#include <flash/cfi.h>
#include <flash/intel.h>
#include <flash/mic.h>
#endif
#include "bus.h"
#include "flash.h"

2
urjtag/src/flash/jedec_exp.c
Unescape Escape View File

@ -110,7 +110,7 @@ jedec_exp_detect (bus_t *bus, uint32_t adr, cfi_array_t **cfi_array)
{
int det_addroffset;
uint32_t dmask =
bits (det_dataoffset, det_datawidth + det_dataoffset - 1);
URJ_BITS (det_dataoffset, det_datawidth + det_dataoffset - 1);
uint32_t pata = ~dmask | (0xAA << det_dataoffset);
uint32_t patb = ~dmask | (0x55 << det_dataoffset);
uint32_t dcmd = ~dmask | (0x90 << det_dataoffset);

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