bf548: bring port signal names in line with other blackfin parts

git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1846 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Mike Frysinger 14 years ago
parent dc7a1e256b
commit c6d6ee48a6

@ -4,6 +4,10 @@
the style of all other Blackfin parts.
* src/bus/bf533_stamp.c (bf533_stamp_bus_new): Update signal names.
* data/analog/bf548/bf548: Change "PORTX_#" to "PX#" signals to match the
style of all other Blackfin parts.
* src/bus/bf548_ezkit.c (bf548_ezkit_bus_new): Update signal names.
2010-08-30 Mike Frysinger <vapier@gentoo.org>
* configure.ac: Clean up libusb detection to prefer 1.0 over 0.1, and accept

File diff suppressed because it is too large Load Diff

@ -90,13 +90,13 @@ bf548_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
for (i = 3; i < 9; i++)
{
sprintf (buff, "PORTH_%d", i + 5);
sprintf (buff, "PH%d", i + 5);
failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
}
for (i = 9; i < 24; i++)
{
sprintf (buff, "PORTI_%d", i - 9);
sprintf (buff, "PI%d", i - 9);
failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
}
@ -114,7 +114,7 @@ bf548_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
failed |= urj_bus_generic_attach_sig (part, &(DCS0), "CS0_B");
failed |= urj_bus_generic_attach_sig (part, &(NCE), "PORTJ_1");
failed |= urj_bus_generic_attach_sig (part, &(NCE), "PJ1");
if (failed)
{

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