From d715fae1380576fbd20ef1331e0698c544f71e03 Mon Sep 17 00:00:00 2001 From: Rutger Hofman Date: Thu, 23 Apr 2009 13:14:08 +0000 Subject: [PATCH] Handle #define layouts by hand. Fix the occasional #define BLA if (x) act(): wrap in do { ... } while git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1520 b68d4a1b-bc3d-0410-92ed-d4ac073336b7 --- urjtag/include/bitmask.h | 32 +- urjtag/include/bsbit.h | 14 +- urjtag/include/bsdl_mode.h | 36 +- urjtag/include/bssignal.h | 2 +- urjtag/include/bus.h | 2 +- urjtag/include/bus_driver.h | 22 +- urjtag/include/cable.h | 2 +- urjtag/include/chain.h | 10 +- urjtag/include/data_register.h | 4 +- urjtag/include/flash.h | 10 +- urjtag/include/flash/cfi.h | 126 +++--- urjtag/include/flash/intel.h | 90 ++-- urjtag/include/flash/mic.h | 284 ++++++------- urjtag/include/instruction.h | 4 +- urjtag/include/jtag.h | 6 +- urjtag/include/parport.h | 2 +- urjtag/include/part.h | 8 +- urjtag/include/pod.h | 2 +- urjtag/include/register.h | 2 +- urjtag/include/tap.h | 2 +- urjtag/include/tap_state.h | 54 +-- urjtag/include/usbconn.h | 2 +- urjtag/src/bsdl/bsdl_bison.y | 18 +- urjtag/src/bsdl/bsdl_flex.l | 6 +- urjtag/src/bsdl/bsdl_sysdep.h | 20 +- urjtag/src/bsdl/vhdl_bison.y | 34 +- urjtag/src/bsdl/vhdl_flex.l | 4 +- urjtag/src/bus/au1500.c | 10 +- urjtag/src/bus/avr32.c | 126 +++--- urjtag/src/bus/bcm1250.c | 4 +- urjtag/src/bus/bf533_ezkit.c | 20 +- urjtag/src/bus/bf533_stamp.c | 20 +- urjtag/src/bus/bf537_stamp.c | 42 +- urjtag/src/bus/bf548_ezkit.c | 16 +- urjtag/src/bus/bf561_ezkit.c | 20 +- urjtag/src/bus/bscoach.c | 16 +- urjtag/src/bus/buses.h | 2 +- urjtag/src/bus/ejtag.c | 100 ++--- urjtag/src/bus/ejtag_dma.c | 42 +- urjtag/src/bus/h7202.c | 10 +- urjtag/src/bus/ixp425.c | 10 +- urjtag/src/bus/jopcyc.c | 18 +- urjtag/src/bus/lh7a400.c | 18 +- urjtag/src/bus/mpc5200.c | 22 +- urjtag/src/bus/mpc824x.c | 16 +- urjtag/src/bus/ppc405ep.c | 10 +- urjtag/src/bus/ppc440gx_ebc8.c | 10 +- urjtag/src/bus/prototype.c | 34 +- urjtag/src/bus/pxa2x0.c | 28 +- urjtag/src/bus/pxa2x0_mc.h | 558 ++++++++++++------------- urjtag/src/bus/s3c4510x.c | 166 ++++---- urjtag/src/bus/sa1110.c | 12 +- urjtag/src/bus/sh7727.c | 16 +- urjtag/src/bus/sh7750r.c | 16 +- urjtag/src/bus/sh7751r.c | 14 +- urjtag/src/bus/sharc21065l.c | 12 +- urjtag/src/bus/slsup3.c | 12 +- urjtag/src/bus/tx4925.c | 10 +- urjtag/src/bus/zefant-xs3.c | 46 +- urjtag/src/cmd/pod.c | 2 +- urjtag/src/cmd/signal.c | 4 +- urjtag/src/cmd/usleep.c | 2 +- urjtag/src/flash/amd_flash.c | 14 +- urjtag/src/flash/cfi.c | 16 +- urjtag/src/flash/jedec.c | 58 +-- urjtag/src/jim/intel_28f800b3.c | 16 +- urjtag/src/jtag.c | 6 +- urjtag/src/lib/getdelim.c | 2 +- urjtag/src/svf/svf_flex.l | 7 +- urjtag/src/tap/cable/arcom.c | 10 +- urjtag/src/tap/cable/byteblaster.c | 16 +- urjtag/src/tap/cable/dlc5.c | 12 +- urjtag/src/tap/cable/ea253.c | 10 +- urjtag/src/tap/cable/ei012.c | 10 +- urjtag/src/tap/cable/ft2232.c | 98 ++--- urjtag/src/tap/cable/generic.h | 4 +- urjtag/src/tap/cable/generic_parport.h | 2 +- urjtag/src/tap/cable/generic_usbconn.h | 2 +- urjtag/src/tap/cable/keithkoep.c | 10 +- urjtag/src/tap/cable/lattice.c | 10 +- urjtag/src/tap/cable/mpcbdm.c | 14 +- urjtag/src/tap/cable/triton.c | 14 +- urjtag/src/tap/cable/ts7800.c | 46 +- urjtag/src/tap/cable/vision_ep9307.c | 52 +-- urjtag/src/tap/cable/wiggler.c | 88 ++-- urjtag/src/tap/cable/wiggler2.c | 12 +- urjtag/src/tap/cable/xpc.c | 10 +- urjtag/src/tap/discovery.c | 8 +- 88 files changed, 1413 insertions(+), 1396 deletions(-) diff --git a/urjtag/include/bitmask.h b/urjtag/include/bitmask.h index 95d3f856..9c6c321a 100644 --- a/urjtag/include/bitmask.h +++ b/urjtag/include/bitmask.h @@ -32,34 +32,34 @@ * */ -#ifndef URJ_BITMASK_H -#define URJ_BITMASK_H +#ifndef URJ_BITMASK_H +#define URJ_BITMASK_H #ifdef UNUSED /* RFHH */ #ifndef LANGUAGE -# ifdef __ASSEMBLY__ -# define LANGUAGE ASM -# else -# define LANGUAGE C -# endif +# ifdef __ASSEMBLY__ +# define LANGUAGE ASM +# else +# define LANGUAGE C +# endif #endif #ifndef ASM -#define ASM 0 +#define ASM 0 #endif #ifndef C -#define C 1 +#define C 1 #endif #endif /* def UNUSED */ -#define URJ_MAX_BITS_ABS_VAL 1024 -#define URJ_BITS_ABS(a) (((((a) + URJ_MAX_BITS_ABS_VAL) / URJ_MAX_BITS_ABS_VAL) * 2 - 1) * (a)) -#define URJ_BITS_MIN(a,b) (((a) + (b) - URJ_BITS_ABS((a) - (b))) / 2) +#define URJ_MAX_BITS_ABS_VAL 1024 +#define URJ_BITS_ABS(a) (((((a) + URJ_MAX_BITS_ABS_VAL) / URJ_MAX_BITS_ABS_VAL) * 2 - 1) * (a)) +#define URJ_BITS_MIN(a,b) (((a) + (b) - URJ_BITS_ABS((a) - (b))) / 2) -#define URJ_BIT(b) (1 << (b)) -#define URJ_BITS(b1,b2) (((2 << URJ_BITS_ABS((b1) - (b2))) - 1) << URJ_BITS_MIN(b1,b2)) -#define URJ_BITS_VAL(b1,b2,v) (((v) << URJ_BITS_MIN(b1,b2)) & URJ_BITS (b1,b2)) -#define URJ_BITS_GET(b1,b2,v) (((v) & URJ_BITS (b1,b2)) >> URJ_BITS_MIN(b1,b2)) +#define URJ_BIT(b) (1 << (b)) +#define URJ_BITS(b1,b2) (((2 << URJ_BITS_ABS((b1) - (b2))) - 1) << URJ_BITS_MIN(b1,b2)) +#define URJ_BITS_VAL(b1,b2,v) (((v) << URJ_BITS_MIN(b1,b2)) & URJ_BITS (b1,b2)) +#define URJ_BITS_GET(b1,b2,v) (((v) & URJ_BITS (b1,b2)) >> URJ_BITS_MIN(b1,b2)) #endif /* URJ_BITMASK_H */ diff --git a/urjtag/include/bsbit.h b/urjtag/include/bsbit.h index e574117b..834753d9 100644 --- a/urjtag/include/bsbit.h +++ b/urjtag/include/bsbit.h @@ -23,19 +23,19 @@ */ #ifndef URJ_BSBIT_BSBIT_H -#define URJ_BSBIT_BSBIT_H +#define URJ_BSBIT_BSBIT_H typedef struct urj_bsbit urj_bsbit_t; #include "bssignal.h" -#define URJ_BSBIT_INPUT 1 -#define URJ_BSBIT_OUTPUT 2 -#define URJ_BSBIT_CONTROL 3 -#define URJ_BSBIT_INTERNAL 4 -#define URJ_BSBIT_BIDIR 5 +#define URJ_BSBIT_INPUT 1 +#define URJ_BSBIT_OUTPUT 2 +#define URJ_BSBIT_CONTROL 3 +#define URJ_BSBIT_INTERNAL 4 +#define URJ_BSBIT_BIDIR 5 -#define URJ_BSBIT_STATE_Z (-1) +#define URJ_BSBIT_STATE_Z (-1) struct urj_bsbit { diff --git a/urjtag/include/bsdl_mode.h b/urjtag/include/bsdl_mode.h index 24821eb2..09800820 100644 --- a/urjtag/include/bsdl_mode.h +++ b/urjtag/include/bsdl_mode.h @@ -31,9 +31,9 @@ #define URJ_BSDL_MODE_MSG_FATAL (1 << 3) #define URJ_BSDL_MODE_MSG_ALL (URJ_BSDL_MODE_MSG_FATAL | \ - URJ_BSDL_MODE_MSG_ERR | \ - URJ_BSDL_MODE_MSG_WARN | \ - URJ_BSDL_MODE_MSG_NOTE) + URJ_BSDL_MODE_MSG_ERR | \ + URJ_BSDL_MODE_MSG_WARN | \ + URJ_BSDL_MODE_MSG_NOTE) #define URJ_BSDL_MODE_MSG_ALWAYS URJ_BSDL_MODE_MSG_FATAL #define URJ_BSDL_MODE_SYN_CHECK (1 << 4) @@ -41,26 +41,26 @@ #define URJ_BSDL_MODE_INSTR_EXEC (1 << 6) #define URJ_BSDL_MODE_IDCODE_CHECK (1 << 7) #define URJ_BSDL_MODE_ACTION_ALL (URJ_BSDL_MODE_SYN_CHECK | \ - URJ_BSDL_MODE_INSTR_PRINT | \ - URJ_BSDL_MODE_INSTR_EXEC | \ - URJ_BSDL_MODE_IDCODE_CHECK) + URJ_BSDL_MODE_INSTR_PRINT | \ + URJ_BSDL_MODE_INSTR_EXEC | \ + URJ_BSDL_MODE_IDCODE_CHECK) #define URJ_BSDL_MODE_INCLUDE1 (URJ_BSDL_MODE_MSG_ALWAYS) #define URJ_BSDL_MODE_INCLUDE2 (URJ_BSDL_MODE_SYN_CHECK | \ - URJ_BSDL_MODE_INSTR_EXEC | \ - URJ_BSDL_MODE_MSG_WARN | \ - URJ_BSDL_MODE_MSG_ERR | \ - URJ_BSDL_MODE_MSG_FATAL) + URJ_BSDL_MODE_INSTR_EXEC | \ + URJ_BSDL_MODE_MSG_WARN | \ + URJ_BSDL_MODE_MSG_ERR | \ + URJ_BSDL_MODE_MSG_FATAL) #define URJ_BSDL_MODE_DETECT (URJ_BSDL_MODE_SYN_CHECK | \ - URJ_BSDL_MODE_INSTR_EXEC | \ - URJ_BSDL_MODE_IDCODE_CHECK | \ - URJ_BSDL_MODE_MSG_ALWAYS) + URJ_BSDL_MODE_INSTR_EXEC | \ + URJ_BSDL_MODE_IDCODE_CHECK | \ + URJ_BSDL_MODE_MSG_ALWAYS) #define URJ_BSDL_MODE_TEST (URJ_BSDL_MODE_SYN_CHECK | \ - URJ_BSDL_MODE_MSG_ALL) + URJ_BSDL_MODE_MSG_ALL) #define URJ_BSDL_MODE_DUMP (URJ_BSDL_MODE_SYN_CHECK | \ - URJ_BSDL_MODE_INSTR_PRINT | \ - URJ_BSDL_MODE_MSG_WARN | \ - URJ_BSDL_MODE_MSG_ERR | \ - URJ_BSDL_MODE_MSG_FATAL) + URJ_BSDL_MODE_INSTR_PRINT | \ + URJ_BSDL_MODE_MSG_WARN | \ + URJ_BSDL_MODE_MSG_ERR | \ + URJ_BSDL_MODE_MSG_FATAL) #endif /* URJ_BSDL_MODE_H */ diff --git a/urjtag/include/bssignal.h b/urjtag/include/bssignal.h index 7181f8cd..c3ccc603 100644 --- a/urjtag/include/bssignal.h +++ b/urjtag/include/bssignal.h @@ -24,7 +24,7 @@ */ #ifndef URJ_BSSIGNAL_H -#define URJ_BSSIGNAL_H +#define URJ_BSSIGNAL_H typedef struct urj_part_signal urj_part_signal_t; diff --git a/urjtag/include/bus.h b/urjtag/include/bus.h index ca2903e8..e9a92187 100644 --- a/urjtag/include/bus.h +++ b/urjtag/include/bus.h @@ -24,7 +24,7 @@ */ #ifndef URJ_BUS_H -#define URJ_BUS_H +#define URJ_BUS_H #include diff --git a/urjtag/include/bus_driver.h b/urjtag/include/bus_driver.h index 00fb1d4b..77c02c8e 100644 --- a/urjtag/include/bus_driver.h +++ b/urjtag/include/bus_driver.h @@ -33,7 +33,7 @@ */ #ifndef URJ_BUS_DRIVER_BRUX_BUS_H -#define URJ_BUS_DRIVER_BRUX_BUS_H +#define URJ_BUS_DRIVER_BRUX_BUS_H #include @@ -79,15 +79,15 @@ struct urj_bus extern urj_bus_t *bus; -#define URJ_BUS_PRINTINFO(bus) (bus)->driver->printinfo(bus) -#define URJ_BUS_PREPARE(bus) (bus)->driver->prepare(bus) -#define URJ_BUS_AREA(bus,adr,a) (bus)->driver->area(bus,adr,a) -#define URJ_BUS_READ_START(bus,adr) (bus)->driver->read_start(bus,adr) -#define URJ_BUS_READ_NEXT(bus,adr) (bus)->driver->read_next(bus,adr) -#define URJ_BUS_READ_END(bus) (bus)->driver->read_end(bus) -#define URJ_BUS_READ(bus,adr) (bus)->driver->read(bus,adr) -#define URJ_BUS_WRITE(bus,adr,data) (bus)->driver->write(bus,adr,data) -#define URJ_BUS_FREE(bus) (bus)->driver->free_bus(bus) -#define URJ_BUS_INIT(bus) (bus)->driver->init(bus) +#define URJ_BUS_PRINTINFO(bus) (bus)->driver->printinfo(bus) +#define URJ_BUS_PREPARE(bus) (bus)->driver->prepare(bus) +#define URJ_BUS_AREA(bus,adr,a) (bus)->driver->area(bus,adr,a) +#define URJ_BUS_READ_START(bus,adr) (bus)->driver->read_start(bus,adr) +#define URJ_BUS_READ_NEXT(bus,adr) (bus)->driver->read_next(bus,adr) +#define URJ_BUS_READ_END(bus) (bus)->driver->read_end(bus) +#define URJ_BUS_READ(bus,adr) (bus)->driver->read(bus,adr) +#define URJ_BUS_WRITE(bus,adr,data) (bus)->driver->write(bus,adr,data) +#define URJ_BUS_FREE(bus) (bus)->driver->free_bus(bus) +#define URJ_BUS_INIT(bus) (bus)->driver->init(bus) #endif /* URJ_BUS_DRIVER_BRUX_BUS_H */ diff --git a/urjtag/include/cable.h b/urjtag/include/cable.h index 4c2c6645..27efa1c2 100644 --- a/urjtag/include/cable.h +++ b/urjtag/include/cable.h @@ -24,7 +24,7 @@ */ #ifndef URJ_CABLE_H -#define URJ_CABLE_H +#define URJ_CABLE_H #include diff --git a/urjtag/include/chain.h b/urjtag/include/chain.h index 5abfb380..e84a0cd3 100644 --- a/urjtag/include/chain.h +++ b/urjtag/include/chain.h @@ -23,7 +23,7 @@ */ #ifndef URJ_CHAIN_H -#define URJ_CHAIN_H +#define URJ_CHAIN_H #include "part.h" #include "pod.h" @@ -33,10 +33,10 @@ typedef struct urj_chain urj_chain_t; #include "cable.h" #include "bsdl.h" -#define URJ_CHAIN_EXITMODE_SHIFT 0 -#define URJ_CHAIN_EXITMODE_IDLE 1 -#define URJ_CHAIN_EXITMODE_EXIT1 2 -#define URJ_CHAIN_EXITMODE_UPDATE 3 +#define URJ_CHAIN_EXITMODE_SHIFT 0 +#define URJ_CHAIN_EXITMODE_IDLE 1 +#define URJ_CHAIN_EXITMODE_EXIT1 2 +#define URJ_CHAIN_EXITMODE_UPDATE 3 struct urj_chain { diff --git a/urjtag/include/data_register.h b/urjtag/include/data_register.h index b1ed3769..3959404b 100644 --- a/urjtag/include/data_register.h +++ b/urjtag/include/data_register.h @@ -23,11 +23,11 @@ */ #ifndef URJ_DATA_REGISTER_H -#define URJ_DATA_REGISTER_H +#define URJ_DATA_REGISTER_H #include "register.h" -#define URJ_DATA_REGISTER_MAXLEN 32 +#define URJ_DATA_REGISTER_MAXLEN 32 typedef struct urj_data_register urj_data_register_t; diff --git a/urjtag/include/flash.h b/urjtag/include/flash.h index c2b8d365..da795c9e 100644 --- a/urjtag/include/flash.h +++ b/urjtag/include/flash.h @@ -76,11 +76,11 @@ typedef struct void (*readarray) (urj_flash_cfi_array_t *cfi_array); } urj_flash_driver_t; -#define URJ_FLASH_ERROR_NOERROR 0 -#define URJ_FLASH_ERROR_INVALID_COMMAND_SEQUENCE 1 -#define URJ_FLASH_ERROR_LOW_VPEN 2 -#define URJ_FLASH_ERROR_BLOCK_LOCKED 3 -#define URJ_FLASH_ERROR_UNKNOWN 99 +#define URJ_FLASH_ERROR_NOERROR 0 +#define URJ_FLASH_ERROR_INVALID_COMMAND_SEQUENCE 1 +#define URJ_FLASH_ERROR_LOW_VPEN 2 +#define URJ_FLASH_ERROR_BLOCK_LOCKED 3 +#define URJ_FLASH_ERROR_UNKNOWN 99 void urj_flash_detectflash (urj_bus_t *bus, uint32_t adr); diff --git a/urjtag/include/flash/cfi.h b/urjtag/include/flash/cfi.h index 6c32daa1..2b2d46f7 100644 --- a/urjtag/include/flash/cfi.h +++ b/urjtag/include/flash/cfi.h @@ -42,8 +42,8 @@ * */ -#ifndef FLASH_CFI_H -#define FLASH_CFI_H +#ifndef FLASH_CFI_H +#define FLASH_CFI_H #ifndef __ASSEMBLY__ #include @@ -51,18 +51,18 @@ /* CFI commands - see Table 1 in [1] */ -#define CFI_CMD_READ_ARRAY1 0xFF -#define CFI_CMD_READ_ARRAY2 0xF0 -#define CFI_CMD_QUERY 0x98 -#define CFI_CMD_QUERY_OFFSET 0x55 +#define CFI_CMD_READ_ARRAY1 0xFF +#define CFI_CMD_READ_ARRAY2 0xF0 +#define CFI_CMD_QUERY 0x98 +#define CFI_CMD_QUERY_OFFSET 0x55 /* Query identification string - see 4.3.2 in [1] */ -#define CFI_QUERY_ID_OFFSET 0x10 -#define PRI_VENDOR_ID_OFFSET 0x13 -#define PRI_VENDOR_TABLE_ADR_OFFSET 0x15 -#define ALT_VENDOR_ID_OFFSET 0x17 -#define ALT_VENDOR_TABLE_ADR_OFFSET 0x19 +#define CFI_QUERY_ID_OFFSET 0x10 +#define PRI_VENDOR_ID_OFFSET 0x13 +#define PRI_VENDOR_TABLE_ADR_OFFSET 0x15 +#define ALT_VENDOR_ID_OFFSET 0x17 +#define ALT_VENDOR_TABLE_ADR_OFFSET 0x19 #ifndef __ASSEMBLY__ typedef struct cfi_query_identification_string @@ -76,29 +76,29 @@ typedef struct cfi_query_identification_string /* Algorithm command set & control interface ID codes - see Table 1 in [2] */ -#define CFI_VENDOR_NULL 0x0000 -#define CFI_VENDOR_INTEL_ECS 0x0001 -#define CFI_VENDOR_AMD_SCS 0x0002 -#define CFI_VENDOR_INTEL_SCS 0x0003 -#define CFI_VENDOR_AMD_ECS 0x0004 -#define CFI_VENDOR_MITSUBISHI_SCS 0x0100 -#define CFI_VENDOR_MITSUBISHI_ECS 0x0101 -#define CFI_VENDOR_SST_PWCS 0x0102 +#define CFI_VENDOR_NULL 0x0000 +#define CFI_VENDOR_INTEL_ECS 0x0001 +#define CFI_VENDOR_AMD_SCS 0x0002 +#define CFI_VENDOR_INTEL_SCS 0x0003 +#define CFI_VENDOR_AMD_ECS 0x0004 +#define CFI_VENDOR_MITSUBISHI_SCS 0x0100 +#define CFI_VENDOR_MITSUBISHI_ECS 0x0101 +#define CFI_VENDOR_SST_PWCS 0x0102 /* Query system interface information - see 4.3.3 in [1] */ -#define VCC_MIN_WEV_OFFSET 0x1B /* Vcc Logic Supply Minimum Write/Erase voltage */ -#define VCC_MAX_WEV_OFFSET 0x1C /* Vcc Logic Supply Maximum Write/Erase voltage */ -#define VPP_MIN_WEV_OFFSET 0x1D /* Vpp [Programming] Supply Minimum Write/Erase voltage */ -#define VPP_MAX_WEV_OFFSET 0x1E /* Vpp [Programming] Supply Maximum Write/Erase voltage */ -#define TYP_SINGLE_WRITE_TIMEOUT_OFFSET 0x1F /* Typical timeout per single byte/word write */ -#define TYP_BUFFER_WRITE_TIMEOUT_OFFSET 0x20 /* Typical timeout for minimum-size buffer write */ -#define TYP_BLOCK_ERASE_TIMEOUT_OFFSET 0x21 /* Typical timeout per individual block erase */ -#define TYP_CHIP_ERASE_TIMEOUT_OFFSET 0x22 /* Typical timeout for full chip erase */ -#define MAX_SINGLE_WRITE_TIMEOUT_OFFSET 0x23 /* Maximum timeout for byte/word write */ -#define MAX_BUFFER_WRITE_TIMEOUT_OFFSET 0x24 /* Maximum timeout for buffer write */ -#define MAX_BLOCK_ERASE_TIMEOUT_OFFSET 0x25 /* Maximum timeout per individual block erase */ -#define MAX_CHIP_ERASE_TIMEOUT_OFFSET 0x26 /* Maximum timeout for chip erase */ +#define VCC_MIN_WEV_OFFSET 0x1B /* Vcc Logic Supply Minimum Write/Erase voltage */ +#define VCC_MAX_WEV_OFFSET 0x1C /* Vcc Logic Supply Maximum Write/Erase voltage */ +#define VPP_MIN_WEV_OFFSET 0x1D /* Vpp [Programming] Supply Minimum Write/Erase voltage */ +#define VPP_MAX_WEV_OFFSET 0x1E /* Vpp [Programming] Supply Maximum Write/Erase voltage */ +#define TYP_SINGLE_WRITE_TIMEOUT_OFFSET 0x1F /* Typical timeout per single byte/word write */ +#define TYP_BUFFER_WRITE_TIMEOUT_OFFSET 0x20 /* Typical timeout for minimum-size buffer write */ +#define TYP_BLOCK_ERASE_TIMEOUT_OFFSET 0x21 /* Typical timeout per individual block erase */ +#define TYP_CHIP_ERASE_TIMEOUT_OFFSET 0x22 /* Typical timeout for full chip erase */ +#define MAX_SINGLE_WRITE_TIMEOUT_OFFSET 0x23 /* Maximum timeout for byte/word write */ +#define MAX_BUFFER_WRITE_TIMEOUT_OFFSET 0x24 /* Maximum timeout for buffer write */ +#define MAX_BLOCK_ERASE_TIMEOUT_OFFSET 0x25 /* Maximum timeout per individual block erase */ +#define MAX_CHIP_ERASE_TIMEOUT_OFFSET 0x26 /* Maximum timeout for chip erase */ #ifndef __ASSEMBLY__ typedef struct cfi_query_system_interface_information @@ -120,11 +120,11 @@ typedef struct cfi_query_system_interface_information /* Device geometry definition - see 4.3.4 in [1] */ -#define DEVICE_SIZE_OFFSET 0x27 /* Device Size */ -#define FLASH_DEVICE_INTERFACE_OFFSET 0x28 /* Flash Device Interface description */ -#define MAX_BYTES_WRITE_OFFSET 0x2A /* Maximum number of bytes in multi-byte write */ -#define NUMBER_OF_ERASE_REGIONS_OFFSET 0x2C /* Number of Erase Block Regions */ -#define ERASE_BLOCK_REGION_OFFSET 0x2D /* Erase Block Region Information */ +#define DEVICE_SIZE_OFFSET 0x27 /* Device Size */ +#define FLASH_DEVICE_INTERFACE_OFFSET 0x28 /* Flash Device Interface description */ +#define MAX_BYTES_WRITE_OFFSET 0x2A /* Maximum number of bytes in multi-byte write */ +#define NUMBER_OF_ERASE_REGIONS_OFFSET 0x2C /* Number of Erase Block Regions */ +#define ERASE_BLOCK_REGION_OFFSET 0x2D /* Erase Block Region Information */ #ifndef __ASSEMBLY__ typedef struct cfi_erase_block_region urj_flash_cfi_erase_block_region_t; @@ -147,11 +147,11 @@ struct cfi_erase_block_region /* Device interface code assignments (for cfi_device_geometry.device_interface) - see Table 2 in [2] */ -#define CFI_INTERFACE_X8 0 -#define CFI_INTERFACE_X16 1 -#define CFI_INTERFACE_X8_X16 2 -#define CFI_INTERFACE_X32 3 -#define CFI_INTERFACE_X16_X32 4 +#define CFI_INTERFACE_X8 0 +#define CFI_INTERFACE_X16 1 +#define CFI_INTERFACE_X8_X16 2 +#define CFI_INTERFACE_X32 3 +#define CFI_INTERFACE_X16_X32 4 /* CFI Query structure - see 4.3.1 in [1] */ @@ -165,28 +165,28 @@ typedef struct cfi_query_structure #endif /* __ASSEMBLY__ */ /* AMD primary vendor-specific extended query structure - see [3] and [4] */ -#define MAJOR_VERSION_OFFSET 0x03 -#define MINOR_VERSION_OFFSET 0x04 -#define ADDRESS_SENSITIVE_UNLOCK_OFFSET 0x05 -#define ERASE_SUSPEND_OFFSET 0x06 -#define SECTOR_PROTECT_OFFSET 0x07 -#define SECTOR_TEMPORARY_UNPROTECT_OFFSET 0x08 -#define SECTOR_PROTECT_SCHEME_OFFSET 0x09 -#define SIMULTANEOUS_OPERATION_OFFSET 0x0A -#define BURST_MODE_TYPE_OFFSET 0x0B -#define PAGE_MODE_TYPE_OFFSET 0x0C -#define ACC_MIN_OFFSET 0x0D -#define ACC_MAX_OFFSET 0x0E -#define TOP_BOTTOM_SECTOR_FLAG_OFFSET 0x0F -#define PROGRAM_SUSPEND_OFFSET 0x10 -#define UNLOCK_BYPASS_OFFSET 0x11 -#define SECSI_SECTOR_SIZE_OFFSET 0x12 -#define EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET 0x13 -#define NON_EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET 0x14 -#define ERASE_SUSPEND_TIMEOUT_MAX_OFFSET 0x15 -#define PROGRAM_SUSPEND_TIMEOUT_MAX_OFFSET 0x16 -#define BANK_ORGANIZATION_OFFSET 0x17 -#define BANK_REGION_INFO_OFFSET 0X18 +#define MAJOR_VERSION_OFFSET 0x03 +#define MINOR_VERSION_OFFSET 0x04 +#define ADDRESS_SENSITIVE_UNLOCK_OFFSET 0x05 +#define ERASE_SUSPEND_OFFSET 0x06 +#define SECTOR_PROTECT_OFFSET 0x07 +#define SECTOR_TEMPORARY_UNPROTECT_OFFSET 0x08 +#define SECTOR_PROTECT_SCHEME_OFFSET 0x09 +#define SIMULTANEOUS_OPERATION_OFFSET 0x0A +#define BURST_MODE_TYPE_OFFSET 0x0B +#define PAGE_MODE_TYPE_OFFSET 0x0C +#define ACC_MIN_OFFSET 0x0D +#define ACC_MAX_OFFSET 0x0E +#define TOP_BOTTOM_SECTOR_FLAG_OFFSET 0x0F +#define PROGRAM_SUSPEND_OFFSET 0x10 +#define UNLOCK_BYPASS_OFFSET 0x11 +#define SECSI_SECTOR_SIZE_OFFSET 0x12 +#define EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET 0x13 +#define NON_EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET 0x14 +#define ERASE_SUSPEND_TIMEOUT_MAX_OFFSET 0x15 +#define PROGRAM_SUSPEND_TIMEOUT_MAX_OFFSET 0x16 +#define BANK_ORGANIZATION_OFFSET 0x17 +#define BANK_REGION_INFO_OFFSET 0X18 #ifndef __ASSEMBLY__ typedef struct amd_pri_extened_query_structure diff --git a/urjtag/include/flash/intel.h b/urjtag/include/flash/intel.h index 11404f90..ddab1d1a 100644 --- a/urjtag/include/flash/intel.h +++ b/urjtag/include/flash/intel.h @@ -37,64 +37,64 @@ * */ -#ifndef FLASH_INTEL_H -#define FLASH_INTEL_H +#ifndef FLASH_INTEL_H +#define FLASH_INTEL_H #include /* Intel CFI commands - see Table 4. in [1] and Table 3. in [2] */ -#define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_WRITE_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */ -#define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_WRITE_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */ +#define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */ /* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */ -#define CFI_INTEL_SR_READY URJ_BIT (7) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_ERASE_SUSPEND URJ_BIT (6) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_ERASE_ERROR URJ_BIT (5) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_PROGRAM_ERROR URJ_BIT (4) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_VPEN_ERROR URJ_BIT (3) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_PROGRAM_SUSPEND URJ_BIT (2) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_BLOCK_LOCKED URJ_BIT (1) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ -#define CFI_INTEL_SR_BEFP URJ_BIT (0) /* 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_SR_READY URJ_BIT (7) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_SR_ERASE_SUSPEND URJ_BIT (6) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_SR_ERASE_ERROR URJ_BIT (5) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_SR_PROGRAM_ERROR URJ_BIT (4) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_SR_VPEN_ERROR URJ_BIT (3) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_SR_PROGRAM_SUSPEND URJ_BIT (2) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_SR_BLOCK_LOCKED URJ_BIT (1) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ +#define CFI_INTEL_SR_BEFP URJ_BIT (0) /* 28FxxxK3, 28FxxxK18 */ /* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */ -#define CFI_CHIP_INTEL_28F320J3A 0x0016 -#define CFI_CHIPN_INTEL_28F320J3A "28F320J3A" -#define CFI_CHIP_INTEL_28F640J3A 0x0017 -#define CFI_CHIPN_INTEL_28F640J3A "28F640J3A" -#define CFI_CHIP_INTEL_28F128J3A 0x0018 -#define CFI_CHIPN_INTEL_28F128J3A "28F128J3A" +#define CFI_CHIP_INTEL_28F320J3A 0x0016 +#define CFI_CHIPN_INTEL_28F320J3A "28F320J3A" +#define CFI_CHIP_INTEL_28F640J3A 0x0017 +#define CFI_CHIPN_INTEL_28F640J3A "28F640J3A" +#define CFI_CHIP_INTEL_28F128J3A 0x0018 +#define CFI_CHIPN_INTEL_28F128J3A "28F128J3A" /* Intel flash device ID codes for 28FxxxK3 and 28FxxxK18 - see Table 8. in [2] */ -#define CFI_CHIP_INTEL_28F640K3 0x8801 -#define CFI_CHIPN_INTEL_28F640K3 "28F640K3" -#define CFI_CHIP_INTEL_28F128K3 0x8802 -#define CFI_CHIPN_INTEL_28F128K3 "28F128K3" -#define CFI_CHIP_INTEL_28F256K3 0x8803 -#define CFI_CHIPN_INTEL_28F256K3 "28F256K3" -#define CFI_CHIP_INTEL_28F640K18 0x8805 -#define CFI_CHIPN_INTEL_28F640K18 "28F640K18" -#define CFI_CHIP_INTEL_28F128K18 0x8806 -#define CFI_CHIPN_INTEL_28F128K18 "28F128K18" -#define CFI_CHIP_INTEL_28F256K18 0x8807 -#define CFI_CHIPN_INTEL_28F256K18 "28F256K18" +#define CFI_CHIP_INTEL_28F640K3 0x8801 +#define CFI_CHIPN_INTEL_28F640K3 "28F640K3" +#define CFI_CHIP_INTEL_28F128K3 0x8802 +#define CFI_CHIPN_INTEL_28F128K3 "28F128K3" +#define CFI_CHIP_INTEL_28F256K3 0x8803 +#define CFI_CHIPN_INTEL_28F256K3 "28F256K3" +#define CFI_CHIP_INTEL_28F640K18 0x8805 +#define CFI_CHIPN_INTEL_28F640K18 "28F640K18" +#define CFI_CHIP_INTEL_28F128K18 0x8806 +#define CFI_CHIPN_INTEL_28F128K18 "28F128K18" +#define CFI_CHIP_INTEL_28F256K18 0x8807 +#define CFI_CHIPN_INTEL_28F256K18 "28F256K18" #endif /* FLASH_INTEL_H */ diff --git a/urjtag/include/flash/mic.h b/urjtag/include/flash/mic.h index 9b5a3144..70f6dffb 100644 --- a/urjtag/include/flash/mic.h +++ b/urjtag/include/flash/mic.h @@ -36,151 +36,151 @@ * */ -#ifndef STD_MIC_H -#define STD_MIC_H +#ifndef STD_MIC_H +#define STD_MIC_H /* Manufacturer's Identification Code - see Table 1 in [1] */ -#define STD_MIC_AMD 0x01 -#define STD_MICN_AMD "AMD" -#define STD_MIC_AMI 0x02 -#define STD_MICN_AMI "AMI" -#define STD_MIC_FAIRCHILD 0x83 -#define STD_MICN_FAIRCHILD "Fairchild" -#define STD_MIC_FUJITSU 0x04 -#define STD_MICN_FUJITSU "Fujitsu" -#define STD_MIC_GTE 0x85 -#define STD_MICN_GTE "GTE" -#define STD_MIC_HARRIS 0x86 -#define STD_MICN_HARRIS "Harris" -#define STD_MIC_HITACHI 0x07 -#define STD_MICN_HITACHI "Hitachi" -#define STD_MIC_INMOS 0x08 -#define STD_MICN_INMOS "Inmos" -#define STD_MIC_INTEL 0x89 -#define STD_MICN_INTEL "Intel" -#define STD_MIC_ITT 0x8A -#define STD_MICN_ITT "I.T.T." -#define STD_MIC_INTERSIL 0x0B -#define STD_MICN_INTERSIL "Intersil" -#define STD_MIC_MONOLITHIC_MEMORIES 0x8C -#define STD_MICN_MONOLITHIC_MEMORIES "Monolithic Memories" -#define STD_MIC_MOSTEK 0x0D -#define STD_MICN_MOSTEK "Mostek" -#define STD_MIC_MOTOROLA 0x0E -#define STD_MICN_MOTOROLA "Motorola" -#define STD_MIC_NATIONAL 0x8F -#define STD_MICN_NATIONAL "National" -#define STD_MIC_NEC 0x10 -#define STD_MICN_NEC "NEC" -#define STD_MIC_RCA 0x91 -#define STC_MICN_RCA "RCA" -#define STD_MIC_RAYTHEON 0x92 -#define STD_MICN_RAYTHEON "Raytheon" -#define STD_MIC_CONEXANT 0x13 -#define STD_MICN_CONEXANT "Conexant (Rockwell)" -#define STD_MIC_SEEQ 0x94 -#define STD_MICN_SEEQ "Seeq" -#define STD_MIC_PHILIPS 0x15 -#define STD_MICN_PHILIPS "Philips Semi. (Signetics)" -#define STD_MIC_SYNERTEK 0x16 -#define STD_MICN_SYNERTEK "Synertek" -#define STD_MIC_TEXAS_INSTRUMENTS 0x97 -#define STD_MICN_TEXAS_INSTRUMENTS "Texas Instruments" -#define STD_MIC_TOSHIBA 0x98 -#define STD_MICN_TOSHIBA "Toshiba" -#define STD_MIC_XICOR 0x19 -#define STD_MICN_XICOR "Xicor" -#define STD_MIC_ZILOG 0x1A -#define STD_MICN_ZILOG "Zilog" -#define STD_MIC_EUROTECHNIQUE 0x9B -#define STD_MICN_EUROTECHNIQUE "Eurotechnique" -#define STD_MIC_MITSUBISHI 0x1C -#define STD_MICN_MITSUBISHI "Mitsubishi" -#define STD_MIC_LUCENT 0x9D -#define STD_MICN_LUCENT "Lucent (AT&T)" -#define STD_MIC_EXEL 0x9E -#define STD_MICN_EXEL "Exel" -#define STD_MIC_ATMEL 0x1F -#define STD_MICN_ATMEL "Atmel" -#define STD_MIC_SGS_THOMSON 0x20 -#define STD_MICN_SGS_THOMSON "SGS/Thomson" -#define STD_MIC_LATTICE 0xA1 -#define STD_MICN_LATTICE "Lattice Semi." -#define STD_MIC_NCR 0xA2 -#define STD_MICN_NCR "NCR" -#define STD_MIC_WAFER_SCALE_INTEGRATION 0x23 -#define STD_MICN_WAFER_SCALE_INTEGRATION "Wafer Scale Integration" -#define STD_MIC_IBM 0xA4 -#define STD_MICN_IBM "IBM" -#define STD_MIC_TRISTAR 0x25 -#define STD_MICN_TRISTAR "Tristar" -#define STD_MIC_VISIC 0x26 -#define STD_MICN_VISIC "Visic" -#define STD_MIC_INTL_CMOS_TECHNOLOGY 0xA7 -#define STD_MICN_INTL_CMOS_TECHNOLOGY "Intl. CMOS Technology" -#define STD_MIC_SSSI 0xA8 -#define STD_MICN_SSSI "SSSI" -#define STD_MIC_MICROCHIP_TECHNOLOGY 0x29 -#define STD_MICN_MICROCHIP_TECHNOLOGY "MicrochipTechnology" -#define STD_MIC_RICOH 0x2A -#define STD_MICN_RICOH "Ricoh Ltd." -#define STD_MIC_VLSI 0xAB -#define STD_MICN_VLSI "VLSI" -#define STD_MIC_MICRON_TECHNOLOGY 0x2C -#define STD_MICN_MICRON_TECHNOLOGY "Micron Technology" -#define STD_MIC_HYUNDAI_ELECTRONICS 0xAD -#define STD_MICN_HYUNDAI_ELECTRONICS "Hyundai Electronics" -#define STD_MIC_OKI_SEMICONDUCTOR 0xAE -#define STD_MICN_OKI_SEMICONDUCTOR "OKI Semiconductor" -#define STD_MIC_ACTEL 0x2F -#define STD_MICN_ACTEL "ACTEL" -#define STD_MIC_SHARP 0xB0 -#define STD_MICN_SHARP "Sharp" -#define STD_MIC_CATALYST 0x31 -#define STD_MICN_CATALYST "Catalyst" -#define STD_MIC_PANASONIC 0x32 -#define STD_MICN_PANASONIC "Panasonic" -#define STD_MIC_IDT 0xB3 -#define STD_MICN_IDT "IDT" -#define STD_MIC_CYPRESS 0x34 -#define STD_MICN_CYPRESS "Cypress" -#define STD_MIC_DEC 0xB5 -#define STD_MICN_DEC "DEC" -#define STD_MIC_LSI_LOGIC 0xB6 -#define STD_MICN_LSI_LOGIC "LSI Logic" -#define STD_MIC_ZARLINK 0x37 -#define STD_MICN_ZARLINK "Zarlink (formerly Plessey)" -#define STD_MIC_UTMC 0x38 -#define STD_MICN_UTMC "UTMC" -#define STD_MIC_THINKING_MACHINE 0xB9 -#define STD_MICN_THINKING_MACHINE "Thinking Machine" -#define STD_MIC_THOMSON_CSF 0xBA -#define STD_MICN_THOMSON_CSF "Thomson CSF" -#define STD_MIC_INTEGRATED_CMOS 0x3B -#define STD_MICN_INTEGRATED_CMOS "Integrated CMOS(Vertex)" -#define STD_MIC_HONEYWELL 0xBC -#define STD_MICN_HONEYWELL "Honeywell" -#define STD_MIC_TEKTRONIX 0x3D -#define STD_MICN_TEKTRONIX "Tektronix" -#define STD_MIC_SUN_MICROSYSTEMS 0x3E -#define STD_MICN_SUN_MICROSYSTEMS "Sun Microsystems" -#define STD_MIC_SST 0xBF -#define STD_MICN_SST "SST" -#define STD_MIC_MOSEL 0x40 -#define STD_MICN_MOSEL "MOSEL" -#define STD_MIC_INFINEON 0xC1 -#define STD_MICN_INFINEON "Infineon (formerly Siemens)" -#define STD_MIC_MACRONIX 0xC2 -#define STD_MICN_MACRONIX "Macronix" -#define STD_MIC_XEROX 0x43 -#define STD_MICN_XEROX "Xerox" -#define STD_MIC_PLUS_LOGIC 0xC4 -#define STD_MICN_PLUS_LOGIC "Plus Logic" -#define STD_MIC_SUNDISK 0x45 -#define STD_MICN_SUNDISK "SunDisk" -#define STD_MIC_ELAN_CIRCUIT 0x46 -#define STD_MICN_ELAN_CIRCUIT "Elan Circuit Tech." +#define STD_MIC_AMD 0x01 +#define STD_MICN_AMD "AMD" +#define STD_MIC_AMI 0x02 +#define STD_MICN_AMI "AMI" +#define STD_MIC_FAIRCHILD 0x83 +#define STD_MICN_FAIRCHILD "Fairchild" +#define STD_MIC_FUJITSU 0x04 +#define STD_MICN_FUJITSU "Fujitsu" +#define STD_MIC_GTE 0x85 +#define STD_MICN_GTE "GTE" +#define STD_MIC_HARRIS 0x86 +#define STD_MICN_HARRIS "Harris" +#define STD_MIC_HITACHI 0x07 +#define STD_MICN_HITACHI "Hitachi" +#define STD_MIC_INMOS 0x08 +#define STD_MICN_INMOS "Inmos" +#define STD_MIC_INTEL 0x89 +#define STD_MICN_INTEL "Intel" +#define STD_MIC_ITT 0x8A +#define STD_MICN_ITT "I.T.T." +#define STD_MIC_INTERSIL 0x0B +#define STD_MICN_INTERSIL "Intersil" +#define STD_MIC_MONOLITHIC_MEMORIES 0x8C +#define STD_MICN_MONOLITHIC_MEMORIES "Monolithic Memories" +#define STD_MIC_MOSTEK 0x0D +#define STD_MICN_MOSTEK "Mostek" +#define STD_MIC_MOTOROLA 0x0E +#define STD_MICN_MOTOROLA "Motorola" +#define STD_MIC_NATIONAL 0x8F +#define STD_MICN_NATIONAL "National" +#define STD_MIC_NEC 0x10 +#define STD_MICN_NEC "NEC" +#define STD_MIC_RCA 0x91 +#define STC_MICN_RCA "RCA" +#define STD_MIC_RAYTHEON 0x92 +#define STD_MICN_RAYTHEON "Raytheon" +#define STD_MIC_CONEXANT 0x13 +#define STD_MICN_CONEXANT "Conexant (Rockwell)" +#define STD_MIC_SEEQ 0x94 +#define STD_MICN_SEEQ "Seeq" +#define STD_MIC_PHILIPS 0x15 +#define STD_MICN_PHILIPS "Philips Semi. (Signetics)" +#define STD_MIC_SYNERTEK 0x16 +#define STD_MICN_SYNERTEK "Synertek" +#define STD_MIC_TEXAS_INSTRUMENTS 0x97 +#define STD_MICN_TEXAS_INSTRUMENTS "Texas Instruments" +#define STD_MIC_TOSHIBA 0x98 +#define STD_MICN_TOSHIBA "Toshiba" +#define STD_MIC_XICOR 0x19 +#define STD_MICN_XICOR "Xicor" +#define STD_MIC_ZILOG 0x1A +#define STD_MICN_ZILOG "Zilog" +#define STD_MIC_EUROTECHNIQUE 0x9B +#define STD_MICN_EUROTECHNIQUE "Eurotechnique" +#define STD_MIC_MITSUBISHI 0x1C +#define STD_MICN_MITSUBISHI "Mitsubishi" +#define STD_MIC_LUCENT 0x9D +#define STD_MICN_LUCENT "Lucent (AT&T)" +#define STD_MIC_EXEL 0x9E +#define STD_MICN_EXEL "Exel" +#define STD_MIC_ATMEL 0x1F +#define STD_MICN_ATMEL "Atmel" +#define STD_MIC_SGS_THOMSON 0x20 +#define STD_MICN_SGS_THOMSON "SGS/Thomson" +#define STD_MIC_LATTICE 0xA1 +#define STD_MICN_LATTICE "Lattice Semi." +#define STD_MIC_NCR 0xA2 +#define STD_MICN_NCR "NCR" +#define STD_MIC_WAFER_SCALE_INTEGRATION 0x23 +#define STD_MICN_WAFER_SCALE_INTEGRATION "Wafer Scale Integration" +#define STD_MIC_IBM 0xA4 +#define STD_MICN_IBM "IBM" +#define STD_MIC_TRISTAR 0x25 +#define STD_MICN_TRISTAR "Tristar" +#define STD_MIC_VISIC 0x26 +#define STD_MICN_VISIC "Visic" +#define STD_MIC_INTL_CMOS_TECHNOLOGY 0xA7 +#define STD_MICN_INTL_CMOS_TECHNOLOGY "Intl. CMOS Technology" +#define STD_MIC_SSSI 0xA8 +#define STD_MICN_SSSI "SSSI" +#define STD_MIC_MICROCHIP_TECHNOLOGY 0x29 +#define STD_MICN_MICROCHIP_TECHNOLOGY "MicrochipTechnology" +#define STD_MIC_RICOH 0x2A +#define STD_MICN_RICOH "Ricoh Ltd." +#define STD_MIC_VLSI 0xAB +#define STD_MICN_VLSI "VLSI" +#define STD_MIC_MICRON_TECHNOLOGY 0x2C +#define STD_MICN_MICRON_TECHNOLOGY "Micron Technology" +#define STD_MIC_HYUNDAI_ELECTRONICS 0xAD +#define STD_MICN_HYUNDAI_ELECTRONICS "Hyundai Electronics" +#define STD_MIC_OKI_SEMICONDUCTOR 0xAE +#define STD_MICN_OKI_SEMICONDUCTOR "OKI Semiconductor" +#define STD_MIC_ACTEL 0x2F +#define STD_MICN_ACTEL "ACTEL" +#define STD_MIC_SHARP 0xB0 +#define STD_MICN_SHARP "Sharp" +#define STD_MIC_CATALYST 0x31 +#define STD_MICN_CATALYST "Catalyst" +#define STD_MIC_PANASONIC 0x32 +#define STD_MICN_PANASONIC "Panasonic" +#define STD_MIC_IDT 0xB3 +#define STD_MICN_IDT "IDT" +#define STD_MIC_CYPRESS 0x34 +#define STD_MICN_CYPRESS "Cypress" +#define STD_MIC_DEC 0xB5 +#define STD_MICN_DEC "DEC" +#define STD_MIC_LSI_LOGIC 0xB6 +#define STD_MICN_LSI_LOGIC "LSI Logic" +#define STD_MIC_ZARLINK 0x37 +#define STD_MICN_ZARLINK "Zarlink (formerly Plessey)" +#define STD_MIC_UTMC 0x38 +#define STD_MICN_UTMC "UTMC" +#define STD_MIC_THINKING_MACHINE 0xB9 +#define STD_MICN_THINKING_MACHINE "Thinking Machine" +#define STD_MIC_THOMSON_CSF 0xBA +#define STD_MICN_THOMSON_CSF "Thomson CSF" +#define STD_MIC_INTEGRATED_CMOS 0x3B +#define STD_MICN_INTEGRATED_CMOS "Integrated CMOS(Vertex)" +#define STD_MIC_HONEYWELL 0xBC +#define STD_MICN_HONEYWELL "Honeywell" +#define STD_MIC_TEKTRONIX 0x3D +#define STD_MICN_TEKTRONIX "Tektronix" +#define STD_MIC_SUN_MICROSYSTEMS 0x3E +#define STD_MICN_SUN_MICROSYSTEMS "Sun Microsystems" +#define STD_MIC_SST 0xBF +#define STD_MICN_SST "SST" +#define STD_MIC_MOSEL 0x40 +#define STD_MICN_MOSEL "MOSEL" +#define STD_MIC_INFINEON 0xC1 +#define STD_MICN_INFINEON "Infineon (formerly Siemens)" +#define STD_MIC_MACRONIX 0xC2 +#define STD_MICN_MACRONIX "Macronix" +#define STD_MIC_XEROX 0x43 +#define STD_MICN_XEROX "Xerox" +#define STD_MIC_PLUS_LOGIC 0xC4 +#define STD_MICN_PLUS_LOGIC "Plus Logic" +#define STD_MIC_SUNDISK 0x45 +#define STD_MICN_SUNDISK "SunDisk" +#define STD_MIC_ELAN_CIRCUIT 0x46 +#define STD_MICN_ELAN_CIRCUIT "Elan Circuit Tech." /* TODO */ #endif /* STD_MIC_H */ diff --git a/urjtag/include/instruction.h b/urjtag/include/instruction.h index 9cdf943c..8b1d50c8 100644 --- a/urjtag/include/instruction.h +++ b/urjtag/include/instruction.h @@ -23,12 +23,12 @@ */ #ifndef URJ_INSTRUCTION_H -#define URJ_INSTRUCTION_H +#define URJ_INSTRUCTION_H #include "register.h" #include "data_register.h" -#define URJ_INSTRUCTION_MAXLEN_INSTRUCTION 20 +#define URJ_INSTRUCTION_MAXLEN_INSTRUCTION 20 typedef struct urj_instruction urj_instruction_t; diff --git a/urjtag/include/jtag.h b/urjtag/include/jtag.h index 9006ce13..27eaa585 100644 --- a/urjtag/include/jtag.h +++ b/urjtag/include/jtag.h @@ -34,9 +34,9 @@ #include "bus.h" #include "part.h" -#define URJ_STATUS_OK 0 -#define URJ_STATUS_FAIL 1 -#define URJ_STATUS_SYNTAX_ERROR -1 +#define URJ_STATUS_OK 0 +#define URJ_STATUS_FAIL 1 +#define URJ_STATUS_SYNTAX_ERROR (-1) extern urj_bus_t *bus; diff --git a/urjtag/include/parport.h b/urjtag/include/parport.h index 00adff39..058303fe 100644 --- a/urjtag/include/parport.h +++ b/urjtag/include/parport.h @@ -24,7 +24,7 @@ */ #ifndef URJ_PARPORT_H -#define URJ_PARPORT_H +#define URJ_PARPORT_H #include diff --git a/urjtag/include/part.h b/urjtag/include/part.h index a4424a47..ed5d14ee 100644 --- a/urjtag/include/part.h +++ b/urjtag/include/part.h @@ -23,7 +23,7 @@ */ #ifndef URJ_PART_H -#define URJ_PART_H +#define URJ_PART_H #include @@ -32,9 +32,9 @@ #include "data_register.h" #include "bsbit.h" -#define URJ_PART_MANUFACTURER_MAXLEN 25 -#define URJ_PART_PART_MAXLEN 20 -#define URJ_PART_STEPPING_MAXLEN 8 +#define URJ_PART_MANUFACTURER_MAXLEN 25 +#define URJ_PART_PART_MAXLEN 20 +#define URJ_PART_STEPPING_MAXLEN 8 typedef struct urj_part urj_part_t; diff --git a/urjtag/include/pod.h b/urjtag/include/pod.h index 03a700ef..60513523 100644 --- a/urjtag/include/pod.h +++ b/urjtag/include/pod.h @@ -22,7 +22,7 @@ */ #ifndef URJ_POD_H -#define URJ_POD_H +#define URJ_POD_H typedef enum { diff --git a/urjtag/include/register.h b/urjtag/include/register.h index 271fc540..d6fb4f4f 100644 --- a/urjtag/include/register.h +++ b/urjtag/include/register.h @@ -23,7 +23,7 @@ */ #ifndef URJ_REGISTER_H -#define URJ_REGISTER_H +#define URJ_REGISTER_H typedef struct urj_tap_register { diff --git a/urjtag/include/tap.h b/urjtag/include/tap.h index 2e25509a..06a5ce0f 100644 --- a/urjtag/include/tap.h +++ b/urjtag/include/tap.h @@ -23,7 +23,7 @@ */ #ifndef URJ_TAP_H -#define URJ_TAP_H +#define URJ_TAP_H #include "register.h" #include "chain.h" diff --git a/urjtag/include/tap_state.h b/urjtag/include/tap_state.h index 01c6caac..1a1fb90e 100644 --- a/urjtag/include/tap_state.h +++ b/urjtag/include/tap_state.h @@ -22,39 +22,39 @@ * */ -#ifndef URJ_TAP_STATE_H -#define URJ_TAP_STATE_H +#ifndef URJ_TAP_STATE_H +#define URJ_TAP_STATE_H #include #include "chain.h" -#define URJ_TAP_STATE_DR URJ_BIT (0) -#define URJ_TAP_STATE_IR URJ_BIT (1) -#define URJ_TAP_STATE_SHIFT URJ_BIT (2) /* register shift with TMS = 0 */ -#define URJ_TAP_STATE_IDLE URJ_BIT (3) /* to Run-Test/Idle with TMS = 0 */ -#define URJ_TAP_STATE_CAPTURE URJ_BIT (4) /* Capture state */ -#define URJ_TAP_STATE_UPDATE URJ_BIT (5) /* to Update with TMS = 1 */ -#define URJ_TAP_STATE_PAUSE URJ_BIT (6) /* to Pause with TMS = 0 */ -#define URJ_TAP_STATE_RESET URJ_BIT (7) /* Test-Logic-Reset or unknown state */ +#define URJ_TAP_STATE_DR URJ_BIT (0) +#define URJ_TAP_STATE_IR URJ_BIT (1) +#define URJ_TAP_STATE_SHIFT URJ_BIT (2) /* register shift with TMS = 0 */ +#define URJ_TAP_STATE_IDLE URJ_BIT (3) /* to Run-Test/Idle with TMS = 0 */ +#define URJ_TAP_STATE_CAPTURE URJ_BIT (4) /* Capture state */ +#define URJ_TAP_STATE_UPDATE URJ_BIT (5) /* to Update with TMS = 1 */ +#define URJ_TAP_STATE_PAUSE URJ_BIT (6) /* to Pause with TMS = 0 */ +#define URJ_TAP_STATE_RESET URJ_BIT (7) /* Test-Logic-Reset or unknown state */ -#define URJ_TAP_STATE_UNKNOWN_STATE URJ_TAP_STATE_RESET -#define URJ_TAP_STATE_TEST_LOGIC_RESET (URJ_TAP_STATE_RESET | URJ_TAP_STATE_IDLE) -#define URJ_TAP_STATE_RUN_TEST_IDLE URJ_TAP_STATE_IDLE -#define URJ_TAP_STATE_SELECT_DR_SCAN URJ_TAP_STATE_DR -#define URJ_TAP_STATE_CAPTURE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_CAPTURE) -#define URJ_TAP_STATE_SHIFT_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT) -#define URJ_TAP_STATE_EXIT1_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_UPDATE | URJ_TAP_STATE_PAUSE) -#define URJ_TAP_STATE_PAUSE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_PAUSE) -#define URJ_TAP_STATE_EXIT2_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_UPDATE) -#define URJ_TAP_STATE_UPDATE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_IDLE) -#define URJ_TAP_STATE_SELECT_IR_SCAN URJ_TAP_STATE_IR -#define URJ_TAP_STATE_CAPTURE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_CAPTURE) -#define URJ_TAP_STATE_SHIFT_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT) -#define URJ_TAP_STATE_EXIT1_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_UPDATE | URJ_TAP_STATE_PAUSE) -#define URJ_TAP_STATE_PAUSE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_PAUSE) -#define URJ_TAP_STATE_EXIT2_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_UPDATE) -#define URJ_TAP_STATE_UPDATE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_IDLE) +#define URJ_TAP_STATE_UNKNOWN_STATE URJ_TAP_STATE_RESET +#define URJ_TAP_STATE_TEST_LOGIC_RESET (URJ_TAP_STATE_RESET | URJ_TAP_STATE_IDLE) +#define URJ_TAP_STATE_RUN_TEST_IDLE URJ_TAP_STATE_IDLE +#define URJ_TAP_STATE_SELECT_DR_SCAN URJ_TAP_STATE_DR +#define URJ_TAP_STATE_CAPTURE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_CAPTURE) +#define URJ_TAP_STATE_SHIFT_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT) +#define URJ_TAP_STATE_EXIT1_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_UPDATE | URJ_TAP_STATE_PAUSE) +#define URJ_TAP_STATE_PAUSE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_PAUSE) +#define URJ_TAP_STATE_EXIT2_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_UPDATE) +#define URJ_TAP_STATE_UPDATE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_IDLE) +#define URJ_TAP_STATE_SELECT_IR_SCAN URJ_TAP_STATE_IR +#define URJ_TAP_STATE_CAPTURE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_CAPTURE) +#define URJ_TAP_STATE_SHIFT_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT) +#define URJ_TAP_STATE_EXIT1_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_UPDATE | URJ_TAP_STATE_PAUSE) +#define URJ_TAP_STATE_PAUSE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_PAUSE) +#define URJ_TAP_STATE_EXIT2_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_UPDATE) +#define URJ_TAP_STATE_UPDATE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_IDLE) int urj_tap_state (urj_chain_t *chain); int urj_tap_state_init (urj_chain_t *chain); diff --git a/urjtag/include/usbconn.h b/urjtag/include/usbconn.h index 0a4b6775..63c53701 100644 --- a/urjtag/include/usbconn.h +++ b/urjtag/include/usbconn.h @@ -24,7 +24,7 @@ */ #ifndef URJ_USBCONN_H -#define URJ_USBCONN_H +#define URJ_USBCONN_H #include #include diff --git a/urjtag/src/bsdl/bsdl_bison.y b/urjtag/src/bsdl/bsdl_bison.y index e9387031..f801882a 100644 --- a/urjtag/src/bsdl/bsdl_bison.y +++ b/urjtag/src/bsdl/bsdl_bison.y @@ -146,10 +146,20 @@ int yylex (YYSTYPE *, void *); #if 1 #define ERROR_LIMIT 0 -#define BUMP_ERROR if (urj_bsdl_flex_postinc_compile_errors( priv_data->scanner ) > ERROR_LIMIT) \ - {Give_Up_And_Quit( priv_data ); YYABORT;} +#define BUMP_ERROR \ + do { \ + if (urj_bsdl_flex_postinc_compile_errors( priv_data->scanner ) > ERROR_LIMIT) \ + { \ + Give_Up_And_Quit( priv_data ); \ + YYABORT; \ + } \ + } while (0) #else -#define BUMP_ERROR {Give_Up_And_Quit( priv_data );YYABORT;} +#define BUMP_ERROR \ + do { \ + Give_Up_And_Quit( priv_data ); \ + YYABORT; \ + } while (0) #endif static void Print_Error( urj_bsdl_parser_priv_t *, const char * ); @@ -506,7 +516,7 @@ Safe_Value : IDENTIFIER char *tmp; tmp = (char *)malloc( 2 ); snprintf( tmp, 2, "%i", $1 ); - tmp[1] = '\0'; + tmp[1] = '\0'; $$ = tmp; } ; diff --git a/urjtag/src/bsdl/bsdl_flex.l b/urjtag/src/bsdl/bsdl_flex.l index 91215e40..34554eb0 100644 --- a/urjtag/src/bsdl/bsdl_flex.l +++ b/urjtag/src/bsdl/bsdl_flex.l @@ -142,10 +142,10 @@ LEGAL NOTICES: static char *new_string( urj_bsdl_scan_extra_t *, const char * ); -#define BINARY 0 +#define BINARY 0 #define DECIMAL 1 -#define BIN_X 2 -#define HEX 3 +#define BIN_X 2 +#define HEX 3 %} %a 2800 diff --git a/urjtag/src/bsdl/bsdl_sysdep.h b/urjtag/src/bsdl/bsdl_sysdep.h index 3f53e50b..4b62189a 100644 --- a/urjtag/src/bsdl/bsdl_sysdep.h +++ b/urjtag/src/bsdl/bsdl_sysdep.h @@ -23,23 +23,23 @@ */ #ifndef BSDL_SYSDEP_H -#define BSDL_SYSDEP_H +#define BSDL_SYSDEP_H #include "bsdl_config.h" #include "gettext.h" -#define _(s) gettext(s) -#define N_(s) gettext_noop(s) -#define P_(s,p,n) ngettext(s,p,n) +#define _(s) gettext(s) +#define N_(s) gettext_noop(s) +#define P_(s,p,n) ngettext(s,p,n) #ifdef S_SPLINT_S -#undef gettext -#define gettext(s) s -#undef gettext_noop -#define gettext_noop(s) s -#undef ngettext -#define ngettext(s,p,n) s +# undef gettext +# define gettext(s) s +# undef gettext_noop +# define gettext_noop(s) s +# undef ngettext +# define ngettext(s,p,n) s #endif #endif /* BSDL_SYSDEP_H */ diff --git a/urjtag/src/bsdl/vhdl_bison.y b/urjtag/src/bsdl/vhdl_bison.y index c104128e..2e84aa31 100644 --- a/urjtag/src/bsdl/vhdl_bison.y +++ b/urjtag/src/bsdl/vhdl_bison.y @@ -146,10 +146,20 @@ int yylex (YYSTYPE *, void *); #if 1 #define ERROR_LIMIT 15 -#define BUMP_ERROR if (urj_vhdl_flex_postinc_compile_errors( priv_data->scanner ) > ERROR_LIMIT) \ - {Give_Up_And_Quit( priv_data );YYABORT;} +#define BUMP_ERROR \ + do { \ + if (urj_vhdl_flex_postinc_compile_errors( priv_data->scanner ) > ERROR_LIMIT) \ + { \ + Give_Up_And_Quit( priv_data ); \ + YYABORT; \ + } \ + } while (0) #else -#define BUMP_ERROR {Give_Up_And_Quit( priv_data );YYABORT;} +#define BUMP_ERROR \ + do { \ + Give_Up_And_Quit( priv_data ); \ + YYABORT; \ + } while (0) #endif static void Init_Text( urj_bsdl_vhdl_parser_priv_t * ); @@ -487,7 +497,7 @@ VHDL_Constant : CONSTANT VHDL_Constant_Part ; VHDL_Constant_Part : IDENTIFIER COLON PIN_MAP_STRING COLON_EQUAL Quoted_String SEMICOLON - // { set_attr_const( priv_data, $1, strdup( "PIN_MAP_STRING" ) ); } + // { set_attr_const( priv_data, $1, strdup( "PIN_MAP_STRING" ) ); } { free( $1 ); } ; VHDL_Attribute : ATTRIBUTE VHDL_Attribute_Types @@ -509,7 +519,7 @@ VHDL_Attr_Boolean : IDENTIFIER OF IDENTIFIER COLON SIGNAL IS Boolean SEMICOLON //free( $3 ); /* skip boolean attributes for the time being */ free( $1 ); free( $3 ); - } + } ; Boolean : TRUE { $$ = 1; } @@ -520,23 +530,23 @@ VHDL_Attr_Decimal : IDENTIFIER OF IDENTIFIER COLON ENTITY IS DECIMAL_NUMBER SEMI { set_attr_decimal( priv_data, $1, $7 ); free( $3 ); - } + } ; VHDL_Attr_Real : IDENTIFIER OF IDENTIFIER COLON SIGNAL IS LPAREN REAL_NUMBER COMMA Stop RPAREN SEMICOLON { - //set_attr_real( priv_data, $1, $8 ); - //free( $3 ); + //set_attr_real( priv_data, $1, $8 ); + //free( $3 ); /* skip real attributes for the time being */ free( $1 ); free( $3 ); free( $8 ); - } + } ; Stop : LOW | BOTH ; VHDL_Attr_String : IDENTIFIER OF IDENTIFIER COLON ENTITY IS Quoted_String SEMICOLON { - set_attr_string( priv_data, $1, strdup( priv_data->buffer ) ); - free( $3 ); - } + set_attr_string( priv_data, $1, strdup( priv_data->buffer ) ); + free( $3 ); + } ; VHDL_Attr_PhysicalPinMap : IDENTIFIER OF IDENTIFIER COLON ENTITY IS PHYSICAL_PIN_MAP SEMICOLON { free( $1 ); free( $3 ); } diff --git a/urjtag/src/bsdl/vhdl_flex.l b/urjtag/src/bsdl/vhdl_flex.l index 9ddd2b38..41fa5689 100644 --- a/urjtag/src/bsdl/vhdl_flex.l +++ b/urjtag/src/bsdl/vhdl_flex.l @@ -142,9 +142,9 @@ LEGAL NOTICES: static char *new_string( urj_bsdl_scan_extra_t *, const char * ); -#define BINARY 0 +#define BINARY 0 #define DECIMAL 1 -#define BIN_X 2 +#define BIN_X 2 %} %a 2800 diff --git a/urjtag/src/bus/au1500.c b/urjtag/src/bus/au1500.c index 49237204..40f0130d 100644 --- a/urjtag/src/bus/au1500.c +++ b/urjtag/src/bus/au1500.c @@ -50,11 +50,11 @@ typedef struct urj_part_signal_t *rd[32]; } bus_params_t; -#define RAD ((bus_params_t *) bus->params)->rad -#define nRCS ((bus_params_t *) bus->params)->nrcs -#define nRWE ((bus_params_t *) bus->params)->nrwe -#define nROE ((bus_params_t *) bus->params)->nroe -#define RD ((bus_params_t *) bus->params)->rd +#define RAD ((bus_params_t *) bus->params)->rad +#define nRCS ((bus_params_t *) bus->params)->nrcs +#define nRWE ((bus_params_t *) bus->params)->nrwe +#define nROE ((bus_params_t *) bus->params)->nroe +#define RD ((bus_params_t *) bus->params)->rd /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/avr32.c b/urjtag/src/bus/avr32.c index ab6d6adb..31f5f53f 100644 --- a/urjtag/src/bus/avr32.c +++ b/urjtag/src/bus/avr32.c @@ -52,80 +52,80 @@ typedef struct uint32_t rwcs_wr; } bus_params_t; -#define BUS_MODE_OCD 0 -#define BUS_MODE_HSBC 1 -#define BUS_MODE_HSBU 2 -#define BUS_MODE_x8 3 -#define BUS_MODE_x16 4 -#define BUS_MODE_x32 5 - -#define BP (( bus_params_t *) bus->params) -#define SLAVE (BP->slave) -#define MODE (BP->mode) -#define ADDR_MASK (BP->addr_mask) -#define RWCS_RD (BP->rwcs_rd) -#define RWCS_WR (BP->rwcs_wr) +#define BUS_MODE_OCD 0 +#define BUS_MODE_HSBC 1 +#define BUS_MODE_HSBU 2 +#define BUS_MODE_x8 3 +#define BUS_MODE_x16 4 +#define BUS_MODE_x32 5 + +#define BP ((bus_params_t *) bus->params) +#define SLAVE (BP->slave) +#define MODE (BP->mode) +#define ADDR_MASK (BP->addr_mask) +#define RWCS_RD (BP->rwcs_rd) +#define RWCS_WR (BP->rwcs_wr) /* ------------------------------------------------------------------------- */ -#define SAB_SLAVE_OCD 1 -#define SAB_SLAVE_HSB_CACHED 4 -#define SAB_SLAVE_HSB_UNCACHED 5 +#define SAB_SLAVE_OCD 1 +#define SAB_SLAVE_HSB_CACHED 4 +#define SAB_SLAVE_HSB_UNCACHED 5 -#define ACCESS_MODE_WRITE 0 -#define ACCESS_MODE_READ 1 +#define ACCESS_MODE_WRITE 0 +#define ACCESS_MODE_READ 1 -#define ACCESS_STATUS_OK 0 -#define ACCESS_STATUS_ERR -1 +#define ACCESS_STATUS_OK 0 +#define ACCESS_STATUS_ERR -1 -#define SAB_OCD_AREA_SIZE UINT64_C(0x1000) -#define SAB_OCD_ADDR_MASK 0xfff -#define SAB_HSB_AREA_SIZE UINT64_C(0x100000000) -#define SAB_HSB_ADDR_MASK 0xffffffff +#define SAB_OCD_AREA_SIZE UINT64_C(0x1000) +#define SAB_OCD_ADDR_MASK 0xfff +#define SAB_HSB_AREA_SIZE UINT64_C(0x100000000) +#define SAB_HSB_ADDR_MASK 0xffffffff /* OCD register addresses */ -#define OCD_REG_RWCS 0x1c -#define OCD_REG_RWA 0x24 -#define OCD_REG_RWD 0x28 +#define OCD_REG_RWCS 0x1c +#define OCD_REG_RWA 0x24 +#define OCD_REG_RWD 0x28 /* OCD RWCS register definitions */ -#define OCD_RWCS_AC 0x80000000 /* start access */ -#define OCD_RWCS_SZ32 0x10000000 /* word access */ -#define OCD_RWCS_SZ16 0x08000000 /* half-word access */ -#define OCD_RWCS_SZ8 0x00000000 /* byte access */ -#define OCD_RWCS_RW 0x40000000 /* access mode 0:read, 1: write */ -#define OCD_RWCS_CNT_S 2 -#define OCD_RWCS_ERR 0x00000002 /* last access generated and error */ -#define OCD_RWCS_DV 0x00000001 /* data is valid */ +#define OCD_RWCS_AC 0x80000000 /* start access */ +#define OCD_RWCS_SZ32 0x10000000 /* word access */ +#define OCD_RWCS_SZ16 0x08000000 /* half-word access */ +#define OCD_RWCS_SZ8 0x00000000 /* byte access */ +#define OCD_RWCS_RW 0x40000000 /* access mode 0:read, 1: write */ +#define OCD_RWCS_CNT_S 2 +#define OCD_RWCS_ERR 0x00000002 /* last access generated and error */ +#define OCD_RWCS_DV 0x00000001 /* data is valid */ /* shorthands */ -#define OCD_RWCS_READONE (OCD_RWCS_AC | (1 << OCD_RWCS_CNT_S)) -#define OCD_RWCS_WRITEONE (OCD_RWCS_READONE | OCD_RWCS_RW) -#define OCD_RWCS_READ8 (OCD_RWCS_READONE | OCD_RWCS_SZ8) -#define OCD_RWCS_WRITE8 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ8) -#define OCD_RWCS_READ16 (OCD_RWCS_READONE | OCD_RWCS_SZ16) -#define OCD_RWCS_WRITE16 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ16) -#define OCD_RWCS_READ32 (OCD_RWCS_READONE | OCD_RWCS_SZ32) -#define OCD_RWCS_WRITE32 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ32) - -#define DBG_BASIC 0x0001 -#define DBG_SHIFT 0x0002 -#define DBG_TRACE 0x8000 - -#define DBG_ALL 0xffff - -#define DBG_LEVEL 0 - -#define DBG(t, f, ...) \ - do { \ - if (DBG_LEVEL & (t)) \ - printf( f, ## __VA_ARGS__ ); \ - } while (0) - -#define TRACE_ENTER() DBG(DBG_TRACE, ">>> %s", __FUNCTION__ ) -#define TRACE_EXIT() DBG(DBG_TRACE, "<<< %s", __FUNCTION__ ) - -#define ERR(f, ...) \ - printf( _("%s(%d): error, " f), __FILE__, __LINE__, ## __VA_ARGS__ ) +#define OCD_RWCS_READONE (OCD_RWCS_AC | (1 << OCD_RWCS_CNT_S)) +#define OCD_RWCS_WRITEONE (OCD_RWCS_READONE | OCD_RWCS_RW) +#define OCD_RWCS_READ8 (OCD_RWCS_READONE | OCD_RWCS_SZ8) +#define OCD_RWCS_WRITE8 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ8) +#define OCD_RWCS_READ16 (OCD_RWCS_READONE | OCD_RWCS_SZ16) +#define OCD_RWCS_WRITE16 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ16) +#define OCD_RWCS_READ32 (OCD_RWCS_READONE | OCD_RWCS_SZ32) +#define OCD_RWCS_WRITE32 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ32) + +#define DBG_BASIC 0x0001 +#define DBG_SHIFT 0x0002 +#define DBG_TRACE 0x8000 + +#define DBG_ALL 0xffff + +#define DBG_LEVEL 0 + +#define DBG(t, f, ...) \ + do { \ + if (DBG_LEVEL & (t)) \ + printf( f, ## __VA_ARGS__ ); \ + } while (0) + +#define TRACE_ENTER() DBG(DBG_TRACE, ">>> %s", __FUNCTION__ ) +#define TRACE_EXIT() DBG(DBG_TRACE, "<<< %s", __FUNCTION__ ) + +#define ERR(f, ...) \ + printf( _("%s(%d): error, " f), __FILE__, __LINE__, ## __VA_ARGS__ ) /* ------------------------------------------------------------------------- */ diff --git a/urjtag/src/bus/bcm1250.c b/urjtag/src/bus/bcm1250.c index 950d6666..3040a664 100644 --- a/urjtag/src/bus/bcm1250.c +++ b/urjtag/src/bus/bcm1250.c @@ -48,9 +48,9 @@ typedef struct urj_part_signal_t *io_oe_l; } bus_params_t; -#define IO_AD ((bus_params_t *) bus->params)->io_ad +#define IO_AD ((bus_params_t *) bus->params)->io_ad #define IO_CS_L ((bus_params_t *) bus->params)->io_cs_l -#define IO_RW ((bus_params_t *) bus->params)->io_rw +#define IO_RW ((bus_params_t *) bus->params)->io_rw #define IO_WR_L ((bus_params_t *) bus->params)->io_wr_l #define IO_OE_L ((bus_params_t *) bus->params)->io_oe_l diff --git a/urjtag/src/bus/bf533_ezkit.c b/urjtag/src/bus/bf533_ezkit.c index c886aa2e..2fa6ae12 100644 --- a/urjtag/src/bus/bf533_ezkit.c +++ b/urjtag/src/bus/bf533_ezkit.c @@ -51,16 +51,16 @@ typedef struct urj_part_signal_t *swe; } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data -#define AWE ((bus_params_t *) bus->params)->awe -#define AOE ((bus_params_t *) bus->params)->aoe -#define ABE ((bus_params_t *) bus->params)->abe -#define SRAS ((bus_params_t *) bus->params)->sras -#define SCAS ((bus_params_t *) bus->params)->scas -#define SMS ((bus_params_t *) bus->params)->sms -#define SWE ((bus_params_t *) bus->params)->swe +#define AMS ((bus_params_t *) bus->params)->ams +#define ADDR ((bus_params_t *) bus->params)->addr +#define DATA ((bus_params_t *) bus->params)->data +#define AWE ((bus_params_t *) bus->params)->awe +#define AOE ((bus_params_t *) bus->params)->aoe +#define ABE ((bus_params_t *) bus->params)->abe +#define SRAS ((bus_params_t *) bus->params)->sras +#define SCAS ((bus_params_t *) bus->params)->scas +#define SMS ((bus_params_t *) bus->params)->sms +#define SWE ((bus_params_t *) bus->params)->swe /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/bf533_stamp.c b/urjtag/src/bus/bf533_stamp.c index a6592f75..ade8963d 100644 --- a/urjtag/src/bus/bf533_stamp.c +++ b/urjtag/src/bus/bf533_stamp.c @@ -51,16 +51,16 @@ typedef struct urj_part_signal_t *swe; } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data -#define PF ((bus_params_t *) bus->params)->pf -#define AWE ((bus_params_t *) bus->params)->awe -#define AOE ((bus_params_t *) bus->params)->aoe -#define SRAS ((bus_params_t *) bus->params)->sras -#define SCAS ((bus_params_t *) bus->params)->scas -#define SMS ((bus_params_t *) bus->params)->sms -#define SWE ((bus_params_t *) bus->params)->swe +#define AMS ((bus_params_t *) bus->params)->ams +#define ADDR ((bus_params_t *) bus->params)->addr +#define DATA ((bus_params_t *) bus->params)->data +#define PF ((bus_params_t *) bus->params)->pf +#define AWE ((bus_params_t *) bus->params)->awe +#define AOE ((bus_params_t *) bus->params)->aoe +#define SRAS ((bus_params_t *) bus->params)->sras +#define SCAS ((bus_params_t *) bus->params)->scas +#define SMS ((bus_params_t *) bus->params)->sms +#define SWE ((bus_params_t *) bus->params)->swe /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/bf537_stamp.c b/urjtag/src/bus/bf537_stamp.c index f3d3f343..fa9e7bed 100644 --- a/urjtag/src/bus/bf537_stamp.c +++ b/urjtag/src/bus/bf537_stamp.c @@ -51,16 +51,16 @@ typedef struct urj_part_signal_t *swe; } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data -#define AWE ((bus_params_t *) bus->params)->awe -#define ARE ((bus_params_t *) bus->params)->are -#define ABE ((bus_params_t *) bus->params)->abe -#define SRAS ((bus_params_t *) bus->params)->sras -#define SCAS ((bus_params_t *) bus->params)->scas -#define SMS ((bus_params_t *) bus->params)->sms -#define SWE ((bus_params_t *) bus->params)->swe +#define AMS ((bus_params_t *) bus->params)->ams +#define ADDR ((bus_params_t *) bus->params)->addr +#define DATA ((bus_params_t *) bus->params)->data +#define AWE ((bus_params_t *) bus->params)->awe +#define ARE ((bus_params_t *) bus->params)->are +#define ABE ((bus_params_t *) bus->params)->abe +#define SRAS ((bus_params_t *) bus->params)->sras +#define SCAS ((bus_params_t *) bus->params)->scas +#define SMS ((bus_params_t *) bus->params)->sms +#define SWE ((bus_params_t *) bus->params)->swe /* * bus->driver->(*new_bus) @@ -325,17 +325,17 @@ bf537_stamp_bus_printinfo (urj_bus_t *bus) } #define BF537_STAMP_BUS_FUNCTIONS \ - bf537_stamp_bus_new, \ - urj_bus_generic_free, \ - bf537_stamp_bus_printinfo, \ - urj_bus_generic_prepare_extest, \ - bf537_stamp_bus_area, \ - bf537_stamp_bus_read_start, \ - bf537_stamp_bus_read_next, \ - bf537_stamp_bus_read_end, \ - urj_bus_generic_read, \ - bf537_stamp_bus_write, \ - urj_bus_generic_no_init + bf537_stamp_bus_new, \ + urj_bus_generic_free, \ + bf537_stamp_bus_printinfo, \ + urj_bus_generic_prepare_extest, \ + bf537_stamp_bus_area, \ + bf537_stamp_bus_read_start, \ + bf537_stamp_bus_read_next, \ + bf537_stamp_bus_read_end, \ + urj_bus_generic_read, \ + bf537_stamp_bus_write, \ + urj_bus_generic_no_init #ifdef ENABLE_BUS_BF537_STAMP diff --git a/urjtag/src/bus/bf548_ezkit.c b/urjtag/src/bus/bf548_ezkit.c index f631be8c..b1ca6831 100644 --- a/urjtag/src/bus/bf548_ezkit.c +++ b/urjtag/src/bus/bf548_ezkit.c @@ -48,14 +48,14 @@ typedef struct urj_part_signal_t *nce; } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data -#define AOE ((bus_params_t *) bus->params)->aoe -#define AWE ((bus_params_t *) bus->params)->awe -#define ARE ((bus_params_t *) bus->params)->are -#define DCS0 ((bus_params_t *) bus->params)->dcs0 -#define NCE ((bus_params_t *) bus->params)->nce +#define AMS ((bus_params_t *) bus->params)->ams +#define ADDR ((bus_params_t *) bus->params)->addr +#define DATA ((bus_params_t *) bus->params)->data +#define AOE ((bus_params_t *) bus->params)->aoe +#define AWE ((bus_params_t *) bus->params)->awe +#define ARE ((bus_params_t *) bus->params)->are +#define DCS0 ((bus_params_t *) bus->params)->dcs0 +#define NCE ((bus_params_t *) bus->params)->nce /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/bf561_ezkit.c b/urjtag/src/bus/bf561_ezkit.c index b877fac2..f45eaf83 100644 --- a/urjtag/src/bus/bf561_ezkit.c +++ b/urjtag/src/bus/bf561_ezkit.c @@ -51,16 +51,16 @@ typedef struct urj_part_signal_t *swe; } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define ABE ((bus_params_t *) bus->params)->abe -#define DATA ((bus_params_t *) bus->params)->data -#define AWE ((bus_params_t *) bus->params)->awe -#define AOE ((bus_params_t *) bus->params)->aoe -#define SRAS ((bus_params_t *) bus->params)->sras -#define SCAS ((bus_params_t *) bus->params)->scas -#define SMS ((bus_params_t *) bus->params)->sms -#define SWE ((bus_params_t *) bus->params)->swe +#define AMS ((bus_params_t *) bus->params)->ams +#define ADDR ((bus_params_t *) bus->params)->addr +#define ABE ((bus_params_t *) bus->params)->abe +#define DATA ((bus_params_t *) bus->params)->data +#define AWE ((bus_params_t *) bus->params)->awe +#define AOE ((bus_params_t *) bus->params)->aoe +#define SRAS ((bus_params_t *) bus->params)->sras +#define SCAS ((bus_params_t *) bus->params)->scas +#define SMS ((bus_params_t *) bus->params)->sms +#define SWE ((bus_params_t *) bus->params)->swe /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/bscoach.c b/urjtag/src/bus/bscoach.c index 7de81984..ef6c005c 100644 --- a/urjtag/src/bus/bscoach.c +++ b/urjtag/src/bus/bscoach.c @@ -52,14 +52,14 @@ typedef struct urj_part_signal_t *oe_f; } bus_params_t; -#define LAST_ADR ((bus_params_t *) bus->params)->last_adr -#define ADR ((bus_params_t *) bus->params)->adr -#define D ((bus_params_t *) bus->params)->d -#define DECA ((bus_params_t *) bus->params)->deca -#define DECB ((bus_params_t *) bus->params)->decb -#define DECC ((bus_params_t *) bus->params)->decc -#define WE_F ((bus_params_t *) bus->params)->we_f -#define OE_F ((bus_params_t *) bus->params)->oe_f +#define LAST_ADR ((bus_params_t *) bus->params)->last_adr +#define ADR ((bus_params_t *) bus->params)->adr +#define D ((bus_params_t *) bus->params)->d +#define DECA ((bus_params_t *) bus->params)->deca +#define DECB ((bus_params_t *) bus->params)->decb +#define DECC ((bus_params_t *) bus->params)->decc +#define WE_F ((bus_params_t *) bus->params)->we_f +#define OE_F ((bus_params_t *) bus->params)->oe_f /** diff --git a/urjtag/src/bus/buses.h b/urjtag/src/bus/buses.h index 3de9e6c9..9f2a807a 100644 --- a/urjtag/src/bus/buses.h +++ b/urjtag/src/bus/buses.h @@ -23,7 +23,7 @@ */ #ifndef URJ_BUS_BUSES_H -#define URJ_BUS_BUSES_H +#define URJ_BUS_BUSES_H extern const urj_bus_driver_t au1500_bus; extern const urj_bus_driver_t avr32_bus_driver; diff --git a/urjtag/src/bus/ejtag.c b/urjtag/src/bus/ejtag.c index d990fe91..099128cf 100644 --- a/urjtag/src/bus/ejtag.c +++ b/urjtag/src/bus/ejtag.c @@ -48,66 +48,66 @@ typedef struct uint16_t adr_hi; /* cached high bits of $3 */ } bus_params_t; -#define BP ((bus_params_t *) bus->params) +#define BP ((bus_params_t *) bus->params) -#define EJTAG_VER ((BP->impcode >> 29) & 7) +#define EJTAG_VER ((BP->impcode >> 29) & 7) -#define EJTAG_20 0 -#define EJTAG_25 1 -#define EJTAG_26 2 -#define EJTAG_31 3 +#define EJTAG_20 0 +#define EJTAG_25 1 +#define EJTAG_26 2 +#define EJTAG_31 3 /* EJTAG 3.1 Control Register Bits */ -#define VPED 23 /* R */ +#define VPED 23 /* R */ /* EJTAG 2.6 Control Register Bits */ -#define Rocc 31 /* R/W0 */ -#define Psz1 30 /* R */ -#define Psz0 29 /* R */ -#define Doze 22 /* R */ -#define ProbTrap 14 /* R/W */ -#define DebugMode 3 /* R */ +#define Rocc 31 /* R/W0 */ +#define Psz1 30 /* R */ +#define Psz0 29 /* R */ +#define Doze 22 /* R */ +#define ProbTrap 14 /* R/W */ +#define DebugMode 3 /* R */ /* EJTAG 1.5.3 Control Register Bits */ -#define Dnm 28 /* */ -#define Sync 23 /* R/W */ -#define Run 21 /* R */ -#define PerRst 20 /* R/W */ -#define PRnW 19 /* R 0 = Read, 1 = Write */ -#define PrAcc 18 /* R/W0 */ -#define DmaAcc 17 /* R/W */ -#define PrRst 16 /* R/W */ -#define ProbEn 15 /* R/W */ -#define SetDev 14 /* R */ -#define JtagBrk 12 /* R/W1 */ -#define DStrt 11 /* R/W1 */ -#define DeRR 10 /* R */ -#define DrWn 9 /* R/W */ -#define Dsz1 8 /* R/W */ -#define Dsz0 7 /* R/W */ -#define DLock 5 /* R/W */ -#define BrkSt 3 /* R */ -#define TIF 2 /* W0/R */ -#define TOF 1 /* W0/R */ -#define ClkEn 0 /* R/W */ +#define Dnm 28 /* */ +#define Sync 23 /* R/W */ +#define Run 21 /* R */ +#define PerRst 20 /* R/W */ +#define PRnW 19 /* R 0 = Read, 1 = Write */ +#define PrAcc 18 /* R/W0 */ +#define DmaAcc 17 /* R/W */ +#define PrRst 16 /* R/W */ +#define ProbEn 15 /* R/W */ +#define SetDev 14 /* R */ +#define JtagBrk 12 /* R/W1 */ +#define DStrt 11 /* R/W1 */ +#define DeRR 10 /* R */ +#define DrWn 9 /* R/W */ +#define Dsz1 8 /* R/W */ +#define Dsz0 7 /* R/W */ +#define DLock 5 /* R/W */ +#define BrkSt 3 /* R */ +#define TIF 2 /* W0/R */ +#define TOF 1 /* W0/R */ +#define ClkEn 0 /* R/W */ /* EJTAG 3.1 Debug Control Register at drseg 0xFF300000 */ -#define PCS 9 /* R */ -#define PCR2 8 /* R/W */ -#define PCR1 7 /* R/W */ -#define PCR0 6 /* R/W */ +#define PCS 9 /* R */ +#define PCR2 8 /* R/W */ +#define PCR1 7 /* R/W */ +#define PCR0 6 /* R/W */ /* EJTAG 2.X Debug Control Register at drseg 0xFF300000 */ -#define DataBrk 17 /* R */ -#define InstBrk 16 /* R */ -#define NMIPend 2 /* R */ -#define SRstE 1 /* R/W */ -#define DCRProbeEn 0 /* R */ +#define DataBrk 17 /* R */ +#define InstBrk 16 /* R */ +#define NMIPend 2 /* R */ +#define SRstE 1 /* R/W */ +#define DCRProbeEn 0 /* R */ /* EJTAG 1.5.3 Debug Control Register at drseg 0xFF300000*/ -#define HIS 30 /* R */ -#define ENM 29 /* R 0=Little End,1=Big Endian */ -#define MIntE 4 /* R/W */ -#define MNmiE 3 /* R/W */ -#define MemProt 2 /* R/W 0=WriteOK,1=Protected */ -#define MRst 1 /* R/W */ -#define TraceMode 0 /* R/W */ +#define HIS 30 /* R */ +#define ENM 29 /* R 0=Little End,1=Big Endian */ +#define MIntE 4 /* R/W */ +#define MNmiE 3 /* R/W */ +#define MemProt 2 /* R/W 0=WriteOK,1=Protected */ +#define MRst 1 /* R/W */ +#define TraceMode 0 /* R/W */ /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/ejtag_dma.c b/urjtag/src/bus/ejtag_dma.c index 799bca4e..7d8e42ee 100644 --- a/urjtag/src/bus/ejtag_dma.c +++ b/urjtag/src/bus/ejtag_dma.c @@ -54,33 +54,33 @@ typedef struct uint32_t impcode; /* EJTAG Implementation Register */ } bus_params_t; -#define BP ((bus_params_t *) bus->params) +#define BP ((bus_params_t *) bus->params) -#define EJTAG_VER ((BP->impcode >> 29) & 7) -#define EJTAG_20 0 -#define EJTAG_25 1 -#define EJTAG_26 2 +#define EJTAG_VER ((BP->impcode >> 29) & 7) +#define EJTAG_20 0 +#define EJTAG_25 1 +#define EJTAG_26 2 /* EJTAG control register bits */ -#define PerRst 20 -#define PRnW 19 -#define PrAcc 18 -#define PrRst 16 -#define ProbEn 15 -#define JtagBrk 12 -#define BrkSt 3 -#define Rocc 31 -#define ProbTrap 14 +#define PerRst 20 +#define PRnW 19 +#define PrAcc 18 +#define PrRst 16 +#define ProbEn 15 +#define JtagBrk 12 +#define BrkSt 3 +#define Rocc 31 +#define ProbTrap 14 /* DMA */ -#define DmaAcc 17 -#define DstRt 11 -#define DmaRwn 9 -#define Derr 10 +#define DmaAcc 17 +#define DstRt 11 +#define DmaRwn 9 +#define Derr 10 // default : DMA tranfser size BYTE -#define DMA_HALFWORD 7 -#define DMA_WORD 8 -#define DMA_BYTE 0 +#define DMA_HALFWORD 7 +#define DMA_WORD 8 +#define DMA_BYTE 0 /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/h7202.c b/urjtag/src/bus/h7202.c index ff072c6c..97555779 100644 --- a/urjtag/src/bus/h7202.c +++ b/urjtag/src/bus/h7202.c @@ -46,11 +46,11 @@ typedef struct urj_part_signal_t *nROE; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define nRCS ((bus_params_t *) bus->params)->nRCS -#define nRWE ((bus_params_t *) bus->params)->nRWE -#define nROE ((bus_params_t *) bus->params)->nROE +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define nRCS ((bus_params_t *) bus->params)->nRCS +#define nRWE ((bus_params_t *) bus->params)->nRWE +#define nROE ((bus_params_t *) bus->params)->nROE /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/ixp425.c b/urjtag/src/bus/ixp425.c index 145aa1ba..cd3948ad 100644 --- a/urjtag/src/bus/ixp425.c +++ b/urjtag/src/bus/ixp425.c @@ -46,11 +46,11 @@ typedef struct urj_part_signal_t *ex_rd; } bus_params_t; -#define EX_CS ((bus_params_t *) bus->params)->ex_cs -#define EX_ADDR ((bus_params_t *) bus->params)->ex_addr -#define EX_DATA ((bus_params_t *) bus->params)->ex_data -#define EX_WR ((bus_params_t *) bus->params)->ex_wr -#define EX_RD ((bus_params_t *) bus->params)->ex_rd +#define EX_CS ((bus_params_t *) bus->params)->ex_cs +#define EX_ADDR ((bus_params_t *) bus->params)->ex_addr +#define EX_DATA ((bus_params_t *) bus->params)->ex_data +#define EX_WR ((bus_params_t *) bus->params)->ex_wr +#define EX_RD ((bus_params_t *) bus->params)->ex_rd /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/jopcyc.c b/urjtag/src/bus/jopcyc.c index 0ea617b4..d3a9c7d6 100644 --- a/urjtag/src/bus/jopcyc.c +++ b/urjtag/src/bus/jopcyc.c @@ -69,19 +69,19 @@ #include "generic_bus.h" #include "tap_state.h" -#define RAM_ADDR_WIDTH 18 -#define RAM_DATA_WIDTH 16 -#define FLASH_ADDR_WIDTH 19 -#define FLASH_DATA_WIDTH 8 +#define RAM_ADDR_WIDTH 18 +#define RAM_DATA_WIDTH 16 +#define FLASH_ADDR_WIDTH 19 +#define FLASH_DATA_WIDTH 8 /* length is in number of bytes the full address width is taken to build the power of 2 */ -#define RAM_LENGTH (1 << (RAM_ADDR_WIDTH+1)) -#define FLASH_LENGTH (1 << FLASH_ADDR_WIDTH) +#define RAM_LENGTH (1 << (RAM_ADDR_WIDTH + 1)) +#define FLASH_LENGTH (1 << FLASH_ADDR_WIDTH) -#define RAMA_START 0 -#define RAMB_START RAM_LENGTH -#define FLASH_START 2*RAM_LENGTH +#define RAMA_START 0 +#define RAMB_START RAM_LENGTH +#define FLASH_START (2 * RAM_LENGTH) typedef enum { RAM, FLASH, NAND } ctype_t; diff --git a/urjtag/src/bus/lh7a400.c b/urjtag/src/bus/lh7a400.c index c62ce6c5..d6e460c6 100644 --- a/urjtag/src/bus/lh7a400.c +++ b/urjtag/src/bus/lh7a400.c @@ -46,10 +46,10 @@ #include "buses.h" #include "generic_bus.h" -#define ADR_NUM 24 -#define D_NUM 32 -#define nCS_NUM 4 -#define WIDTH_NUM 2 +#define ADR_NUM 24 +#define D_NUM 32 +#define nCS_NUM 4 +#define WIDTH_NUM 2 typedef struct { @@ -61,11 +61,11 @@ typedef struct urj_part_signal_t *width[WIDTH_NUM]; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define nCS ((bus_params_t *) bus->params)->ncs -#define nWE ((bus_params_t *) bus->params)->nwe -#define nOE ((bus_params_t *) bus->params)->noe +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define nCS ((bus_params_t *) bus->params)->ncs +#define nWE ((bus_params_t *) bus->params)->nwe +#define nOE ((bus_params_t *) bus->params)->noe #define WIDTH ((bus_params_t *) bus->params)->width /** diff --git a/urjtag/src/bus/mpc5200.c b/urjtag/src/bus/mpc5200.c index b94434d3..3d228a34 100644 --- a/urjtag/src/bus/mpc5200.c +++ b/urjtag/src/bus/mpc5200.c @@ -40,10 +40,10 @@ #include "buses.h" #include "generic_bus.h" -#define LPC_NUM_CS 6 -#define LPC_NUM_AD 32 -#define LPC_ADDR_TO_CS(a) (a >> bp->lpc_num_ad) -#define LPC_ADDR_SIZE ( ( (unsigned long long)1 << bp->lpc_num_ad ) * LPC_NUM_CS ) +#define LPC_NUM_CS 6 +#define LPC_NUM_AD 32 +#define LPC_ADDR_TO_CS(a) ((a) >> bp->lpc_num_ad) +#define LPC_ADDR_SIZE (((unsigned long long) 1 << bp->lpc_num_ad) * LPC_NUM_CS) typedef struct { @@ -59,13 +59,13 @@ typedef struct int lpc_num_d; } bus_params_t; -#define LAST_ADR ((bus_params_t *) bus->params)->last_adr -#define AD ((bus_params_t *) bus->params)->ad -#define nCS ((bus_params_t *) bus->params)->ncs -#define nWE ((bus_params_t *) bus->params)->nwe -#define nOE ((bus_params_t *) bus->params)->noe -#define nALE ((bus_params_t *) bus->params)->nale -#define ATA_ISO ((bus_params_t *) bus->params)->ata_iso +#define LAST_ADR ((bus_params_t *) bus->params)->last_adr +#define AD ((bus_params_t *) bus->params)->ad +#define nCS ((bus_params_t *) bus->params)->ncs +#define nWE ((bus_params_t *) bus->params)->nwe +#define nOE ((bus_params_t *) bus->params)->noe +#define nALE ((bus_params_t *) bus->params)->nale +#define ATA_ISO ((bus_params_t *) bus->params)->ata_iso /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/mpc824x.c b/urjtag/src/bus/mpc824x.c index 3122a7c9..39d1a8d1 100644 --- a/urjtag/src/bus/mpc824x.c +++ b/urjtag/src/bus/mpc824x.c @@ -52,14 +52,14 @@ typedef struct urj_part_signal_t *d[32]; } bus_params_t; -#define boot_nFOE ((bus_params_t *) bus->params)->boot_nfoe -#define boot_SDMA1 ((bus_params_t *) bus->params)->boot_sdma1 -#define LAST_ADR ((bus_params_t *) bus->params)->last_adr -#define AR ((bus_params_t *) bus->params)->ar -#define nRCS0 ((bus_params_t *) bus->params)->nrcs0 -#define nWE ((bus_params_t *) bus->params)->nwe -#define nFOE ((bus_params_t *) bus->params)->nfoe -#define D ((bus_params_t *) bus->params)->d +#define boot_nFOE ((bus_params_t *) bus->params)->boot_nfoe +#define boot_SDMA1 ((bus_params_t *) bus->params)->boot_sdma1 +#define LAST_ADR ((bus_params_t *) bus->params)->last_adr +#define AR ((bus_params_t *) bus->params)->ar +#define nRCS0 ((bus_params_t *) bus->params)->nrcs0 +#define nWE ((bus_params_t *) bus->params)->nwe +#define nFOE ((bus_params_t *) bus->params)->nfoe +#define D ((bus_params_t *) bus->params)->d static int BUS_WIDTH = 8; static char REVBITS = 0; diff --git a/urjtag/src/bus/ppc405ep.c b/urjtag/src/bus/ppc405ep.c index 38db8dbd..01b12823 100644 --- a/urjtag/src/bus/ppc405ep.c +++ b/urjtag/src/bus/ppc405ep.c @@ -43,11 +43,11 @@ typedef struct urj_part_signal_t *noe; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define nCS ((bus_params_t *) bus->params)->ncs -#define nWE ((bus_params_t *) bus->params)->nwe -#define nOE ((bus_params_t *) bus->params)->noe +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define nCS ((bus_params_t *) bus->params)->ncs +#define nWE ((bus_params_t *) bus->params)->nwe +#define nOE ((bus_params_t *) bus->params)->noe /** diff --git a/urjtag/src/bus/ppc440gx_ebc8.c b/urjtag/src/bus/ppc440gx_ebc8.c index 8c284445..919ee44c 100644 --- a/urjtag/src/bus/ppc440gx_ebc8.c +++ b/urjtag/src/bus/ppc440gx_ebc8.c @@ -45,11 +45,11 @@ typedef struct urj_part_signal_t *noe; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define nCS ((bus_params_t *) bus->params)->ncs -#define nWE ((bus_params_t *) bus->params)->nwe -#define nOE ((bus_params_t *) bus->params)->noe +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define nCS ((bus_params_t *) bus->params)->ncs +#define nWE ((bus_params_t *) bus->params)->nwe +#define nOE ((bus_params_t *) bus->params)->noe /** diff --git a/urjtag/src/bus/prototype.c b/urjtag/src/bus/prototype.c index b37906b4..1781555f 100644 --- a/urjtag/src/bus/prototype.c +++ b/urjtag/src/bus/prototype.c @@ -48,23 +48,23 @@ typedef struct int ashift; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define CS ((bus_params_t *) bus->params)->cs -#define WE ((bus_params_t *) bus->params)->we -#define OE ((bus_params_t *) bus->params)->oe - -#define ALSBI ((bus_params_t *) bus->params)->alsbi -#define AMSBI ((bus_params_t *) bus->params)->amsbi -#define AI ((bus_params_t *) bus->params)->ai -#define AW ((bus_params_t *) bus->params)->aw -#define DLSBI ((bus_params_t *) bus->params)->dlsbi -#define DMSBI ((bus_params_t *) bus->params)->dmsbi -#define DI ((bus_params_t *) bus->params)->di -#define DW ((bus_params_t *) bus->params)->dw -#define CSA ((bus_params_t *) bus->params)->csa -#define WEA ((bus_params_t *) bus->params)->wea -#define OEA ((bus_params_t *) bus->params)->oea +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define CS ((bus_params_t *) bus->params)->cs +#define WE ((bus_params_t *) bus->params)->we +#define OE ((bus_params_t *) bus->params)->oe + +#define ALSBI ((bus_params_t *) bus->params)->alsbi +#define AMSBI ((bus_params_t *) bus->params)->amsbi +#define AI ((bus_params_t *) bus->params)->ai +#define AW ((bus_params_t *) bus->params)->aw +#define DLSBI ((bus_params_t *) bus->params)->dlsbi +#define DMSBI ((bus_params_t *) bus->params)->dmsbi +#define DI ((bus_params_t *) bus->params)->di +#define DW ((bus_params_t *) bus->params)->dw +#define CSA ((bus_params_t *) bus->params)->csa +#define WEA ((bus_params_t *) bus->params)->wea +#define OEA ((bus_params_t *) bus->params)->oea #define ASHIFT ((bus_params_t *) bus->params)->ashift diff --git a/urjtag/src/bus/pxa2x0.c b/urjtag/src/bus/pxa2x0.c index 8f566ae5..285fe43f 100644 --- a/urjtag/src/bus/pxa2x0.c +++ b/urjtag/src/bus/pxa2x0.c @@ -53,8 +53,8 @@ * below */ -#define PROC_PXA25x 1 // including px26x series -#define PROC_PXA27x 2 +#define PROC_PXA25x 1 // including px26x series +#define PROC_PXA27x 2 #define nCS_TOTAL 6 @@ -121,20 +121,20 @@ typedef struct int proc; } bus_params_t; -#define PROC ((bus_params_t *) bus->params)->proc -#define LAST_ADR ((bus_params_t *) bus->params)->last_adr -#define MA ((bus_params_t *) bus->params)->ma -#define MD ((bus_params_t *) bus->params)->md -#define nCS ((bus_params_t *) bus->params)->ncs -#define DQM ((bus_params_t *) bus->params)->dqm -#define RDnWR ((bus_params_t *) bus->params)->rdnwr -#define nWE ((bus_params_t *) bus->params)->nwe -#define nOE ((bus_params_t *) bus->params)->noe -#define nSDCAS ((bus_params_t *) bus->params)->nsdcas +#define PROC ((bus_params_t *) bus->params)->proc +#define LAST_ADR ((bus_params_t *) bus->params)->last_adr +#define MA ((bus_params_t *) bus->params)->ma +#define MD ((bus_params_t *) bus->params)->md +#define nCS ((bus_params_t *) bus->params)->ncs +#define DQM ((bus_params_t *) bus->params)->dqm +#define RDnWR ((bus_params_t *) bus->params)->rdnwr +#define nWE ((bus_params_t *) bus->params)->nwe +#define nOE ((bus_params_t *) bus->params)->noe +#define nSDCAS ((bus_params_t *) bus->params)->nsdcas -#define MC_pointer (&((bus_params_t *) bus->params)->MC_registers) +#define MC_pointer (&((bus_params_t *) bus->params)->MC_registers) -#define INITED ((bus_params_t *) bus->params)->inited +#define INITED ((bus_params_t *) bus->params)->inited /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/pxa2x0_mc.h b/urjtag/src/bus/pxa2x0_mc.h index 47aed878..cc324dbd 100644 --- a/urjtag/src/bus/pxa2x0_mc.h +++ b/urjtag/src/bus/pxa2x0_mc.h @@ -42,8 +42,8 @@ * */ -#ifndef PXA2X0_MC_H -#define PXA2X0_MC_H +#ifndef PXA2X0_MC_H +#define PXA2X0_MC_H #include @@ -61,7 +61,7 @@ /* Memory Controller Registers */ -#define MC_BASE 0x48000000 +#define MC_BASE 0x48000000 #ifndef __ASSEMBLY__ typedef volatile struct MC_registers @@ -95,342 +95,342 @@ typedef volatile struct MC_registers } MC_registers_t; #ifdef PXA2X0_UNMAPPED -#define MC_pointer ((MC_registers_t*) MC_BASE) +#define MC_pointer ((MC_registers_t*) MC_BASE) #endif -#define MDCNFG MC_pointer->mdcnfg -#define MDREFR MC_pointer->mdrefr -#define MSC0 MC_pointer->msc0 -#define MSC1 MC_pointer->msc1 -#define MSC2 MC_pointer->msc2 -#define MECR MC_pointer->mecr -#define SXCNFG MC_pointer->sxcnfg -#define SXMRS MC_pointer->sxmrs -#define MCMEM0 MC_pointer->mcmem0 -#define MCMEM1 MC_pointer->mcmem1 -#define MCATT0 MC_pointer->mcatt0 -#define MCATT1 MC_pointer->mcatt1 -#define MCIO0 MC_pointer->mcio0 -#define MCIO1 MC_pointer->mcio1 -#define MDMRS MC_pointer->mdmrs -#define BOOT_DEF MC_pointer->boot_def +#define MDCNFG MC_pointer->mdcnfg +#define MDREFR MC_pointer->mdrefr +#define MSC0 MC_pointer->msc0 +#define MSC1 MC_pointer->msc1 +#define MSC2 MC_pointer->msc2 +#define MECR MC_pointer->mecr +#define SXCNFG MC_pointer->sxcnfg +#define SXMRS MC_pointer->sxmrs +#define MCMEM0 MC_pointer->mcmem0 +#define MCMEM1 MC_pointer->mcmem1 +#define MCATT0 MC_pointer->mcatt0 +#define MCATT1 MC_pointer->mcatt1 +#define MCIO0 MC_pointer->mcio0 +#define MCIO1 MC_pointer->mcio1 +#define MDMRS MC_pointer->mdmrs +#define BOOT_DEF MC_pointer->boot_def #if !defined(PXA2X0_NOPXA255) -#define MDMRSLP MC_pointer->mdmrslp +#define MDMRSLP MC_pointer->mdmrslp #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) -#define SA1111CR MC_pointer->sa1111cr +#define SA1111CR MC_pointer->sa1111cr #endif /* PXA260 and above only */ #endif /* __ASSEMBLY__ */ -#define MDCNFG_OFFSET 0x00 -#define MDREFR_OFFSET 0x04 -#define MSC0_OFFSET 0x08 -#define MSC1_OFFSET 0x0C -#define MSC2_OFFSET 0x10 -#define MECR_OFFSET 0x14 -#define SXCNFG_OFFSET 0x1C -#define SXMRS_OFFSET 0x24 -#define MCMEM0_OFFSET 0x28 -#define MCMEM1_OFFSET 0x2C -#define MCATT0_OFFSET 0x30 -#define MCATT1_OFFSET 0x34 -#define MCIO0_OFFSET 0x38 -#define MCIO1_OFFSET 0x3C -#define MDMRS_OFFSET 0x40 -#define BOOT_DEF_OFFSET 0x44 +#define MDCNFG_OFFSET 0x00 +#define MDREFR_OFFSET 0x04 +#define MSC0_OFFSET 0x08 +#define MSC1_OFFSET 0x0C +#define MSC2_OFFSET 0x10 +#define MECR_OFFSET 0x14 +#define SXCNFG_OFFSET 0x1C +#define SXMRS_OFFSET 0x24 +#define MCMEM0_OFFSET 0x28 +#define MCMEM1_OFFSET 0x2C +#define MCATT0_OFFSET 0x30 +#define MCATT1_OFFSET 0x34 +#define MCIO0_OFFSET 0x38 +#define MCIO1_OFFSET 0x3C +#define MDMRS_OFFSET 0x40 +#define BOOT_DEF_OFFSET 0x44 #if !defined(PXA2X0_NOPXA255) -#define MDMRSLP_OFFSET 0x58 +#define MDMRSLP_OFFSET 0x58 #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) -#define SA1111CR_OFFSET 0x64 +#define SA1111CR_OFFSET 0x64 #endif /* PXA260 and above only */ /* MDCNFG bits - see Table 6-3 in [1] and D25 in [2], Table 6-3 in [3], Table 6-2 in [4] */ -#define MDCNFG_DSA1111_2 URJ_BIT (28) -#define MDCNFG_DLATCH2 URJ_BIT (27) -#define MDCNFG_DTC2_MASK URJ_BITS (25,24) -#define MDCNFG_DTC2(x) URJ_BITS_VAL (25,24,x) -#define get_MDCNFG_DTC2(x) URJ_BITS_GET (25,24,x) -#define MDCNFG_DNB2 URJ_BIT (23) -#define MDCNFG_DRAC2_MASK URJ_BITS (22,21) -#define MDCNFG_DRAC2(x) URJ_BITS_VAL (22,21,x) -#define get_MDCNFG_DRAC2(x) URJ_BITS_GET (22,21,x) -#define MDCNFG_DCAC2_MASK URJ_BITS (20,19) -#define MDCNFG_DCAC2(x) URJ_BITS_VAL (20,19,x) -#define get_MDCNFG_DCAC2(x) URJ_BITS_GET (20,19,x) -#define MDCNFG_DWID2 URJ_BIT (18) -#define MDCNFG_DE3 URJ_BIT (17) -#define MDCNFG_DE2 URJ_BIT (16) -#define MDCNFG_DSA1111_0 URJ_BIT (12) -#define MDCNFG_DLATCH0 URJ_BIT (11) -#define MDCNFG_DTC0_MASK URJ_BITS (9,8) -#define MDCNFG_DTC0(x) URJ_BITS_VAL (9,8,x) -#define get_MDCNFG_DTC0(x) URJ_BITS_GET (9,8,x) -#define MDCNFG_DNB0 URJ_BIT (7) -#define MDCNFG_DRAC0_MASK URJ_BITS (6,5) -#define MDCNFG_DRAC0(x) URJ_BITS_VAL (6,5,x) -#define get_MDCNFG_DRAC0(x) URJ_BITS_GET (6,5,x) -#define MDCNFG_DCAC0_MASK URJ_BITS (4,3) -#define MDCNFG_DCAC0(x) URJ_BITS_VAL (4,3,x) -#define get_MDCNFG_DCAC0(x) URJ_BITS_GET (4,3,x) -#define MDCNFG_DWID0 URJ_BIT (2) -#define MDCNFG_DE1 URJ_BIT (1) -#define MDCNFG_DE0 URJ_BIT (0) +#define MDCNFG_DSA1111_2 URJ_BIT (28) +#define MDCNFG_DLATCH2 URJ_BIT (27) +#define MDCNFG_DTC2_MASK URJ_BITS (25,24) +#define MDCNFG_DTC2(x) URJ_BITS_VAL (25,24,x) +#define get_MDCNFG_DTC2(x) URJ_BITS_GET (25,24,x) +#define MDCNFG_DNB2 URJ_BIT (23) +#define MDCNFG_DRAC2_MASK URJ_BITS (22,21) +#define MDCNFG_DRAC2(x) URJ_BITS_VAL (22,21,x) +#define get_MDCNFG_DRAC2(x) URJ_BITS_GET (22,21,x) +#define MDCNFG_DCAC2_MASK URJ_BITS (20,19) +#define MDCNFG_DCAC2(x) URJ_BITS_VAL (20,19,x) +#define get_MDCNFG_DCAC2(x) URJ_BITS_GET (20,19,x) +#define MDCNFG_DWID2 URJ_BIT (18) +#define MDCNFG_DE3 URJ_BIT (17) +#define MDCNFG_DE2 URJ_BIT (16) +#define MDCNFG_DSA1111_0 URJ_BIT (12) +#define MDCNFG_DLATCH0 URJ_BIT (11) +#define MDCNFG_DTC0_MASK URJ_BITS (9,8) +#define MDCNFG_DTC0(x) URJ_BITS_VAL (9,8,x) +#define get_MDCNFG_DTC0(x) URJ_BITS_GET (9,8,x) +#define MDCNFG_DNB0 URJ_BIT (7) +#define MDCNFG_DRAC0_MASK URJ_BITS (6,5) +#define MDCNFG_DRAC0(x) URJ_BITS_VAL (6,5,x) +#define get_MDCNFG_DRAC0(x) URJ_BITS_GET (6,5,x) +#define MDCNFG_DCAC0_MASK URJ_BITS (4,3) +#define MDCNFG_DCAC0(x) URJ_BITS_VAL (4,3,x) +#define get_MDCNFG_DCAC0(x) URJ_BITS_GET (4,3,x) +#define MDCNFG_DWID0 URJ_BIT (2) +#define MDCNFG_DE1 URJ_BIT (1) +#define MDCNFG_DE0 URJ_BIT (0) /* MDREFR bits - see Table 6-5 in [1], Table 6-6 in [3], Table 6-5 in [4] */ -#define MDREFR_K2FREE URJ_BIT (25) -#define MDREFR_K1FREE URJ_BIT (24) -#define MDREFR_K0FREE URJ_BIT (23) -#define MDREFR_SLFRSH URJ_BIT (22) -#define MDREFR_APD URJ_BIT (20) -#define MDREFR_K2DB2 URJ_BIT (19) -#define MDREFR_K2RUN URJ_BIT (18) -#define MDREFR_K1DB2 URJ_BIT (17) -#define MDREFR_K1RUN URJ_BIT (16) -#define MDREFR_E1PIN URJ_BIT (15) -#define MDREFR_K0DB2 URJ_BIT (14) -#define MDREFR_K0RUN URJ_BIT (13) -#define MDREFR_E0PIN URJ_BIT (12) -#define MDREFR_DRI_MASK URJ_BITS (11,0) -#define MDREFR_DRI(x) URJ_BITS_VAL (11,0,x) -#define get_MDREFR_DRI(x) URJ_BITS_GET (11,0,x) +#define MDREFR_K2FREE URJ_BIT (25) +#define MDREFR_K1FREE URJ_BIT (24) +#define MDREFR_K0FREE URJ_BIT (23) +#define MDREFR_SLFRSH URJ_BIT (22) +#define MDREFR_APD URJ_BIT (20) +#define MDREFR_K2DB2 URJ_BIT (19) +#define MDREFR_K2RUN URJ_BIT (18) +#define MDREFR_K1DB2 URJ_BIT (17) +#define MDREFR_K1RUN URJ_BIT (16) +#define MDREFR_E1PIN URJ_BIT (15) +#define MDREFR_K0DB2 URJ_BIT (14) +#define MDREFR_K0RUN URJ_BIT (13) +#define MDREFR_E0PIN URJ_BIT (12) +#define MDREFR_DRI_MASK URJ_BITS (11,0) +#define MDREFR_DRI(x) URJ_BITS_VAL (11,0,x) +#define get_MDREFR_DRI(x) URJ_BITS_GET (11,0,x) /* MSC0 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */ -#define MSC0_RBUFF1 URJ_BIT (31) -#define MSC0_RRR1_MASK URJ_BITS (30,28) -#define MSC0_RRR1(x) URJ_BITS_VAL (30,28,x) -#define get_MSC0_RRR1(x) URJ_BITS_GET (30,28,x) -#define MSC0_RDN1_MASK URJ_BITS (27,24) -#define MSC0_RDN1(x) URJ_BITS_VAL (27,24,x) -#define get_MSC0_RDN1(x) URJ_BITS_GET (27,24,x) -#define MSC0_RDF1_MASK URJ_BITS (23,20) -#define MSC0_RDF1(x) URJ_BITS_VAL (23,20,x) -#define get_MSC0_RDF1(x) URJ_BITS_GET (23,20,x) -#define MSC0_RBW1 URJ_BIT (19) -#define MSC0_RT1_MASK URJ_BITS (18,16) -#define MSC0_RT1(x) URJ_BITS_VAL (18,16,x) -#define get_MSC0_RT1(x) URJ_BITS_GET (18,16,x) -#define MSC0_RBUFF0 URJ_BIT (15) -#define MSC0_RRR0_MASK URJ_BITS (14,12) -#define MSC0_RRR0(x) URJ_BITS_VAL (14,12,x) -#define get_MSC0_RRR0(x) URJ_BITS_GET (14,12,x) -#define MSC0_RDN0_MASK URJ_BITS (11,9) -#define MSC0_RDN0(x) URJ_BITS_VAL (11,8,x) -#define get_MSC0_RDN0(x) URJ_BITS_GET (11,8,x) -#define MSC0_RDF0_MASK URJ_BITS (7,4) -#define MSC0_RDF0(x) URJ_BITS_VAL (7,4,x) -#define get_MSC0_RDF0(x) URJ_BITS_GET (7,4,x) -#define MSC0_RBW0 URJ_BIT (3) -#define MSC0_RT0_MASK URJ_BITS (2,0) -#define MSC0_RT0(x) URJ_BITS_VAL (2,0,x) -#define get_MSC0_RT0(x) URJ_BITS_GET (2,0,x) +#define MSC0_RBUFF1 URJ_BIT (31) +#define MSC0_RRR1_MASK URJ_BITS (30,28) +#define MSC0_RRR1(x) URJ_BITS_VAL (30,28,x) +#define get_MSC0_RRR1(x) URJ_BITS_GET (30,28,x) +#define MSC0_RDN1_MASK URJ_BITS (27,24) +#define MSC0_RDN1(x) URJ_BITS_VAL (27,24,x) +#define get_MSC0_RDN1(x) URJ_BITS_GET (27,24,x) +#define MSC0_RDF1_MASK URJ_BITS (23,20) +#define MSC0_RDF1(x) URJ_BITS_VAL (23,20,x) +#define get_MSC0_RDF1(x) URJ_BITS_GET (23,20,x) +#define MSC0_RBW1 URJ_BIT (19) +#define MSC0_RT1_MASK URJ_BITS (18,16) +#define MSC0_RT1(x) URJ_BITS_VAL (18,16,x) +#define get_MSC0_RT1(x) URJ_BITS_GET (18,16,x) +#define MSC0_RBUFF0 URJ_BIT (15) +#define MSC0_RRR0_MASK URJ_BITS (14,12) +#define MSC0_RRR0(x) URJ_BITS_VAL (14,12,x) +#define get_MSC0_RRR0(x) URJ_BITS_GET (14,12,x) +#define MSC0_RDN0_MASK URJ_BITS (11,9) +#define MSC0_RDN0(x) URJ_BITS_VAL (11,8,x) +#define get_MSC0_RDN0(x) URJ_BITS_GET (11,8,x) +#define MSC0_RDF0_MASK URJ_BITS (7,4) +#define MSC0_RDF0(x) URJ_BITS_VAL (7,4,x) +#define get_MSC0_RDF0(x) URJ_BITS_GET (7,4,x) +#define MSC0_RBW0 URJ_BIT (3) +#define MSC0_RT0_MASK URJ_BITS (2,0) +#define MSC0_RT0(x) URJ_BITS_VAL (2,0,x) +#define get_MSC0_RT0(x) URJ_BITS_GET (2,0,x) /* MSC1 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */ -#define MSC1_RBUFF3 URJ_BIT (31) -#define MSC1_RRR3_MASK URJ_BITS (30,28) -#define MSC1_RRR3(x) URJ_BITS_VAL (30,28,x) -#define get_MSC1_RRR3(x) URJ_BITS_GET (30,28,x) -#define MSC1_RDN3_MASK URJ_BITS (27,24) -#define MSC1_RDN3(x) URJ_BITS_VAL (27,24,x) -#define get_MSC1_RDN3(x) URJ_BITS_GET (27,24,x) -#define MSC1_RDF3_MASK URJ_BITS (23,20) -#define MSC1_RDF3(x) URJ_BITS_VAL (23,20,x) -#define get_MSC1_RDF3(x) URJ_BITS_GET (23,20,x) -#define MSC1_RBW3 URJ_BIT (19) -#define MSC1_RT3_MASK URJ_BITS (18,16) -#define MSC1_RT3(x) URJ_BITS_VAL (18,16,x) -#define get_MSC1_RT3(x) URJ_BITS_GET (18,16,x) -#define MSC1_RBUFF2 URJ_BIT (15) -#define MSC1_RRR2_MASK URJ_BITS (14,12) -#define MSC1_RRR2(x) URJ_BITS_VAL (14,12,x) -#define get_MSC1_RRR2(x) URJ_BITS_GET (14,12,x) -#define MSC1_RDN2_MASK URJ_BITS (11,9) -#define MSC1_RDN2(x) URJ_BITS_VAL (11,8,x) -#define get_MSC1_RDN2(x) URJ_BITS_GET (11,8,x) -#define MSC1_RDF2_MASK URJ_BITS (7,4) -#define MSC1_RDF2(x) URJ_BITS_VAL (7,4,x) -#define get_MSC1_RDF2(x) URJ_BITS_GET (7,4,x) -#define MSC1_RBW2 URJ_BIT (3) -#define MSC1_RT2_MASK URJ_BITS (2,0) -#define MSC1_RT2(x) URJ_BITS_VAL (2,0,x) -#define get_MSC1_RT2(x) URJ_BITS_GET (2,0,x) +#define MSC1_RBUFF3 URJ_BIT (31) +#define MSC1_RRR3_MASK URJ_BITS (30,28) +#define MSC1_RRR3(x) URJ_BITS_VAL (30,28,x) +#define get_MSC1_RRR3(x) URJ_BITS_GET (30,28,x) +#define MSC1_RDN3_MASK URJ_BITS (27,24) +#define MSC1_RDN3(x) URJ_BITS_VAL (27,24,x) +#define get_MSC1_RDN3(x) URJ_BITS_GET (27,24,x) +#define MSC1_RDF3_MASK URJ_BITS (23,20) +#define MSC1_RDF3(x) URJ_BITS_VAL (23,20,x) +#define get_MSC1_RDF3(x) URJ_BITS_GET (23,20,x) +#define MSC1_RBW3 URJ_BIT (19) +#define MSC1_RT3_MASK URJ_BITS (18,16) +#define MSC1_RT3(x) URJ_BITS_VAL (18,16,x) +#define get_MSC1_RT3(x) URJ_BITS_GET (18,16,x) +#define MSC1_RBUFF2 URJ_BIT (15) +#define MSC1_RRR2_MASK URJ_BITS (14,12) +#define MSC1_RRR2(x) URJ_BITS_VAL (14,12,x) +#define get_MSC1_RRR2(x) URJ_BITS_GET (14,12,x) +#define MSC1_RDN2_MASK URJ_BITS (11,9) +#define MSC1_RDN2(x) URJ_BITS_VAL (11,8,x) +#define get_MSC1_RDN2(x) URJ_BITS_GET (11,8,x) +#define MSC1_RDF2_MASK URJ_BITS (7,4) +#define MSC1_RDF2(x) URJ_BITS_VAL (7,4,x) +#define get_MSC1_RDF2(x) URJ_BITS_GET (7,4,x) +#define MSC1_RBW2 URJ_BIT (3) +#define MSC1_RT2_MASK URJ_BITS (2,0) +#define MSC1_RT2(x) URJ_BITS_VAL (2,0,x) +#define get_MSC1_RT2(x) URJ_BITS_GET (2,0,x) /* MSC2 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */ -#define MSC2_RBUFF5 URJ_BIT (31) -#define MSC2_RRR5_MASK URJ_BITS (30,28) -#define MSC2_RRR5(x) URJ_BITS_VAL (30,28,x) -#define get_MSC2_RRR5(x) URJ_BITS_GET (30,28,x) -#define MSC2_RDN5_MASK URJ_BITS (27,24) -#define MSC2_RDN5(x) URJ_BITS_VAL (27,24,x) -#define get_MSC2_RDN5(x) URJ_BITS_GET (27,24,x) -#define MSC2_RDF5_MASK URJ_BITS (23,20) -#define MSC2_RDF5(x) URJ_BITS_VAL (23,20,x) -#define get_MSC2_RDF5(x) URJ_BITS_GET (23,20,x) -#define MSC2_RBW5 URJ_BIT (19) -#define MSC2_RT5_MASK URJ_BITS (18,16) -#define MSC2_RT5(x) URJ_BITS_VAL (18,16,x) -#define get_MSC2_RT5(x) URJ_BITS_GET (18,16,x) -#define MSC2_RBUFF4 URJ_BIT (15) -#define MSC2_RRR4_MASK URJ_BITS (14,12) -#define MSC2_RRR4(x) URJ_BITS_VAL (14,12,x) -#define get_MSC2_RRR4(x) URJ_BITS_GET (14,12,x) -#define MSC2_RDN4_MASK URJ_BITS (11,9) -#define MSC2_RDN4(x) URJ_BITS_VAL (11,8,x) -#define get_MSC2_RDN4(x) URJ_BITS_GET (11,8,x) -#define MSC2_RDF4_MASK URJ_BITS (7,4) -#define MSC2_RDF4(x) URJ_BITS_VAL (7,4,x) -#define get_MSC2_RDF4(x) URJ_BITS_GET (7,4,x) -#define MSC2_RBW4 URJ_BIT (3) -#define MSC2_RT4_MASK URJ_BITS (2,0) -#define MSC2_RT4(x) URJ_BITS_VAL (2,0,x) -#define get_MSC2_RT4(x) URJ_BITS_GET (2,0,x) +#define MSC2_RBUFF5 URJ_BIT (31) +#define MSC2_RRR5_MASK URJ_BITS (30,28) +#define MSC2_RRR5(x) URJ_BITS_VAL (30,28,x) +#define get_MSC2_RRR5(x) URJ_BITS_GET (30,28,x) +#define MSC2_RDN5_MASK URJ_BITS (27,24) +#define MSC2_RDN5(x) URJ_BITS_VAL (27,24,x) +#define get_MSC2_RDN5(x) URJ_BITS_GET (27,24,x) +#define MSC2_RDF5_MASK URJ_BITS (23,20) +#define MSC2_RDF5(x) URJ_BITS_VAL (23,20,x) +#define get_MSC2_RDF5(x) URJ_BITS_GET (23,20,x) +#define MSC2_RBW5 URJ_BIT (19) +#define MSC2_RT5_MASK URJ_BITS (18,16) +#define MSC2_RT5(x) URJ_BITS_VAL (18,16,x) +#define get_MSC2_RT5(x) URJ_BITS_GET (18,16,x) +#define MSC2_RBUFF4 URJ_BIT (15) +#define MSC2_RRR4_MASK URJ_BITS (14,12) +#define MSC2_RRR4(x) URJ_BITS_VAL (14,12,x) +#define get_MSC2_RRR4(x) URJ_BITS_GET (14,12,x) +#define MSC2_RDN4_MASK URJ_BITS (11,9) +#define MSC2_RDN4(x) URJ_BITS_VAL (11,8,x) +#define get_MSC2_RDN4(x) URJ_BITS_GET (11,8,x) +#define MSC2_RDF4_MASK URJ_BITS (7,4) +#define MSC2_RDF4(x) URJ_BITS_VAL (7,4,x) +#define get_MSC2_RDF4(x) URJ_BITS_GET (7,4,x) +#define MSC2_RBW4 URJ_BIT (3) +#define MSC2_RT4_MASK URJ_BITS (2,0) +#define MSC2_RT4(x) URJ_BITS_VAL (2,0,x) +#define get_MSC2_RT4(x) URJ_BITS_GET (2,0,x) /* MECR bits - see Table 6-27 in [1], Table 6-31 in [3], Table 6-27 in [4] */ -#define MECR_CIT URJ_BIT (1) -#define MECR_NOS URJ_BIT (0) +#define MECR_CIT URJ_BIT (1) +#define MECR_NOS URJ_BIT (0) /* SXCNFG bits - see Table 6-13 in [1], Table 6-14 in [3], Table 6-13 in [4] */ -#define SXCNFG_SXLATCH2 URJ_BIT (30) -#define SXCNFG_SXTP2_MASK URJ_BITS (29,28) -#define SXCNFG_SXTP2(x) URJ_BITS_VAL (29,28,x) -#define get_SXCNFG_SXTP2(x) URJ_BITS_GET (29,28,x) -#define SXCNFG_SXCA2_MASK URJ_BITS (27,26) -#define SXCNFG_SXCA2(x) URJ_BITS_VAL (27,26,x) -#define get_SXCNFG_SXCA2(x) URJ_BITS_GET (27,26,x) -#define SXCNFG_SXRA2_MASK URJ_BITS (25,24) -#define SXCNFG_SXRA2(x) URJ_BITS_VAL (25,24,x) -#define get_SXCNFG_SXRA2(x) URJ_BITS_GET (25,24,x) -#define SXCNFG_SXRL2_MASK URJ_BITS (23,21) -#define SXCNFG_SXRL2(x) URJ_BITS (23,21,x) -#define SXCNFG_SXCL2_MASK URJ_BITS (20,18) -#define SXCNFG_SXCL2(x) URJ_BITS_VAL (20,18,x) -#define get_SXCNFG_SXCL2(x) URJ_BITS_GET (20,18,x) -#define SXCNFG_SXEN2_MASK URJ_BITS (17,16) -#define SXCNFG_SXEN2(x) URJ_BITS_VAL (17,16,x) -#define get_SXCNFG_SXEN2(x) URJ_BITS_GET (17,16,x) -#define SXCNFG_SXLATCH0 URJ_BIT (14) -#define SXCNFG_SXTP0_MASK URJ_BITS (13,12) -#define SXCNFG_SXTP0(x) URJ_BITS_VAL (13,12,x) -#define get_SXCNFG_SXTP0(x) URJ_BITS_GET (13,12,x) -#define SXCNFG_SXCA0_MASK URJ_BITS (11,10) -#define SXCNFG_SXCA0(x) URJ_BITS_VAL (11,10,x) -#define get_SXCNFG_SXCA0(x) URJ_BITS_GET (11,10,x) -#define SXCNFG_SXRA0_MASK URJ_BITS (9,8) -#define SXCNFG_SXRA0(x) URJ_BITS_VAL (9,8,x) -#define get_SXCNFG_SXRA0(x) URJ_BITS_GET (9,8,x) -#define SXCNFG_SXRL0_MASK URJ_BITS (7,5) -#define SXCNFG_SXRL0(x) URJ_BITS (7,5,x) -#define SXCNFG_SXCL0_MASK URJ_BITS (4,2) -#define SXCNFG_SXCL0(x) URJ_BITS_VAL (4,2,x) -#define get_SXCNFG_SXCL0(x) URJ_BITS_GET (4,2,x) -#define SXCNFG_SXEN0_MASK URJ_BITS (1,0) -#define SXCNFG_SXEN0(x) URJ_BITS_VAL (1,0,x) -#define get_SXCNFG_SXEN0(x) URJ_BITS_GET (1,0,x) +#define SXCNFG_SXLATCH2 URJ_BIT (30) +#define SXCNFG_SXTP2_MASK URJ_BITS (29,28) +#define SXCNFG_SXTP2(x) URJ_BITS_VAL (29,28,x) +#define get_SXCNFG_SXTP2(x) URJ_BITS_GET (29,28,x) +#define SXCNFG_SXCA2_MASK URJ_BITS (27,26) +#define SXCNFG_SXCA2(x) URJ_BITS_VAL (27,26,x) +#define get_SXCNFG_SXCA2(x) URJ_BITS_GET (27,26,x) +#define SXCNFG_SXRA2_MASK URJ_BITS (25,24) +#define SXCNFG_SXRA2(x) URJ_BITS_VAL (25,24,x) +#define get_SXCNFG_SXRA2(x) URJ_BITS_GET (25,24,x) +#define SXCNFG_SXRL2_MASK URJ_BITS (23,21) +#define SXCNFG_SXRL2(x) URJ_BITS (23,21,x) +#define SXCNFG_SXCL2_MASK URJ_BITS (20,18) +#define SXCNFG_SXCL2(x) URJ_BITS_VAL (20,18,x) +#define get_SXCNFG_SXCL2(x) URJ_BITS_GET (20,18,x) +#define SXCNFG_SXEN2_MASK URJ_BITS (17,16) +#define SXCNFG_SXEN2(x) URJ_BITS_VAL (17,16,x) +#define get_SXCNFG_SXEN2(x) URJ_BITS_GET (17,16,x) +#define SXCNFG_SXLATCH0 URJ_BIT (14) +#define SXCNFG_SXTP0_MASK URJ_BITS (13,12) +#define SXCNFG_SXTP0(x) URJ_BITS_VAL (13,12,x) +#define get_SXCNFG_SXTP0(x) URJ_BITS_GET (13,12,x) +#define SXCNFG_SXCA0_MASK URJ_BITS (11,10) +#define SXCNFG_SXCA0(x) URJ_BITS_VAL (11,10,x) +#define get_SXCNFG_SXCA0(x) URJ_BITS_GET (11,10,x) +#define SXCNFG_SXRA0_MASK URJ_BITS (9,8) +#define SXCNFG_SXRA0(x) URJ_BITS_VAL (9,8,x) +#define get_SXCNFG_SXRA0(x) URJ_BITS_GET (9,8,x) +#define SXCNFG_SXRL0_MASK URJ_BITS (7,5) +#define SXCNFG_SXRL0(x) URJ_BITS (7,5,x) +#define SXCNFG_SXCL0_MASK URJ_BITS (4,2) +#define SXCNFG_SXCL0(x) URJ_BITS_VAL (4,2,x) +#define get_SXCNFG_SXCL0(x) URJ_BITS_GET (4,2,x) +#define SXCNFG_SXEN0_MASK URJ_BITS (1,0) +#define SXCNFG_SXEN0(x) URJ_BITS_VAL (1,0,x) +#define get_SXCNFG_SXEN0(x) URJ_BITS_GET (1,0,x) /* SXMRS bits - see Table 6-16 in [1], Table 6-17 in [3], Table 6-16 in [4] */ -#define SXMRS_SXMRS2_MASK URJ_BITS (30,16) -#define SXMRS_SXMRS2(x) URJ_BITS_VAL (30,16,x) -#define get_SXMRS_SXMRS2(x) URJ_BITS_GET (30,16,x) -#define SXMRS_SXMRS0_MASK URJ_BITS (14,0) -#define SXMRS_SXMRS0(x) URJ_BITS_VAL (14,0,x) -#define get_SXMRS_SXMRS0(x) URJ_BITS_GET (14,0,x) +#define SXMRS_SXMRS2_MASK URJ_BITS (30,16) +#define SXMRS_SXMRS2(x) URJ_BITS_VAL (30,16,x) +#define get_SXMRS_SXMRS2(x) URJ_BITS_GET (30,16,x) +#define SXMRS_SXMRS0_MASK URJ_BITS (14,0) +#define SXMRS_SXMRS0(x) URJ_BITS_VAL (14,0,x) +#define get_SXMRS_SXMRS0(x) URJ_BITS_GET (14,0,x) /* MCMEMx bits - see Table 6-23 in [1], Table 6-27 in [3], Table 6-23 in [4] */ -#define MCMEM_HOLD_MASK URJ_BITS (19,14) -#define MCMEM_HOLD(x) URJ_BITS_VAL (19,14,x) -#define get_MCMEM_HOLD(x) URJ_BITS_GET (19,14,x) -#define MCMEM_ASST_MASK URJ_BITS (11,7) -#define MCMEM_ASST(x) URJ_BITS_VAL (11,7,x) -#define get_MCMEM_ASST(x) URJ_BITS_GET (11,7,x) -#define MCMEM_SET_MASK URJ_BITS (6,0) -#define MCMEM_SET(x) URJ_BITS_VAL (6,0,x) -#define get_MCMEM_SET(x) URJ_BITS_GET (6,0,x) +#define MCMEM_HOLD_MASK URJ_BITS (19,14) +#define MCMEM_HOLD(x) URJ_BITS_VAL (19,14,x) +#define get_MCMEM_HOLD(x) URJ_BITS_GET (19,14,x) +#define MCMEM_ASST_MASK URJ_BITS (11,7) +#define MCMEM_ASST(x) URJ_BITS_VAL (11,7,x) +#define get_MCMEM_ASST(x) URJ_BITS_GET (11,7,x) +#define MCMEM_SET_MASK URJ_BITS (6,0) +#define MCMEM_SET(x) URJ_BITS_VAL (6,0,x) +#define get_MCMEM_SET(x) URJ_BITS_GET (6,0,x) /* MCATTx bits - see Table 6-24 in [1], Table 6-28 in [3], Table 6-24 in [4] */ -#define MCATT_HOLD_MASK URJ_BITS (19,14) -#define MCATT_HOLD(x) URJ_BITS_VAL (19,14,x) -#define get_MCATT_HOLD(x) URJ_BITS_GET (19,14,x) -#define MCATT_ASST_MASK URJ_BITS (11,7) -#define MCATT_ASST(x) URJ_BITS_VAL (11,7,x) -#define get_MCATT_ASST(x) URJ_BITS_GET (11,7,x) -#define MCATT_SET_MASK URJ_BITS (6,0) -#define MCATT_SET(x) URJ_BITS_VAL (6,0,x) -#define get_MCATT_SET(x) URJ_BITS_GET (6,0,x) +#define MCATT_HOLD_MASK URJ_BITS (19,14) +#define MCATT_HOLD(x) URJ_BITS_VAL (19,14,x) +#define get_MCATT_HOLD(x) URJ_BITS_GET (19,14,x) +#define MCATT_ASST_MASK URJ_BITS (11,7) +#define MCATT_ASST(x) URJ_BITS_VAL (11,7,x) +#define get_MCATT_ASST(x) URJ_BITS_GET (11,7,x) +#define MCATT_SET_MASK URJ_BITS (6,0) +#define MCATT_SET(x) URJ_BITS_VAL (6,0,x) +#define get_MCATT_SET(x) URJ_BITS_GET (6,0,x) /* MCIOx bits - see Table 6-25 in [1], Table 6-29 in [3], Table 6-25 in [4] */ -#define MCIO_HOLD_MASK URJ_BITS (19,14) -#define MCIO_HOLD(x) URJ_BITS_VAL (19,14,x) -#define get_MCIO_HOLD(x) URJ_BITS_GET (19,14,x) -#define MCIO_ASST_MASK URJ_BITS (11,7) -#define MCIO_ASST(x) URJ_BITS_VAL (11,7,x) -#define get_MCIO_ASST(x) URJ_BITS_GET (11,7,x) -#define MCIO_SET_MASK URJ_BITS (6,0) -#define MCIO_SET(x) URJ_BITS_VAL (6,0,x) -#define get_MCIO_SET(x) URJ_BITS_GET (6,0,x) +#define MCIO_HOLD_MASK URJ_BITS (19,14) +#define MCIO_HOLD(x) URJ_BITS_VAL (19,14,x) +#define get_MCIO_HOLD(x) URJ_BITS_GET (19,14,x) +#define MCIO_ASST_MASK URJ_BITS (11,7) +#define MCIO_ASST(x) URJ_BITS_VAL (11,7,x) +#define get_MCIO_ASST(x) URJ_BITS_GET (11,7,x) +#define MCIO_SET_MASK URJ_BITS (6,0) +#define MCIO_SET(x) URJ_BITS_VAL (6,0,x) +#define get_MCIO_SET(x) URJ_BITS_GET (6,0,x) /* MDMRS bits - see Table 6-4 in [1], Table 6-4 in [3], Table 6-3 in [4] */ -#define MDMRS_MDMRS2_MASK URJ_BITS (30,23) -#define MDMRS_MDMRS2(x) URJ_BITS_VAL (30,23,x) -#define get_MDMRS_MDMRS2(x) URJ_BITS_GET (30,23,x) -#define MDMRS_MDCL2_MASK URJ_BITS (22,20) -#define MDMRS_MDCL2(x) URJ_BITS_VAL (22,20,x) -#define get_MDMRS_MDCL2(x) URJ_BITS_GET (22,20,x) -#define MDMRS_MDADD2 URJ_BIT (19) -#define MDMRS_MDBL2_MASK URJ_BITS (18,16) -#define MDMRS_MDBL2(x) URJ_BITS_VAL (18,16,x) -#define get_MDMRS_MDBL2(x) URJ_BITS_GET (18,16,x) -#define MDMRS_MDMRS0_MASK URJ_BITS (14,7) -#define MDMRS_MDMRS0(x) URJ_BITS_VAL (14,7,x) -#define get_MDMRS_MDMRS0(x) URJ_BITS_GET (14,7,x) -#define MDMRS_MDCL0_MASK URJ_BITS (6,4) -#define MDMRS_MDCL0(x) URJ_BITS_VAL (6,4,x) -#define get_MDMRS_MDCL0(x) URJ_BITS_GET (6,4,x) -#define MDMRS_MDADD0 URJ_BIT (3) -#define MDMRS_MDBL0_MASK URJ_BITS (2,0) -#define MDMRS_MDBL0(x) URJ_BITS_VAL (2,0,x) -#define get_MDMRS_MDBL0(x) URJ_BITS_GET (2,0,x) +#define MDMRS_MDMRS2_MASK URJ_BITS (30,23) +#define MDMRS_MDMRS2(x) URJ_BITS_VAL (30,23,x) +#define get_MDMRS_MDMRS2(x) URJ_BITS_GET (30,23,x) +#define MDMRS_MDCL2_MASK URJ_BITS (22,20) +#define MDMRS_MDCL2(x) URJ_BITS_VAL (22,20,x) +#define get_MDMRS_MDCL2(x) URJ_BITS_GET (22,20,x) +#define MDMRS_MDADD2 URJ_BIT (19) +#define MDMRS_MDBL2_MASK URJ_BITS (18,16) +#define MDMRS_MDBL2(x) URJ_BITS_VAL (18,16,x) +#define get_MDMRS_MDBL2(x) URJ_BITS_GET (18,16,x) +#define MDMRS_MDMRS0_MASK URJ_BITS (14,7) +#define MDMRS_MDMRS0(x) URJ_BITS_VAL (14,7,x) +#define get_MDMRS_MDMRS0(x) URJ_BITS_GET (14,7,x) +#define MDMRS_MDCL0_MASK URJ_BITS (6,4) +#define MDMRS_MDCL0(x) URJ_BITS_VAL (6,4,x) +#define get_MDMRS_MDCL0(x) URJ_BITS_GET (6,4,x) +#define MDMRS_MDADD0 URJ_BIT (3) +#define MDMRS_MDBL0_MASK URJ_BITS (2,0) +#define MDMRS_MDBL0(x) URJ_BITS_VAL (2,0,x) +#define get_MDMRS_MDBL0(x) URJ_BITS_GET (2,0,x) /* BOOT_DEF bits - see Table 6-37 in [1], Table 6-40 in [3], Table 6-37 in [4] */ -#define BOOT_DEF_PKG_TYPE URJ_BIT (3) -#define BOOT_DEF_BOOT_SEL_MASK URJ_BITS (2,0) -#define BOOT_DEF_BOOT_SEL(x) URJ_BITS_VAL (2,0,x) -#define get_BOOT_DEF_BOOT_SEL(x) URJ_BITS_GET (2,0,x) +#define BOOT_DEF_PKG_TYPE URJ_BIT (3) +#define BOOT_DEF_BOOT_SEL_MASK URJ_BITS (2,0) +#define BOOT_DEF_BOOT_SEL(x) URJ_BITS_VAL (2,0,x) +#define get_BOOT_DEF_BOOT_SEL(x) URJ_BITS_GET (2,0,x) #if !defined(PXA2X0_NOPXA255) /* MDMRSLP bits - see Table 6-5 in [3], Table 6-4 in [4] */ -#define MDMRSLP_MDLPEN2 URJ_BIT (31) -#define MDMRSLP_MDMRSLP2_MASK URJ_BITS (30,16) -#define MDMRSLP_MDMRSLP2(x) URJ_BITS_VAL (30,16,x) -#define get_MDMRSLP_MDMRSLP2(x) URJ_BITS_GET (30,16,x) -#define MDMRSLP_MDLPEN0 URJ_BIT (15) -#define MDMRSLP_MDMRSLP0_MASK URJ_BITS (14,0) -#define MDMRSLP_MDMRSLP0(x) URJ_BITS_VAL (14,0,x) -#define get_MDMRSLP_MDMRSLP0(x) URJ_BITS_GET (14,0,x) +#define MDMRSLP_MDLPEN2 URJ_BIT (31) +#define MDMRSLP_MDMRSLP2_MASK URJ_BITS (30,16) +#define MDMRSLP_MDMRSLP2(x) URJ_BITS_VAL (30,16,x) +#define get_MDMRSLP_MDMRSLP2(x) URJ_BITS_GET (30,16,x) +#define MDMRSLP_MDLPEN0 URJ_BIT (15) +#define MDMRSLP_MDMRSLP0_MASK URJ_BITS (14,0) +#define MDMRSLP_MDMRSLP0(x) URJ_BITS_VAL (14,0,x) +#define get_MDMRSLP_MDMRSLP0(x) URJ_BITS_GET (14,0,x) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) /* SA1111CR bits - see Table 6-24 in [3] */ -#define SA1111CR_SA1111_5 URJ_BIT (5) -#define SA1111CR_SA1111_4 URJ_BIT (4) -#define SA1111CR_SA1111_3 URJ_BIT (3) -#define SA1111CR_SA1111_2 URJ_BIT (2) -#define SA1111CR_SA1111_1 URJ_BIT (1) -#define SA1111CR_SA1111_0 URJ_BIT (0) +#define SA1111CR_SA1111_5 URJ_BIT (5) +#define SA1111CR_SA1111_4 URJ_BIT (4) +#define SA1111CR_SA1111_3 URJ_BIT (3) +#define SA1111CR_SA1111_2 URJ_BIT (2) +#define SA1111CR_SA1111_1 URJ_BIT (1) +#define SA1111CR_SA1111_0 URJ_BIT (0) #endif /* PXA260 and above only */ #endif /* PXA2X0_MC_H */ diff --git a/urjtag/src/bus/s3c4510x.c b/urjtag/src/bus/s3c4510x.c index 8704aab4..4d14ce6f 100644 --- a/urjtag/src/bus/s3c4510x.c +++ b/urjtag/src/bus/s3c4510x.c @@ -27,7 +27,7 @@ ** Krzysztof Blaszkowski ** - fixed bug with driving nWBE, nECS, nSDCS (for SDRAM), ** - fixed bug with preparing bus state after each urj_tap_chain_shift_data_registers(). -** tested on "peek" command only (2003/10/07). +** tested on "peek" command only (2003/10/07). ** ** @brief ** Bus driver for Samsung S3C4510X (ARM7TDMI) micro controller. @@ -455,107 +455,107 @@ const urj_bus_driver_t s3c4510_bus = { ** Revision 1.5 2003/09/10 12:38:01 telka ** 2003-09-10 Marcel Telka ** -** * src/bus/bcm1250.c (bcm1250_bus_printinfo, bcm1250_bus): Fixed typo (compatibile->compatible) in -** output message (thanks to Andreas Mohr). -** * src/bus/ixp425.c (ixp425_bus_printinfo, ixp425_bus): Ditto. -** * src/bus/pxa2x0.c (pxa2x0_bus_printinfo, pxa2x0_bus): Ditto. -** * src/bus/s3c4510x.c (s3c4510_bus_printinfo, s3c4510_bus): Ditto. -** * src/bus/sa1110.c (sa1110_bus_printinfo, sa1110_bus): Ditto. -** * src/bus/sh7727.c (sh7727_bus_printinfo, sh7727_bus): Ditto. -** * src/bus/sh7750r.c (sh7750r_bus_printinfo, sh7750r_bus): Ditto. -** * src/bus/sh7751r.c (sh7751r_bus_printinfo, sh7751r_bus): Ditto. +** * src/bus/bcm1250.c (bcm1250_bus_printinfo, bcm1250_bus): Fixed typo (compatibile->compatible) in +** output message (thanks to Andreas Mohr). +** * src/bus/ixp425.c (ixp425_bus_printinfo, ixp425_bus): Ditto. +** * src/bus/pxa2x0.c (pxa2x0_bus_printinfo, pxa2x0_bus): Ditto. +** * src/bus/s3c4510x.c (s3c4510_bus_printinfo, s3c4510_bus): Ditto. +** * src/bus/sa1110.c (sa1110_bus_printinfo, sa1110_bus): Ditto. +** * src/bus/sh7727.c (sh7727_bus_printinfo, sh7727_bus): Ditto. +** * src/bus/sh7750r.c (sh7750r_bus_printinfo, sh7750r_bus): Ditto. +** * src/bus/sh7751r.c (sh7751r_bus_printinfo, sh7751r_bus): Ditto. ** ** Revision 1.4 2003/09/05 21:09:14 telka ** 2003-09-05 Marcel Telka ** -** * include/bus.h (bus_drivers): Added constant declaration. -** (new_sa1110_bus, new_pxa250_bus, new_ixp425_bus, new_sh7727_bus, new_sh7750r_bus, new_sh7751r_bus) -** (new_bcm1250_bus): Function declarations removed. -** * src/bus/buses.c (bus_drivers): New constant definition. -** * src/bus/buses.h: New file. -** * src/bus/Makefile.am (libbus_a_SOURCES): Added buses.h. +** * include/bus.h (bus_drivers): Added constant declaration. +** (new_sa1110_bus, new_pxa250_bus, new_ixp425_bus, new_sh7727_bus, new_sh7750r_bus, new_sh7751r_bus) +** (new_bcm1250_bus): Function declarations removed. +** * src/bus/buses.c (bus_drivers): New constant definition. +** * src/bus/buses.h: New file. +** * src/bus/Makefile.am (libbus_a_SOURCES): Added buses.h. ** -** * src/bus/bcm1250.c (bcm1250_bus_printinfo): Added new function parameter 'bus'. -** (bcm1250_bus): Changed structure type to urj_bus_driver_t. Changed members. -** (new_bcm1250_bus): Function renamed ... -** (bcm1250_bus_new): ... to this one. Changed parameter list to void (and function body updated). -** * src/bus/ixp425.c (ixp425_bus_printinfo): Added new function parameter 'bus'. -** (ixp425_bus): Changed structure type to urj_bus_driver_t. Changed members. -** (new_ixp425_bus): Function renamed ... -** (ixp425_bus_new): ... to this one. Changed parameter list to void (and function body updated). -** * src/bus/pxa2x0.c (pxa2x0_bus_printinfo): Added new function parameter 'bus'. -** (pxa250_bus): Structure transformed ... -** (pxa2x0_bus): ... to this constant (changed type to urj_bus_driver_t, changed members). -** (new_pxa250_bus): Function renamed ... -** (pxa2x0_bus_new): ... to this one. Changed parameter list to void (and function body updated). -** * src/bus/s3c4510x.c (s3c4510_bus_printinfo): Added new function parameter 'bus'. -** (s3c4510_bus): Changed structure type to urj_bus_driver_t. Changed members. -** (new_s3c4510_bus): Function renamed ... -** (s3c4510_bus_new): ... to this one. Changed parameter list to void (and function body updated). -** * src/bus/sa1110.c (sa1110_bus_printinfo): Added new function parameter 'bus'. -** (sa1110_bus): Changed structure type to urj_bus_driver_t. Changed members. -** (new_sa1110_bus): Function renamed ... -** (sa1110_bus_new): ... to this one. Changed parameter list to void (and function body updated). -** * src/bus/sh7727.c (sh7727_bus_printinfo): Added new function parameter 'bus'. -** (sh7727_bus): Changed structure type to urj_bus_driver_t. Changed members. -** (new_sh7727_bus): Function renamed ... -** (sh7727_bus_new): ... to this one. Changed parameter list to void (and function body updated). -** * src/bus/sh7750r.c (sh7750r_bus_printinfo): Added new function parameter 'bus'. -** (sh7750r_bus): Changed structure type to urj_bus_driver_t. Changed members. -** (new_sh7750r_bus): Function renamed ... -** (sh7750r_bus_new): ... to this one. Changed parameter list to void (and function body updated). -** * src/bus/sh7751r.c (sh7751r_bus_printinfo): Added new function parameter 'bus'. -** (sh7751r_bus): Changed structure type to urj_bus_driver_t. Changed members. -** (new_sh7751r_bus): Function renamed ... -** (sh7751r_bus_new): ... to this one. Changed parameter list to void (and function body updated). +** * src/bus/bcm1250.c (bcm1250_bus_printinfo): Added new function parameter 'bus'. +** (bcm1250_bus): Changed structure type to urj_bus_driver_t. Changed members. +** (new_bcm1250_bus): Function renamed ... +** (bcm1250_bus_new): ... to this one. Changed parameter list to void (and function body updated). +** * src/bus/ixp425.c (ixp425_bus_printinfo): Added new function parameter 'bus'. +** (ixp425_bus): Changed structure type to urj_bus_driver_t. Changed members. +** (new_ixp425_bus): Function renamed ... +** (ixp425_bus_new): ... to this one. Changed parameter list to void (and function body updated). +** * src/bus/pxa2x0.c (pxa2x0_bus_printinfo): Added new function parameter 'bus'. +** (pxa250_bus): Structure transformed ... +** (pxa2x0_bus): ... to this constant (changed type to urj_bus_driver_t, changed members). +** (new_pxa250_bus): Function renamed ... +** (pxa2x0_bus_new): ... to this one. Changed parameter list to void (and function body updated). +** * src/bus/s3c4510x.c (s3c4510_bus_printinfo): Added new function parameter 'bus'. +** (s3c4510_bus): Changed structure type to urj_bus_driver_t. Changed members. +** (new_s3c4510_bus): Function renamed ... +** (s3c4510_bus_new): ... to this one. Changed parameter list to void (and function body updated). +** * src/bus/sa1110.c (sa1110_bus_printinfo): Added new function parameter 'bus'. +** (sa1110_bus): Changed structure type to urj_bus_driver_t. Changed members. +** (new_sa1110_bus): Function renamed ... +** (sa1110_bus_new): ... to this one. Changed parameter list to void (and function body updated). +** * src/bus/sh7727.c (sh7727_bus_printinfo): Added new function parameter 'bus'. +** (sh7727_bus): Changed structure type to urj_bus_driver_t. Changed members. +** (new_sh7727_bus): Function renamed ... +** (sh7727_bus_new): ... to this one. Changed parameter list to void (and function body updated). +** * src/bus/sh7750r.c (sh7750r_bus_printinfo): Added new function parameter 'bus'. +** (sh7750r_bus): Changed structure type to urj_bus_driver_t. Changed members. +** (new_sh7750r_bus): Function renamed ... +** (sh7750r_bus_new): ... to this one. Changed parameter list to void (and function body updated). +** * src/bus/sh7751r.c (sh7751r_bus_printinfo): Added new function parameter 'bus'. +** (sh7751r_bus): Changed structure type to urj_bus_driver_t. Changed members. +** (new_sh7751r_bus): Function renamed ... +** (sh7751r_bus_new): ... to this one. Changed parameter list to void (and function body updated). ** -** * src/cmd/cable.c (cmd_cable_run): Replaced bus->free() call with URJ_BUS_FREE(). -** * src/jtag.c (main): Ditto. +** * src/cmd/cable.c (cmd_cable_run): Replaced bus->free() call with URJ_BUS_FREE(). +** * src/jtag.c (main): Ditto. ** -** * src/cmd/cmd.c (cmds): Added cmd_initbus. -** * src/cmd/detect.c (cmd_detect_run): Removed explicit bus driver detection. -** * src/cmd/initbus.c: New file. -** * src/cmd/Makefile.am (libcmd_a_SOURCES): Added initbus.c. +** * src/cmd/cmd.c (cmds): Added cmd_initbus. +** * src/cmd/detect.c (cmd_detect_run): Removed explicit bus driver detection. +** * src/cmd/initbus.c: New file. +** * src/cmd/Makefile.am (libcmd_a_SOURCES): Added initbus.c. ** -** * data/broadcom/bcm1250/bcm1250: Added 'initbus' command call. -** * data/hitachi/sh7727/sh7727: Ditto. -** * data/intel/ixp425/ixp425: Ditto. -** * data/intel/pxa250/pxa250: Ditto. -** * data/intel/pxa250/pxa250c0: Ditto. -** * data/intel/sa1110/sa1110: Ditto. -** * data/samsung/s3c4510b/s3c4510b: Ditto. +** * data/broadcom/bcm1250/bcm1250: Added 'initbus' command call. +** * data/hitachi/sh7727/sh7727: Ditto. +** * data/intel/ixp425/ixp425: Ditto. +** * data/intel/pxa250/pxa250: Ditto. +** * data/intel/pxa250/pxa250c0: Ditto. +** * data/intel/sa1110/sa1110: Ditto. +** * data/samsung/s3c4510b/s3c4510b: Ditto. ** ** Revision 1.3 2003/08/28 07:26:02 telka ** 2003-08-28 Marcel Telka ** -** * src/urj_bus_readmem.c (urj_bus_readmem): Replaced bus_width macro with new URJ_BUS_AREA. -** * src/bus/bcm1250.c (bcm1250_bus_width): Function removed. -** (bcm1250_bus_area): New function. -** * src/bus/ixp425.c (ixp425_bus_width): Function removed. -** (ixp425_bus_area): New function. -** * src/bus/pxa2x0.c (pxa250_bus_width): Function removed. -** (pxa2x0_bus_area): New function. -** * src/bus/s3c4510x.c (s3c4510_bus_width): Function removed. -** (s3c4510_bus_area): New function. -** * src/bus/sa1110.c (sa1110_bus_width: Function removed. -** (sa1110_bus_area): New function. -** * src/bus/sh7727.c (sh7727_bus_width): Function removed. -** (sh7727_bus_area): New function. -** * src/bus/sh7750r.c (sh7750r_bus_width): Function removed. -** (sh7750r_bus_area): New function. -** * src/bus/sh7751r.c (sh7751r_bus_width): Function removed. -** (sh7751r_bus_area): New function. -** * src/cmd/print.c (cmd_print_run): Added bus area printing. +** * src/urj_bus_readmem.c (urj_bus_readmem): Replaced bus_width macro with new URJ_BUS_AREA. +** * src/bus/bcm1250.c (bcm1250_bus_width): Function removed. +** (bcm1250_bus_area): New function. +** * src/bus/ixp425.c (ixp425_bus_width): Function removed. +** (ixp425_bus_area): New function. +** * src/bus/pxa2x0.c (pxa250_bus_width): Function removed. +** (pxa2x0_bus_area): New function. +** * src/bus/s3c4510x.c (s3c4510_bus_width): Function removed. +** (s3c4510_bus_area): New function. +** * src/bus/sa1110.c (sa1110_bus_width: Function removed. +** (sa1110_bus_area): New function. +** * src/bus/sh7727.c (sh7727_bus_width): Function removed. +** (sh7727_bus_area): New function. +** * src/bus/sh7750r.c (sh7750r_bus_width): Function removed. +** (sh7750r_bus_area): New function. +** * src/bus/sh7751r.c (sh7751r_bus_width): Function removed. +** (sh7751r_bus_area): New function. +** * src/cmd/print.c (cmd_print_run): Added bus area printing. ** ** Revision 1.2 2003/08/19 09:59:26 telka ** 2003-08-19 Marcel Telka ** -** * src/bus/s3c4510x.c: Changed comment. +** * src/bus/s3c4510x.c: Changed comment. ** ** Revision 1.1 2003/08/19 09:53:25 telka ** 2003-08-19 Marcel Telka ** -** * src/bus/Makefile.am (libbus_a_SOURCES): Added s3c4510x.c. -** * src/bus/s3c4510x.c: New file (Jiun-Shian Ho). +** * src/bus/Makefile.am (libbus_a_SOURCES): Added s3c4510x.c. +** * src/bus/s3c4510x.c: New file (Jiun-Shian Ho). ** */ diff --git a/urjtag/src/bus/sa1110.c b/urjtag/src/bus/sa1110.c index 89703a15..53d14935 100644 --- a/urjtag/src/bus/sa1110.c +++ b/urjtag/src/bus/sa1110.c @@ -50,12 +50,12 @@ typedef struct urj_part_signal_t *noe; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define nCS ((bus_params_t *) bus->params)->ncs -#define RD_nWR ((bus_params_t *) bus->params)->rd_nwr -#define nWE ((bus_params_t *) bus->params)->nwe -#define nOE ((bus_params_t *) bus->params)->noe +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define nCS ((bus_params_t *) bus->params)->ncs +#define RD_nWR ((bus_params_t *) bus->params)->rd_nwr +#define nWE ((bus_params_t *) bus->params)->nwe +#define nOE ((bus_params_t *) bus->params)->noe /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/sh7727.c b/urjtag/src/bus/sh7727.c index 1b318671..a803516f 100644 --- a/urjtag/src/bus/sh7727.c +++ b/urjtag/src/bus/sh7727.c @@ -49,14 +49,14 @@ typedef struct urj_part_signal_t *md4; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define CS ((bus_params_t *) bus->params)->cs -#define WE ((bus_params_t *) bus->params)->we -#define RDWR ((bus_params_t *) bus->params)->rdwr -#define RD ((bus_params_t *) bus->params)->rd -#define MD3 ((bus_params_t *) bus->params)->md3 -#define MD4 ((bus_params_t *) bus->params)->md4 +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define CS ((bus_params_t *) bus->params)->cs +#define WE ((bus_params_t *) bus->params)->we +#define RDWR ((bus_params_t *) bus->params)->rdwr +#define RD ((bus_params_t *) bus->params)->rd +#define MD3 ((bus_params_t *) bus->params)->md3 +#define MD4 ((bus_params_t *) bus->params)->md4 /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/sh7750r.c b/urjtag/src/bus/sh7750r.c index 6d28d5d5..de286812 100644 --- a/urjtag/src/bus/sh7750r.c +++ b/urjtag/src/bus/sh7750r.c @@ -49,14 +49,14 @@ typedef struct urj_part_signal_t *rd2; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define CS ((bus_params_t *) bus->params)->cs -#define WE ((bus_params_t *) bus->params)->we -#define RDWR ((bus_params_t *) bus->params)->rdwr -#define RD ((bus_params_t *) bus->params)->rd -#define RDWR2 ((bus_params_t *) bus->params)->rdwr2 -#define RD2 ((bus_params_t *) bus->params)->rd2 +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define CS ((bus_params_t *) bus->params)->cs +#define WE ((bus_params_t *) bus->params)->we +#define RDWR ((bus_params_t *) bus->params)->rdwr +#define RD ((bus_params_t *) bus->params)->rd +#define RDWR2 ((bus_params_t *) bus->params)->rdwr2 +#define RD2 ((bus_params_t *) bus->params)->rd2 /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/sh7751r.c b/urjtag/src/bus/sh7751r.c index 62c5c76a..1824071d 100644 --- a/urjtag/src/bus/sh7751r.c +++ b/urjtag/src/bus/sh7751r.c @@ -48,13 +48,13 @@ typedef struct urj_part_signal_t *bs; } bus_params_t; -#define A ((bus_params_t *) bus->params)->a -#define D ((bus_params_t *) bus->params)->d -#define CS ((bus_params_t *) bus->params)->cs -#define WE ((bus_params_t *) bus->params)->we -#define RDWR ((bus_params_t *) bus->params)->rdwr -#define RD ((bus_params_t *) bus->params)->rd -#define BS ((bus_params_t *) bus->params)->bs +#define A ((bus_params_t *) bus->params)->a +#define D ((bus_params_t *) bus->params)->d +#define CS ((bus_params_t *) bus->params)->cs +#define WE ((bus_params_t *) bus->params)->we +#define RDWR ((bus_params_t *) bus->params)->rdwr +#define RD ((bus_params_t *) bus->params)->rd +#define BS ((bus_params_t *) bus->params)->bs /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/sharc21065l.c b/urjtag/src/bus/sharc21065l.c index 2af6a45c..fb12efbb 100644 --- a/urjtag/src/bus/sharc21065l.c +++ b/urjtag/src/bus/sharc21065l.c @@ -52,12 +52,12 @@ typedef struct urj_part_signal_t *noe; } bus_params_t; -#define LAST_ADR ((bus_params_t *) bus->params)->last_adr -#define MA ((bus_params_t *) bus->params)->ma -#define MD ((bus_params_t *) bus->params)->md -#define BMS ((bus_params_t *) bus->params)->bms -#define nWE ((bus_params_t *) bus->params)->nwe -#define nOE ((bus_params_t *) bus->params)->noe +#define LAST_ADR ((bus_params_t *) bus->params)->last_adr +#define MA ((bus_params_t *) bus->params)->ma +#define MD ((bus_params_t *) bus->params)->md +#define BMS ((bus_params_t *) bus->params)->bms +#define nWE ((bus_params_t *) bus->params)->nwe +#define nOE ((bus_params_t *) bus->params)->noe /** * bus->driver->(*new_bus) diff --git a/urjtag/src/bus/slsup3.c b/urjtag/src/bus/slsup3.c index 4cba1b7e..73081b57 100644 --- a/urjtag/src/bus/slsup3.c +++ b/urjtag/src/bus/slsup3.c @@ -66,14 +66,14 @@ typedef struct urj_part_signal_t *lcdrw; } bus_params_t; -#define LAST_ADR ((bus_params_t *) bus->params)->last_adr -#define AD ((bus_params_t *) bus->params)->ad +#define LAST_ADR ((bus_params_t *) bus->params)->last_adr +#define AD ((bus_params_t *) bus->params)->ad #define DQ ((bus_params_t *) bus->params)->dq -#define nSDce ((bus_params_t *) bus->params)->nsdce -#define nOE ((bus_params_t *) bus->params)->noe +#define nSDce ((bus_params_t *) bus->params)->nsdce +#define nOE ((bus_params_t *) bus->params)->noe #define nSRce ((bus_params_t *) bus->params)->nsrce -#define nFLce ((bus_params_t *) bus->params)->nflce -#define nFLbyte ((bus_params_t *) bus->params)->nflbyte +#define nFLce ((bus_params_t *) bus->params)->nflce +#define nFLbyte ((bus_params_t *) bus->params)->nflbyte #define nFLby ((bus_params_t *) bus->params)->nflby #define nWE ((bus_params_t *) bus->params)->nwe #define SDclk ((bus_params_t *) bus->params)->sdclk diff --git a/urjtag/src/bus/tx4925.c b/urjtag/src/bus/tx4925.c index ebfc3257..81cfb49c 100644 --- a/urjtag/src/bus/tx4925.c +++ b/urjtag/src/bus/tx4925.c @@ -52,12 +52,12 @@ typedef struct urj_part_signal_t *data[16]; } bus_params_t; -#define OE ((bus_params_t *) bus->params)->oe -#define SWE ((bus_params_t *) bus->params)->swe -#define ROMCE ((bus_params_t *) bus->params)->romce +#define OE ((bus_params_t *) bus->params)->oe +#define SWE ((bus_params_t *) bus->params)->swe +#define ROMCE ((bus_params_t *) bus->params)->romce #define SDCS ((bus_params_t *) bus->params)->sdcs -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data +#define ADDR ((bus_params_t *) bus->params)->addr +#define DATA ((bus_params_t *) bus->params)->data // the number of bytes wide that the TX4925 // CS0 signal is set to by the external diff --git a/urjtag/src/bus/zefant-xs3.c b/urjtag/src/bus/zefant-xs3.c index d7869eaa..ebae71a7 100644 --- a/urjtag/src/bus/zefant-xs3.c +++ b/urjtag/src/bus/zefant-xs3.c @@ -70,33 +70,33 @@ #include "tap_state.h" /* EEPROM commands */ -#define EEPROM_CMD_WREN 0x06 -#define EEPROM_CMD_WRDI 0x04 -#define EEPROM_CMD_RDSR 0x05 -#define EEPROM_CMD_WRSR 0x01 -#define EEPROM_CMD_READ 0x03 -#define EEPROM_CMD_WRITE 0x02 - -#define RAM_ADDR_WIDTH 18 -#define RAM_DATA_WIDTH 16 -#define FLASH_ADDR_WIDTH 25 -#define FLASH_DATA_WIDTH 16 -#define EEPROM_ADDR_WIDTH 16 -#define EEPROM_DATA_WIDTH 8 +#define EEPROM_CMD_WREN 0x06 +#define EEPROM_CMD_WRDI 0x04 +#define EEPROM_CMD_RDSR 0x05 +#define EEPROM_CMD_WRSR 0x01 +#define EEPROM_CMD_READ 0x03 +#define EEPROM_CMD_WRITE 0x02 + +#define RAM_ADDR_WIDTH 18 +#define RAM_DATA_WIDTH 16 +#define FLASH_ADDR_WIDTH 25 +#define FLASH_DATA_WIDTH 16 +#define EEPROM_ADDR_WIDTH 16 +#define EEPROM_DATA_WIDTH 8 /* length is in number of bytes the full address width is taken to build the power of 2 */ -#define RAM_LENGTH (1 << (RAM_ADDR_WIDTH+1)) +#define RAM_LENGTH (1 << (RAM_ADDR_WIDTH + 1)) /* the flash component ignores A0, so address is not doubled here */ -#define FLASH_LENGTH (1 << FLASH_ADDR_WIDTH) -#define EEPROM_LENGTH (1 << EEPROM_ADDR_WIDTH) -#define EEPROM_STATUS_LENGTH EEPROM_LENGTH - -#define FLASH_START 0 -#define RAM0_START FLASH_LENGTH -#define RAM1_START (RAM0_START + RAM_LENGTH) -#define EEPROM_START (RAM1_START + RAM_LENGTH) -#define EEPROM_STATUS_START (EEPROM_START + EEPROM_LENGTH) +#define FLASH_LENGTH (1 << FLASH_ADDR_WIDTH) +#define EEPROM_LENGTH (1 << EEPROM_ADDR_WIDTH) +#define EEPROM_STATUS_LENGTH EEPROM_LENGTH + +#define FLASH_START 0 +#define RAM0_START FLASH_LENGTH +#define RAM1_START (RAM0_START + RAM_LENGTH) +#define EEPROM_START (RAM1_START + RAM_LENGTH) +#define EEPROM_STATUS_START (EEPROM_START + EEPROM_LENGTH) typedef enum { RAM, FLASH, EEPROM, EEPROM_STATUS } ctype_t; diff --git a/urjtag/src/cmd/pod.c b/urjtag/src/cmd/pod.c index 7352a20c..93c54832 100644 --- a/urjtag/src/cmd/pod.c +++ b/urjtag/src/cmd/pod.c @@ -83,7 +83,7 @@ cmd_pod_help (void) printf (_("Usage: %s SIGNAL=# [SIGNAL=# ...]\n" "Set state of POD signal(s) to 0 or 1.\n" "\n" - "SIGNAL TCK,TMS, TDI, TRST, or URJ_JIM_RESET\n" + "SIGNAL TCK,TMS, TDI, TRST, or URJ_JIM_RESET\n" "# 0 or 1\n"), "pod"); } diff --git a/urjtag/src/cmd/signal.c b/urjtag/src/cmd/signal.c index 54be17a8..177d90ca 100644 --- a/urjtag/src/cmd/signal.c +++ b/urjtag/src/cmd/signal.c @@ -109,8 +109,8 @@ cmd_signal_help (void) printf (_("Usage: %s SIGNAL [PIN#]\n" "Define new signal with name SIGNAL for a part.\n" "\n" - "SIGNAL New signal name\n" - "PIN# List of pin # for a signal\n"), "signal"); + "SIGNAL New signal name\n" + "PIN# List of pin # for a signal\n"), "signal"); } urj_cmd_t cmd_signal = { diff --git a/urjtag/src/cmd/usleep.c b/urjtag/src/cmd/usleep.c index f6a374b8..bec86a69 100644 --- a/urjtag/src/cmd/usleep.c +++ b/urjtag/src/cmd/usleep.c @@ -10,7 +10,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/urjtag/src/flash/amd_flash.c b/urjtag/src/flash/amd_flash.c index 7cce403a..4b69c7c3 100644 --- a/urjtag/src/flash/amd_flash.c +++ b/urjtag/src/flash/amd_flash.c @@ -56,15 +56,15 @@ #define AMD_EMBEDDED_PROGRAM_ALGORITHM #define AMD_UNDEFINED_MODE -#define FLASH_ERASE_ERROR -5 -#define ERASE_FLASH_SUCCESS 1 +#define FLASH_ERASE_ERROR (-5) +#define ERASE_FLASH_SUCCESS 1 -#define AMD_29xx040B 1 +#define AMD_29xx040B 1 -#define AMD_BYPASS_UNLOCK_ALGORITHM 1 -#define AMD_STANDARD_WRITE_ALGORITHM 0 -#define AMD_BYPASS_UNLOCK_MODE 1 -#define AMD_STANDARD_MODE 0 +#define AMD_BYPASS_UNLOCK_ALGORITHM 1 +#define AMD_STANDARD_WRITE_ALGORITHM 0 +#define AMD_BYPASS_UNLOCK_MODE 1 +#define AMD_STANDARD_MODE 0 static struct { diff --git a/urjtag/src/flash/cfi.c b/urjtag/src/flash/cfi.c index 510e4e85..d26ba5b6 100644 --- a/urjtag/src/flash/cfi.c +++ b/urjtag/src/flash/cfi.c @@ -97,12 +97,12 @@ urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr, urj_flash_cfi_array_t **cfi_ for (d = 0; d < bw; d += 8) { -#define A(off) (adr + (off) * ba * ma) -#define D(data) ((data) << d) -#define gD(data) (((data) >> d) & 0xFF) -#define read1(off) gD(URJ_BUS_READ( bus, A(off) )) -#define read2(off) (URJ_BUS_READ_START( bus, A(off) ), gD(URJ_BUS_READ_NEXT( bus, A((off) + 1) )) | gD(URJ_BUS_READ_END( bus )) << 8) -#define write1(off,data) URJ_BUS_WRITE( bus, A(off), D(data) ) +#define A(off) (adr + (off) * ba * ma) +#define D(data) ((data) << d) +#define gD(data) (((data) >> d) & 0xFF) +#define read1(off) gD(URJ_BUS_READ( bus, A(off) )) +#define read2(off) (URJ_BUS_READ_START( bus, A(off) ), gD(URJ_BUS_READ_NEXT( bus, A((off) + 1) )) | gD(URJ_BUS_READ_END( bus )) << 8) +#define write1(off,data) URJ_BUS_WRITE( bus, A(off), D(data) ) urj_flash_cfi_query_structure_t *cfi; uint32_t tmp; @@ -249,7 +249,7 @@ urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr, urj_flash_cfi_array_t **cfi_ uint8_t num_of_banks; int i; #undef A -#define A(off) (adr + (pri_vendor_tbl_adr + off) * ba * ma) +#define A(off) (adr + (pri_vendor_tbl_adr + off) * ba * ma) if (read1 (0) != 'P' || read1 (1) != 'R' || read1 (2) != 'I') { @@ -347,7 +347,7 @@ urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr, urj_flash_cfi_array_t **cfi_ (void *) pri_vendor_tbl; #undef A -#define A(off) (adr + (off) * ba * ma) +#define A(off) (adr + (off) * ba * ma) /* Reverse the order of erase block region information for top boot devices. */ if ((major_version > '1' diff --git a/urjtag/src/flash/jedec.c b/urjtag/src/flash/jedec.c index 706795fb..415472bf 100644 --- a/urjtag/src/flash/jedec.c +++ b/urjtag/src/flash/jedec.c @@ -37,54 +37,54 @@ #include "jedec.h" /* Manufacturers */ -#define MANUFACTURER_AMD 0x0001 -#define MANUFACTURER_ATMEL 0x001F -#define MANUFACTURER_FUJITSU 0x0004 -#define MANUFACTURER_ST 0x0020 -#define MANUFACTURER_SST 0x00BF -#define MANUFACTURER_TOSHIBA 0x0098 +#define MANUFACTURER_AMD 0x0001 +#define MANUFACTURER_ATMEL 0x001F +#define MANUFACTURER_FUJITSU 0x0004 +#define MANUFACTURER_ST 0x0020 +#define MANUFACTURER_SST 0x00BF +#define MANUFACTURER_TOSHIBA 0x0098 #define MANUFACTURER_MX 0x00C2 /* AMD */ -#define AM29F800BB 0x2258 -#define AM29F800BT 0x22D6 -#define AM29LV800BB 0x225B -#define AM29LV800BT 0x22DA -#define AM29LV160DT 0x22C4 -#define AM29LV160DB 0x2249 +#define AM29F800BB 0x2258 +#define AM29F800BT 0x22D6 +#define AM29LV800BB 0x225B +#define AM29LV800BT 0x22DA +#define AM29LV160DT 0x22C4 +#define AM29LV160DB 0x2249 #define AM29BDS323D 0x22D1 -#define AM29BDS643D 0x227E -#define AM29LV040B 0x004F +#define AM29BDS643D 0x227E +#define AM29LV040B 0x004F /* Atmel */ -#define AT49xV16x 0x00C0 -#define AT49xV16xT 0x00C2 +#define AT49xV16x 0x00C0 +#define AT49xV16xT 0x00C2 /* Fujitsu */ -#define MBM29LV160TE 0x22C4 -#define MBM29LV160BE 0x2249 -#define MBM29LV800BB 0x225B +#define MBM29LV160TE 0x22C4 +#define MBM29LV160BE 0x2249 +#define MBM29LV800BB 0x225B /* ST - www.st.com */ -#define M29W800T 0x00D7 -#define M29W160DT 0x22C4 -#define M29W160DB 0x2249 +#define M29W800T 0x00D7 +#define M29W160DT 0x22C4 +#define M29W160DB 0x2249 /* SST */ -#define SST39LF800 0x2781 -#define SST39LF160 0x2782 +#define SST39LF800 0x2781 +#define SST39LF160 0x2782 /* Toshiba */ -#define TC58FVT160 0x00C2 -#define TC58FVB160 0x0043 +#define TC58FVT160 0x00C2 +#define TC58FVB160 0x0043 /* MX */ #define MX29LV400T 0x22B9 /* Autoselect methods */ -#define AUTOSELECT_M1 0 -#define AUTOSELECT_M2 1 -#define AUTOSELECT_NUM 2 +#define AUTOSELECT_M1 0 +#define AUTOSELECT_M2 1 +#define AUTOSELECT_NUM 2 struct mtd_erase_region_info { diff --git a/urjtag/src/jim/intel_28f800b3.c b/urjtag/src/jim/intel_28f800b3.c index 64f2a133..4ca4ea35 100644 --- a/urjtag/src/jim/intel_28f800b3.c +++ b/urjtag/src/jim/intel_28f800b3.c @@ -82,14 +82,14 @@ typedef enum } b3_boot_type_t; -#define I28F_WSM_READY 0x80 -#define I28F_ERASE_SUSPENDED 0x40 -#define I28F_ERASE_ERROR 0x20 -#define I28F_PROG_ERROR 0x10 -#define I28F_VPP_LOW 0x08 -#define I28F_PROG_SUSPENDED 0x04 -#define I28F_BLOCK_LOCKED 0x02 -#define I28F_RESERVED 0x01 +#define I28F_WSM_READY 0x80 +#define I28F_ERASE_SUSPENDED 0x40 +#define I28F_ERASE_ERROR 0x20 +#define I28F_PROG_ERROR 0x10 +#define I28F_VPP_LOW 0x08 +#define I28F_PROG_SUSPENDED 0x04 +#define I28F_BLOCK_LOCKED 0x02 +#define I28F_RESERVED 0x01 typedef struct diff --git a/urjtag/src/jtag.c b/urjtag/src/jtag.c index 8ff49f27..42c7b611 100644 --- a/urjtag/src/jtag.c +++ b/urjtag/src/jtag.c @@ -60,9 +60,9 @@ int big_endian = 0; int interactive = 0; extern urj_flash_cfi_array_t *cfi_array; -#define JTAGDIR ".jtag" -#define HISTORYFILE "history" -#define RCFILE "rc" +#define JTAGDIR ".jtag" +#define HISTORYFILE "history" +#define RCFILE "rc" static void jtag_create_jtagdir (void) diff --git a/urjtag/src/lib/getdelim.c b/urjtag/src/lib/getdelim.c index 6eae94cf..393e7781 100644 --- a/urjtag/src/lib/getdelim.c +++ b/urjtag/src/lib/getdelim.c @@ -30,7 +30,7 @@ #ifndef HAVE_GETDELIM -#define GETDELIM_BUFFER 128 +#define GETDELIM_BUFFER 128 ssize_t urj_lib_getdelim (char **lineptr, size_t * n, int delimiter, FILE *stream) diff --git a/urjtag/src/svf/svf_flex.l b/urjtag/src/svf/svf_flex.l index 4ff5a994..ddccfd51 100644 --- a/urjtag/src/svf/svf_flex.l +++ b/urjtag/src/svf/svf_flex.l @@ -58,9 +58,10 @@ int yywrap(yyscan_t scanner) return(1); } -#define YY_USER_INIT { \ - yylloc->first_line = yylloc->last_line = yylloc->first_column = yylloc->last_column = 0; \ -} +#define YY_USER_INIT \ + do { \ + yylloc->first_line = yylloc->last_line = yylloc->first_column = yylloc->last_column = 0; \ + } while (0) %} diff --git a/urjtag/src/tap/cable/arcom.c b/urjtag/src/tap/cable/arcom.c index f7f34d21..a04e33f1 100644 --- a/urjtag/src/tap/cable/arcom.c +++ b/urjtag/src/tap/cable/arcom.c @@ -35,10 +35,10 @@ /* * data D[7:0] (pins 9:2) */ -#define TDI 1 -#define TCK 0 -#define TMS 2 -#define TRST 3 +#define TDI 1 +#define TCK 0 +#define TMS 2 +#define TRST 3 /* * 7 - BUSY (pin 11) @@ -47,7 +47,7 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 7 +#define TDO 7 static int arcom_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/byteblaster.c b/urjtag/src/tap/cable/byteblaster.c index a3b2bf3e..fd23df1f 100644 --- a/urjtag/src/tap/cable/byteblaster.c +++ b/urjtag/src/tap/cable/byteblaster.c @@ -43,10 +43,10 @@ /* * data D[7:0] (pins 9:2) */ -#define TDI 6 -#define TCK 0 -#define TMS 1 -#define BB_CHECK 5 +#define TDI 6 +#define TCK 0 +#define TMS 1 +#define BB_CHECK 5 /* * 7 - BUSY (pin 11) @@ -55,9 +55,9 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 7 -#define BB_PRESENT 6 -#define VCC_OK_N 3 +#define TDO 7 +#define BB_PRESENT 6 +#define VCC_OK_N 3 /* * 0 - STROBE (pin 1) @@ -65,7 +65,7 @@ * 2 - INIT (pin 16) * 3 - SELECT (pin 17) */ -#define BB_ENABLE 0xC +#define BB_ENABLE 0xC static int byteblaster_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/dlc5.c b/urjtag/src/tap/cable/dlc5.c index 68a215c8..aabb0d79 100644 --- a/urjtag/src/tap/cable/dlc5.c +++ b/urjtag/src/tap/cable/dlc5.c @@ -41,11 +41,11 @@ /* * data D[7:0] (pins 9:2) */ -#define TDI 0 -#define TCK 1 -#define TMS 2 -#define CTRL 3 -#define PROG 4 +#define TDI 0 +#define TCK 1 +#define TMS 2 +#define CTRL 3 +#define PROG 4 /* * 7 - BUSY (pin 11) @@ -54,7 +54,7 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 4 +#define TDO 4 static int dlc5_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/ea253.c b/urjtag/src/tap/cable/ea253.c index 2b512ffd..f6182fe7 100644 --- a/urjtag/src/tap/cable/ea253.c +++ b/urjtag/src/tap/cable/ea253.c @@ -35,10 +35,10 @@ /* * data D[7:0] (pins 9:2) */ -#define TDI 0 -#define TCK 1 -#define TMS 2 -#define TRST 4 +#define TDI 0 +#define TCK 1 +#define TMS 2 +#define TRST 4 /* * 7 - BUSY (pin 11) @@ -47,7 +47,7 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 4 +#define TDO 4 static int ea253_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/ei012.c b/urjtag/src/tap/cable/ei012.c index 435cb54c..594541be 100644 --- a/urjtag/src/tap/cable/ei012.c +++ b/urjtag/src/tap/cable/ei012.c @@ -35,10 +35,10 @@ /* * data D[7:0] (pins 9:2) */ -#define TCK 0 -#define TDI 1 -#define TMS 2 -#define TRST 4 +#define TCK 0 +#define TDI 1 +#define TMS 2 +#define TRST 4 /* * status @@ -49,7 +49,7 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 7 +#define TDO 7 static int ei012_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/ft2232.c b/urjtag/src/tap/cable/ft2232.c index 0b4033f5..e5124645 100644 --- a/urjtag/src/tap/cable/ft2232.c +++ b/urjtag/src/tap/cable/ft2232.c @@ -66,65 +66,65 @@ #define MPSSE_WRITE_TMS 0x40 /* Write TMS/CS */ /* FTDI MPSSE commands */ -#define SET_BITS_LOW 0x80 +#define SET_BITS_LOW 0x80 /*BYTE DATA*/ /*BYTE Direction*/ -#define SET_BITS_HIGH 0x82 +#define SET_BITS_HIGH 0x82 /*BYTE DATA*/ /*BYTE Direction*/ -#define GET_BITS_LOW 0x81 -#define GET_BITS_HIGH 0x83 -#define LOOPBACK_START 0x84 -#define LOOPBACK_END 0x85 -#define TCK_DIVISOR 0x86 -#define SEND_IMMEDIATE 0x87 +#define GET_BITS_LOW 0x81 +#define GET_BITS_HIGH 0x83 +#define LOOPBACK_START 0x84 +#define LOOPBACK_END 0x85 +#define TCK_DIVISOR 0x86 +#define SEND_IMMEDIATE 0x87 /* bit and bitmask definitions for GPIO commands */ -#define BIT_TCK 0 -#define BIT_TDI 1 -#define BIT_TDO 2 -#define BIT_TMS 3 -#define BITMASK_TDO (1 << BIT_TDO) -#define BITMASK_TDI (1 << BIT_TDI) -#define BITMASK_TCK (1 << BIT_TCK) -#define BITMASK_TMS (1 << BIT_TMS) +#define BIT_TCK 0 +#define BIT_TDI 1 +#define BIT_TDO 2 +#define BIT_TMS 3 +#define BITMASK_TDO (1 << BIT_TDO) +#define BITMASK_TDI (1 << BIT_TDI) +#define BITMASK_TCK (1 << BIT_TCK) +#define BITMASK_TMS (1 << BIT_TMS) /* bit and bitmask definitions for Amontec JTAGkey */ -#define BIT_JTAGKEY_nOE 4 -#define BIT_JTAGKEY_TRST_N_OUT 0 -#define BIT_JTAGKEY_SRST_N_OUT 1 +#define BIT_JTAGKEY_nOE 4 +#define BIT_JTAGKEY_TRST_N_OUT 0 +#define BIT_JTAGKEY_SRST_N_OUT 1 #define BIT_JTAGKEY_TRST_N_OE_N 2 #define BIT_JTAGKEY_SRST_N_OE_N 3 -#define BITMASK_JTAGKEY_nOE (1 << BIT_JTAGKEY_nOE) +#define BITMASK_JTAGKEY_nOE (1 << BIT_JTAGKEY_nOE) #define BITMASK_JTAGKEY_TRST_N_OUT (1 << BIT_JTAGKEY_TRST_N_OUT) #define BITMASK_JTAGKEY_SRST_N_OUT (1 << BIT_JTAGKEY_SRST_N_OUT) #define BITMASK_JTAGKEY_TRST_N_OE_N (1 << BIT_JTAGKEY_TRST_N_OE_N) #define BITMASK_JTAGKEY_SRST_N_OE_N (1 << BIT_JTAGKEY_SRST_N_OE_N) /* bit and bitmask definitions for Olimex ARM-USB-OCD */ -#define BIT_ARMUSBOCD_nOE 4 -#define BIT_ARMUSBOCD_nTRST 0 -#define BIT_ARMUSBOCD_nTSRST 1 +#define BIT_ARMUSBOCD_nOE 4 +#define BIT_ARMUSBOCD_nTRST 0 +#define BIT_ARMUSBOCD_nTSRST 1 #define BIT_ARMUSBOCD_nTRST_nOE 2 -#define BIT_ARMUSBOCD_RED_LED 3 -#define BITMASK_ARMUSBOCD_nOE (1 << BIT_ARMUSBOCD_nOE) +#define BIT_ARMUSBOCD_RED_LED 3 +#define BITMASK_ARMUSBOCD_nOE (1 << BIT_ARMUSBOCD_nOE) #define BITMASK_ARMUSBOCD_nTRST (1 << BIT_ARMUSBOCD_nTRST) #define BITMASK_ARMUSBOCD_nTSRST (1 << BIT_ARMUSBOCD_nTSRST) #define BITMASK_ARMUSBOCD_nTRST_nOE (1 << BIT_ARMUSBOCD_nTRST_nOE) #define BITMASK_ARMUSBOCD_RED_LED (1 << BIT_ARMUSBOCD_RED_LED) /* bit and bitmask definitions for Blackfin gnICE */ -#define BIT_GNICE_nTRST 1 -#define BIT_GNICE_nLED 3 -#define BITMASK_GNICE_nTRST (1 << BIT_GNICE_nTRST) -#define BITMASK_GNICE_nLED (1 << BIT_GNICE_nLED) +#define BIT_GNICE_nTRST 1 +#define BIT_GNICE_nLED 3 +#define BITMASK_GNICE_nTRST (1 << BIT_GNICE_nTRST) +#define BITMASK_GNICE_nLED (1 << BIT_GNICE_nLED) /* bit and bitmask definitions for OOCDLink-s */ #define BIT_OOCDLINKS_nTRST_nOE 0 -#define BIT_OOCDLINKS_nTRST 1 +#define BIT_OOCDLINKS_nTRST 1 #define BIT_OOCDLINKS_nSRST_nOE 2 -#define BIT_OOCDLINKS_nSRST 3 +#define BIT_OOCDLINKS_nSRST 3 #define BITMASK_OOCDLINKS_nTRST_nOE (1 << BIT_OOCDLINKS_nTRST_nOE) #define BITMASK_OOCDLINKS_nTRST (1 << BIT_OOCDLINKS_nTRST) #define BITMASK_OOCDLINKS_nSRST_nOE (1 << BIT_OOCDLINKS_nSRST_nOE) @@ -132,7 +132,7 @@ /* bit and bitmask definitions for Turtelizer 2 */ #define BIT_TURTELIZER2_nJTAGOE 4 -#define BIT_TURTELIZER2_RST 6 +#define BIT_TURTELIZER2_RST 6 #define BIT_TURTELIZER2_nTX1LED 2 #define BIT_TURTELIZER2_nRX1LED 3 #define BITMASK_TURTELIZER2_nJTAGOE (1 << BIT_TURTELIZER2_nJTAGOE) @@ -141,11 +141,11 @@ #define BITMASK_TURTELIZER2_nRX1LED (1 << BIT_TURTELIZER2_nRX1LED) /* bit and bitmask definitions for USB to JTAG Interface */ -#define BIT_USBTOJTAGIF_nTRST 4 -#define BIT_USBTOJTAGIF_RST 6 -#define BIT_USBTOJTAGIF_DBGRQ 7 -#define BIT_USBTOJTAGIF_nRxLED 2 -#define BIT_USBTOJTAGIF_nTxLED 3 +#define BIT_USBTOJTAGIF_nTRST 4 +#define BIT_USBTOJTAGIF_RST 6 +#define BIT_USBTOJTAGIF_DBGRQ 7 +#define BIT_USBTOJTAGIF_nRxLED 2 +#define BIT_USBTOJTAGIF_nTxLED 3 #define BITMASK_USBTOJTAGIF_nTRST (1 << BIT_USBTOJTAGIF_nTRST) #define BITMASK_USBTOJTAGIF_RST (1 << BIT_USBTOJTAGIF_RST) #define BITMASK_USBTOJTAGIF_DBGRQ (1 << BIT_USBTOJTAGIF_DBGRQ) @@ -153,17 +153,17 @@ #define BITMASK_USBTOJTAGIF_nTxLED (1 << BIT_USBTOJTAGIF_nTxLED) /* bit and bitmask definitions for Xverve DT-USB-ST Signalyzer Tool */ -#define BIT_SIGNALYZER_nTRST 4 -#define BIT_SIGNALYZER_nSRST 5 +#define BIT_SIGNALYZER_nTRST 4 +#define BIT_SIGNALYZER_nSRST 5 #define BITMASK_SIGNALYZER_nTRST (1 << BIT_SIGNALYZER_nTRST) #define BITMASK_SIGNALYZER_nSRST (1 << BIT_SIGNALYZER_nSRST) /* bit and bitmask definitions for TinCanTools Flyswatter board*/ -#define BIT_FLYSWATTER_nLED2 3 -#define BIT_FLYSWATTER_nTRST 4 -#define BIT_FLYSWATTER_nSRST 5 -#define BIT_FLYSWATTER_nOE1 6 -#define BIT_FLYSWATTER_nOE2 7 +#define BIT_FLYSWATTER_nLED2 3 +#define BIT_FLYSWATTER_nTRST 4 +#define BIT_FLYSWATTER_nSRST 5 +#define BIT_FLYSWATTER_nOE1 6 +#define BIT_FLYSWATTER_nOE2 7 #define BITMASK_FLYSWATTER_nLED2 (1 << BIT_FLYSWATTER_nLED2) #define BITMASK_FLYSWATTER_nTRST (1 << BIT_FLYSWATTER_nTRST) #define BITMASK_FLYSWATTER_nSRST (1 << BIT_FLYSWATTER_nSRST) @@ -174,11 +174,11 @@ /* usbScarabeus2 is a design of Krzysztof Kajstura ( http://www.kristech.eu ). */ /* UrJTAG support added by Tomek Cedro ( http://www.tomek.cedro.info ) */ /* as a part of work for TP R&D (Polish Telecom, FT/Orange Group) http://www.tp.pl */ -#define BIT_USBSCARAB2_nCONNECTED 5 //ADBUS -#define BIT_USBSCARAB2_TRST 0 //ACBUS -#define BIT_USBSCARAB2_nSRST 1 //ACBUS -#define BIT_USBSCARAB2_LED 3 //ACBUS -#define BITMASK_USBSCARAB2_LED (1 << BIT_USBSCARAB2_LED) +#define BIT_USBSCARAB2_nCONNECTED 5 // ADBUS +#define BIT_USBSCARAB2_TRST 0 // ACBUS +#define BIT_USBSCARAB2_nSRST 1 // ACBUS +#define BIT_USBSCARAB2_LED 3 // ACBUS +#define BITMASK_USBSCARAB2_LED (1 << BIT_USBSCARAB2_LED) #define BITMASK_USBSCARAB2_TRST (1 << BIT_USBSCARAB2_TRST) #define BITMASK_USBSCARAB2_nSRST (1 << BIT_USBSCARAB2_nSRST) #define BITMASK_USBSCARAB2_nCONNECTED (1 << BIT_USBSCARAB2_nCONNECTED) diff --git a/urjtag/src/tap/cable/generic.h b/urjtag/src/tap/cable/generic.h index f76eca03..fdd3a5e1 100644 --- a/urjtag/src/tap/cable/generic.h +++ b/urjtag/src/tap/cable/generic.h @@ -23,7 +23,7 @@ */ #ifndef URJ_TAP_CABLE_GENERIC_H -#define URJ_TAP_CABLE_GENERIC_H +#define URJ_TAP_CABLE_GENERIC_H #include "cable.h" #include "parport.h" @@ -33,7 +33,7 @@ typedef struct int signals; } urj_tap_cable_generic_params_t; -#define PARAM_SIGNALS(cable) ((urj_tap_cable_generic_params_t *) cable->params)->signals +#define PARAM_SIGNALS(cable) ((urj_tap_cable_generic_params_t *) (cable)->params)->signals void urj_tap_cable_generic_disconnect (urj_cable_t *cable); void urj_tap_cable_generic_set_frequency (urj_cable_t *cable, uint32_t new_freq); diff --git a/urjtag/src/tap/cable/generic_parport.h b/urjtag/src/tap/cable/generic_parport.h index a6ceeb08..de953794 100644 --- a/urjtag/src/tap/cable/generic_parport.h +++ b/urjtag/src/tap/cable/generic_parport.h @@ -23,7 +23,7 @@ */ #ifndef URJ_TAP_CABLE_GENERIC_PARPORT_H -#define URJ_TAP_CABLE_GENERIC_PARPORT_H +#define URJ_TAP_CABLE_GENERIC_PARPORT_H #include "cable.h" #include "parport.h" diff --git a/urjtag/src/tap/cable/generic_usbconn.h b/urjtag/src/tap/cable/generic_usbconn.h index 7168819d..f32027d0 100644 --- a/urjtag/src/tap/cable/generic_usbconn.h +++ b/urjtag/src/tap/cable/generic_usbconn.h @@ -23,7 +23,7 @@ */ #ifndef URJ_TAP_CABLE_GENERIC_USBCONN_H -#define URJ_TAP_CABLE_GENERIC_USBCONN_H +#define URJ_TAP_CABLE_GENERIC_USBCONN_H #include "cable.h" #include "usbconn.h" diff --git a/urjtag/src/tap/cable/keithkoep.c b/urjtag/src/tap/cable/keithkoep.c index b2eccdb6..e68f00d4 100644 --- a/urjtag/src/tap/cable/keithkoep.c +++ b/urjtag/src/tap/cable/keithkoep.c @@ -38,9 +38,9 @@ /* * data D[7:0] (pins 9:2) */ -#define TDI 0 -#define TCK 1 -#define TMS 2 +#define TDI 0 +#define TCK 1 +#define TMS 2 /* * status @@ -51,7 +51,7 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 5 +#define TDO 5 /* * control @@ -61,7 +61,7 @@ * 2 - INIT (pin 16) * 3 - SELIN (pin 17) */ -#define TRST 0 +#define TRST 0 static int keithkoep_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/lattice.c b/urjtag/src/tap/cable/lattice.c index e6584340..2d8208e9 100644 --- a/urjtag/src/tap/cable/lattice.c +++ b/urjtag/src/tap/cable/lattice.c @@ -44,11 +44,11 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDI 0 -#define TCK 1 -#define TMS 2 -#define TRST 4 -#define TDO 6 +#define TDI 0 +#define TCK 1 +#define TMS 2 +#define TRST 4 +#define TDO 6 static int diff --git a/urjtag/src/tap/cable/mpcbdm.c b/urjtag/src/tap/cable/mpcbdm.c index 72bd689d..c89da37f 100644 --- a/urjtag/src/tap/cable/mpcbdm.c +++ b/urjtag/src/tap/cable/mpcbdm.c @@ -39,16 +39,16 @@ /* * data D[7:0] (pins 9:2) */ -#define TDI 1 -#define TCK 0 -#define TMS 2 +#define TDI 1 +#define TCK 0 +#define TMS 2 /* * control */ -#define HRESET 3 /* the signal is inverted by cable hardware */ -#define SRESET 1 /* the signal is inverted by cable hardware */ -#define TRST 0 /* the signal is inverted by cable hardware */ +#define HRESET 3 /* the signal is inverted by cable hardware */ +#define SRESET 1 /* the signal is inverted by cable hardware */ +#define TRST 0 /* the signal is inverted by cable hardware */ /* * status @@ -59,7 +59,7 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 5 +#define TDO 5 static int mpcbdm_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/triton.c b/urjtag/src/tap/cable/triton.c index 294665f0..3e720a46 100644 --- a/urjtag/src/tap/cable/triton.c +++ b/urjtag/src/tap/cable/triton.c @@ -48,12 +48,12 @@ /* * data D[7:0] (pins 9:2) */ -#define TDI 1 -#define TCK 0 -#define TMS 2 -#define TRST 3 -#define SRESET 4 -#define ENAB 5 /* not programmed, since it's always 0 */ +#define TDI 1 +#define TCK 0 +#define TMS 2 +#define TRST 3 +#define SRESET 4 +#define ENAB 5 /* not programmed, since it's always 0 */ /* * status @@ -64,7 +64,7 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 7 +#define TDO 7 static int triton_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/ts7800.c b/urjtag/src/tap/cable/ts7800.c index ab710168..226c2880 100644 --- a/urjtag/src/tap/cable/ts7800.c +++ b/urjtag/src/tap/cable/ts7800.c @@ -13,7 +13,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -43,28 +43,28 @@ #include -#define GPIO_BASE 0xF1010000 -#define GPIO_OUT (0x0100/4) -#define GPIO_DIR (0x0104/4) -#define GPIO_INPOL (0x010C/4) -#define GPIO_IN (0x0110/4) -#define GPIO_INTEDGE (0x0118/4) -#define GPIO_INTLEV (0x011C/4) - -#define TDO 4 -#define TDI 2 -#define TMS 5 -#define TCK 1 - -#define HGPIO(b) (1 << (b)) -#define ts7800_TDO HGPIO(TDO) -#define ts7800_TDI HGPIO(TDI) -#define ts7800_TMS HGPIO(TMS) -#define ts7800_TCK HGPIO(TCK) - -#define GPIO_INPUT_MASK ((ts7800_TCK)|(ts7800_TMS)|(ts7800_TDI)) -#define GPIO_OUTPUT_MASK ts7800_TDO -#define GPIO_BITMASK (~((ts7800_TDO)|(ts7800_TDI)|(ts7800_TMS)|(ts7800_TCK))) +#define GPIO_BASE 0xF1010000 +#define GPIO_OUT (0x0100/4) +#define GPIO_DIR (0x0104/4) +#define GPIO_INPOL (0x010C/4) +#define GPIO_IN (0x0110/4) +#define GPIO_INTEDGE (0x0118/4) +#define GPIO_INTLEV (0x011C/4) + +#define TDO 4 +#define TDI 2 +#define TMS 5 +#define TCK 1 + +#define HGPIO(b) (1 << (b)) +#define ts7800_TDO HGPIO(TDO) +#define ts7800_TDI HGPIO(TDI) +#define ts7800_TMS HGPIO(TMS) +#define ts7800_TCK HGPIO(TCK) + +#define GPIO_INPUT_MASK ((ts7800_TCK)|(ts7800_TMS)|(ts7800_TDI)) +#define GPIO_OUTPUT_MASK ts7800_TDO +#define GPIO_BITMASK (~((ts7800_TDO)|(ts7800_TDI)|(ts7800_TMS)|(ts7800_TCK))) typedef struct { diff --git a/urjtag/src/tap/cable/vision_ep9307.c b/urjtag/src/tap/cable/vision_ep9307.c index 3aaf6c1a..44883e4d 100644 --- a/urjtag/src/tap/cable/vision_ep9307.c +++ b/urjtag/src/tap/cable/vision_ep9307.c @@ -41,32 +41,32 @@ #include -#define SYSCON_BASE 0x80930000 -#define SYSCON_DEVICE_CONFIG 0x80 -#define SYSCON_SWLOCK 0xC0 - -#define SYSCON_DEVCFG_HonIDE (1 << 11) - -#define GPIO_BASE 0x80840000 -#define GPIO_PHDR 0x40 -#define GPIO_PHDDR 0x44 - -#define TDO 4 -#define TDI 6 -#define TMS 5 -#define TCK 7 -#define TRST 3 - -#define HGPIO(b) (1 << (b)) -#define EP9307_TDO HGPIO(TDO) -#define EP9307_TDI HGPIO(TDI) -#define EP9307_TMS HGPIO(TMS) -#define EP9307_TCK HGPIO(TCK) -#define EP9307_TRST HGPIO(TRST) - -#define GPIO_INPUT_MASK ((EP9307_TCK)|(EP9307_TMS)|(EP9307_TDI)|(EP9307_TRST)) -#define GPIO_OUTPUT_MASK (~(EP9307_TDO)) -#define GPIO_BITMASK (~((EP9307_TDO)|(EP9307_TDI)|(EP9307_TMS)|(EP9307_TCK)|(EP9307_TRST))) +#define SYSCON_BASE 0x80930000 +#define SYSCON_DEVICE_CONFIG 0x80 +#define SYSCON_SWLOCK 0xC0 + +#define SYSCON_DEVCFG_HonIDE (1 << 11) + +#define GPIO_BASE 0x80840000 +#define GPIO_PHDR 0x40 +#define GPIO_PHDDR 0x44 + +#define TDO 4 +#define TDI 6 +#define TMS 5 +#define TCK 7 +#define TRST 3 + +#define HGPIO(b) (1 << (b)) +#define EP9307_TDO HGPIO(TDO) +#define EP9307_TDI HGPIO(TDI) +#define EP9307_TMS HGPIO(TMS) +#define EP9307_TCK HGPIO(TCK) +#define EP9307_TRST HGPIO(TRST) + +#define GPIO_INPUT_MASK ((EP9307_TCK)|(EP9307_TMS)|(EP9307_TDI)|(EP9307_TRST)) +#define GPIO_OUTPUT_MASK (~(EP9307_TDO)) +#define GPIO_BITMASK (~((EP9307_TDO)|(EP9307_TDI)|(EP9307_TMS)|(EP9307_TCK)|(EP9307_TRST))) typedef struct { diff --git a/urjtag/src/tap/cable/wiggler.c b/urjtag/src/tap/cable/wiggler.c index 5d05f8fb..4e8fd1e0 100644 --- a/urjtag/src/tap/cable/wiggler.c +++ b/urjtag/src/tap/cable/wiggler.c @@ -48,11 +48,11 @@ * * data D[7:0] (pins 9:2) */ -#define nTRST 4 /* nTRST is not inverted in the cable */ -#define TDI 3 -#define TCK 2 -#define TMS 1 -#define nSRESET 0 /* sRESET is inverted in the cable */ +#define nTRST 4 /* nTRST is not inverted in the cable */ +#define TDI 3 +#define TCK 2 +#define TMS 1 +#define nSRESET 0 /* sRESET is inverted in the cable */ /* * 7 - BUSY (pin 11) @@ -61,59 +61,55 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 7 +#define TDO 7 /* macros used to stringify the defines above */ #define xstr(s) str(s) #define str(s) #s static const char *std_wgl_map = xstr (TDO) "," - xstr (nTRST) - "," - xstr (TDI) - "," - xstr (TCK) - "," - xstr (TMS) - "," "#" - xstr (nSRESET); + xstr (nTRST) "," + xstr (TDI) "," + xstr (TCK) "," + xstr (TMS) "," "#" + xstr (nSRESET); /* private parameters of this cable driver */ - typedef struct - { - int signals; - int trst_lvl; - int srst_act, srst_inact; - int tms_act, tms_inact; - int tck_act, tck_inact; - int tdi_act, tdi_inact; - int tdo_act, tdo_inact; - int trst_act, trst_inact; - int unused_bits; - } wiggler_params_t; +typedef struct +{ + int signals; + int trst_lvl; + int srst_act, srst_inact; + int tms_act, tms_inact; + int tck_act, tck_inact; + int tdi_act, tdi_inact; + int tdo_act, tdo_inact; + int trst_act, trst_inact; + int unused_bits; +} wiggler_params_t; /* access macros for the parameters */ -#define PRM_SIGNALS(cable) ((wiggler_params_t *) cable->params)->signals -#define PRM_TRST_LVL(cable) ((wiggler_params_t *) cable->params)->trst_lvl -#define PRM_SRST_ACT(cable) ((wiggler_params_t *) cable->params)->srst_act -#define PRM_SRST_INACT(cable) ((wiggler_params_t *) cable->params)->srst_inact -#define PRM_TMS_ACT(cable) ((wiggler_params_t *) cable->params)->tms_act -#define PRM_TMS_INACT(cable) ((wiggler_params_t *) cable->params)->tms_inact -#define PRM_TCK_ACT(cable) ((wiggler_params_t *) cable->params)->tck_act -#define PRM_TCK_INACT(cable) ((wiggler_params_t *) cable->params)->tck_inact -#define PRM_TDI_ACT(cable) ((wiggler_params_t *) cable->params)->tdi_act -#define PRM_TDI_INACT(cable) ((wiggler_params_t *) cable->params)->tdi_inact -#define PRM_TDO_ACT(cable) ((wiggler_params_t *) cable->params)->tdo_act -#define PRM_TDO_INACT(cable) ((wiggler_params_t *) cable->params)->tdo_inact -#define PRM_TRST_ACT(cable) ((wiggler_params_t *) cable->params)->trst_act -#define PRM_TRST_INACT(cable) ((wiggler_params_t *) cable->params)->trst_inact -#define PRM_UNUSED_BITS(cable) ((wiggler_params_t *) cable->params)->unused_bits - - - - static int map_pin (char *pin, int *act, int *inact) +#define PRM_SIGNALS(cable) ((wiggler_params_t *) cable->params)->signals +#define PRM_TRST_LVL(cable) ((wiggler_params_t *) cable->params)->trst_lvl +#define PRM_SRST_ACT(cable) ((wiggler_params_t *) cable->params)->srst_act +#define PRM_SRST_INACT(cable) ((wiggler_params_t *) cable->params)->srst_inact +#define PRM_TMS_ACT(cable) ((wiggler_params_t *) cable->params)->tms_act +#define PRM_TMS_INACT(cable) ((wiggler_params_t *) cable->params)->tms_inact +#define PRM_TCK_ACT(cable) ((wiggler_params_t *) cable->params)->tck_act +#define PRM_TCK_INACT(cable) ((wiggler_params_t *) cable->params)->tck_inact +#define PRM_TDI_ACT(cable) ((wiggler_params_t *) cable->params)->tdi_act +#define PRM_TDI_INACT(cable) ((wiggler_params_t *) cable->params)->tdi_inact +#define PRM_TDO_ACT(cable) ((wiggler_params_t *) cable->params)->tdo_act +#define PRM_TDO_INACT(cable) ((wiggler_params_t *) cable->params)->tdo_inact +#define PRM_TRST_ACT(cable) ((wiggler_params_t *) cable->params)->trst_act +#define PRM_TRST_INACT(cable) ((wiggler_params_t *) cable->params)->trst_inact +#define PRM_UNUSED_BITS(cable) ((wiggler_params_t *) cable->params)->unused_bits + + + +static int map_pin (char *pin, int *act, int *inact) { int bitnum; int inverted = 0; diff --git a/urjtag/src/tap/cable/wiggler2.c b/urjtag/src/tap/cable/wiggler2.c index 6e3e34ac..4228184c 100644 --- a/urjtag/src/tap/cable/wiggler2.c +++ b/urjtag/src/tap/cable/wiggler2.c @@ -46,11 +46,11 @@ /* * data D[7:0] (pins 9:2) */ -#define TDI 3 -#define TCK 2 -#define TMS 1 -#define TRST 4 -#define CPU_RESET 0 +#define TDI 3 +#define TCK 2 +#define TMS 1 +#define TRST 4 +#define CPU_RESET 0 /* Certain Macraigor Wigglers appear to use one of the unused data lines as a power line so set all unused bits high. */ @@ -63,7 +63,7 @@ * 4 - SEL (pin 13) * 3 - ERROR (pin 15) */ -#define TDO 7 +#define TDO 7 static int wiggler2_init (urj_cable_t *cable) diff --git a/urjtag/src/tap/cable/xpc.c b/urjtag/src/tap/cable/xpc.c index 843c5a14..f41960bd 100644 --- a/urjtag/src/tap/cable/xpc.c +++ b/urjtag/src/tap/cable/xpc.c @@ -425,11 +425,11 @@ xpc_ext_free (urj_cable_t *cable) /* ---------------------------------------------------------------------- */ -#define PROG 3 -#define TCK 2 -#define TMS 1 -#define TDI 0 -#define TDO 0 +#define PROG 3 +#define TCK 2 +#define TMS 1 +#define TDI 0 +#define TDO 0 static void xpc_clock (urj_cable_t *cable, int tms, int tdi, int n) diff --git a/urjtag/src/tap/discovery.c b/urjtag/src/tap/discovery.c index 712dcf3d..12e5b7a4 100644 --- a/urjtag/src/tap/discovery.c +++ b/urjtag/src/tap/discovery.c @@ -33,10 +33,10 @@ #include "jtag.h" -#define DETECT_PATTERN_SIZE 8 -#define MAX_REGISTER_LENGTH 1024 -#define TEST_COUNT 1 -#define TEST_THRESHOLD 100 /* in % */ +#define DETECT_PATTERN_SIZE 8 +#define MAX_REGISTER_LENGTH 1024 +#define TEST_COUNT 1 +#define TEST_THRESHOLD 100 /* in % */ #undef VERY_LOW_LEVEL_DEBUG