2003-08-19 Marcel Telka <marcel@telka.sk>
* src/bus/Makefile.am (libbus_a_SOURCES): Added s3c4510x.c. * src/bus/s3c4510x.c: New file (Jiun-Shian Ho). git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@527 b68d4a1b-bc3d-0410-92ed-d4ac073336b7master
Marcel Telka
22 years ago
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/**
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** @file s3c4510.c
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**
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** $Id$
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**
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** Copyright (C) 2003, All Rights Reserved
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**
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** This program is free software; you can redistribute it and/or
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** modify it under the terms of the GNU General Public License
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** as published by the Free Software Foundation; either version 2
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** of the License, or (at your option) any later version.
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**
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** This program is distributed in the hope that it will be useful,
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** but WITHOUT ANY WARRANTY; without even the implied warranty of
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** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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** GNU General Public License for more details.
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**
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** You should have received a copy of the GNU General Public License
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** along with this program; if not, write to the Free Software
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** Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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** 02111-1307, USA.
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**
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** @author
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** Jiun-Shian Ho <asky@syncom.com.tw>,
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** Copy from other bus drivers written by Marcel Telka <marcel@telka.sk>
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**
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** @brief
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** Bus driver for Samsung S3C4510X (ARM7TDMI) micro controller.
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**
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** @par Reference Documentations
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** - [1] Samsung Electronics Co., Ltd.,
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** "S3C4510B 32-Bit RISC Microcontroller User's Manual",
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** Revision 1, August 2000, Order Number: 21-S3-C4510B-082000
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**
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** @note
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** - This bus driver is coded basing on S3C4510B.
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** However, Samsung do NOT giving a special JTAG ID-Code for this chip.
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** - Data Bus width is detected by B0SIZE[0:1];
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** the bus parameter is defined as 32-bis, but actually controlled by
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** @ref dbus_width. Make sure that B0SIZE[0:1] is welded correct.
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** Otherwise, you must modify @ref s3c4510_bus_width().
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** - ROM/Flash is selected by nRCS[5:0], now suppose only nRCS0.
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** So is nWBE[4:0], now suppose only nWBE0
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**
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=============================================================================*/
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#include "sysdep.h"
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include "part.h"
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#include "bus.h"
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#include "chain.h"
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#include "bssignal.h"
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/** @brief Bus driver for Samsung S3C4510X */
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typedef struct {
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chain_t *chain;
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part_t *part;
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signal_t *a[22]; /**< Only 22-bits addressing */
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signal_t *d[32]; /**< Data bus */
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signal_t *nrcs[6]; /**< not ROM/SRAM/Flash Chip Select;
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** Only using nRCS0. */
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signal_t *nwbe[4]; /**< not Write Byte Enable */
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signal_t *noe; /**< not Output Enable */
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} bus_params_t;
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#define CHAIN ((bus_params_t *) bus->params)->chain
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#define PART ((bus_params_t *) bus->params)->part
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#define A ((bus_params_t *) bus->params)->a
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#define D ((bus_params_t *) bus->params)->d
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#define nRCS ((bus_params_t *) bus->params)->nrcs
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#define nWBE ((bus_params_t *) bus->params)->nwbe
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#define nOE ((bus_params_t *) bus->params)->noe
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/** @brief Width of Data Bus. Detected by B0SIZE[1:0] */
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unsigned char dbus_width = 16;
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static void
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setup_address( bus_t *bus, uint32_t a )
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{
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int i;
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part_t *p = PART;
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for (i = 0; i < 22; i++)
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part_set_signal( p, A[i], 1, (a >> i) & 1 );
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}
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static void
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set_data_in( bus_t *bus )
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{
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int i;
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part_t *p = PART;
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for (i = 0; i < dbus_width; i++)
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part_set_signal( p, D[i], 0, 0 );
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}
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static void
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setup_data( bus_t *bus, uint32_t d )
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{
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int i;
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part_t *p = PART;
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for (i = 0; i < dbus_width; i++)
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part_set_signal( p, D[i], 1, (d >> i) & 1 );
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/* Set other bits as 0 */
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for (i = dbus_width; i < 32; i++)
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part_set_signal( p, D[i], 1, 0 );
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}
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static void
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s3c4510_bus_printinfo( void )
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{
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int i;
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for (i = 0; i < CHAIN->parts->len; i++)
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if (PART == CHAIN->parts->parts[i])
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break;
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printf( _("Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d)\n"), i );
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}
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static void
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s3c4510_bus_prepare( bus_t *bus )
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{
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part_set_instruction( PART, "EXTEST" );
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chain_shift_instructions( CHAIN );
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}
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static void
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s3c4510_bus_read_start( bus_t *bus, uint32_t adr )
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{
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/* see Figure 4-19 in [1] */
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part_t *p = PART;
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chain_t *chain = CHAIN;
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part_set_signal( p, nRCS[0], 1, 0 );
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part_set_signal( p, nRCS[1], 1, 1 );
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part_set_signal( p, nRCS[2], 1, 1 );
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part_set_signal( p, nRCS[3], 1, 1 );
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part_set_signal( p, nRCS[4], 1, 1 );
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part_set_signal( p, nRCS[5], 1, 1 );
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part_set_signal( p, nWBE[0], 1, 1 );
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part_set_signal( p, nWBE[1], 1, 1 );
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part_set_signal( p, nWBE[2], 1, 1 );
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part_set_signal( p, nWBE[3], 1, 1 );
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part_set_signal( p, nOE, 1, 0 );
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setup_address( bus, adr );
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set_data_in( bus );
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chain_shift_data_registers( chain, 0 );
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}
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static uint32_t
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s3c4510_bus_read_next( bus_t *bus, uint32_t adr )
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{
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/* see Figure 4-20 in [1] */
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part_t *p = PART;
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chain_t *chain = CHAIN;
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int i;
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uint32_t d = 0;
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setup_address( bus, adr );
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chain_shift_data_registers( chain, 1 );
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for (i = 0; i < dbus_width; i++)
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d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
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return d;
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}
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static uint32_t
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s3c4510_bus_read_end( bus_t *bus )
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{
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/* see Figure 4-19 in [1] */
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part_t *p = PART;
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chain_t *chain = CHAIN;
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int i;
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uint32_t d = 0;
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part_set_signal( p, nRCS[0], 1, 1 );
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part_set_signal( p, nRCS[1], 1, 1 );
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part_set_signal( p, nRCS[2], 1, 1 );
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part_set_signal( p, nRCS[3], 1, 1 );
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part_set_signal( p, nRCS[4], 1, 1 );
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part_set_signal( p, nRCS[5], 1, 1 );
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part_set_signal( p, nWBE[0], 1, 1 );
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part_set_signal( p, nWBE[1], 1, 1 );
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part_set_signal( p, nWBE[2], 1, 1 );
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part_set_signal( p, nWBE[3], 1, 1 );
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part_set_signal( p, nOE, 1, 1 );
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chain_shift_data_registers( chain, 1 );
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for (i = 0; i < dbus_width; i++)
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d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
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return d;
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}
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static uint32_t
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s3c4510_bus_read( bus_t *bus, uint32_t adr )
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{
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s3c4510_bus_read_start( bus, adr );
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return s3c4510_bus_read_end( bus );
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}
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/**
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** @brief
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** ROM/SRAM/FlashPage Write Access Timing
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*/
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static void
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s3c4510_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
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{
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/* see Figure 4-21 in [1] */
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part_t *p = PART;
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chain_t *chain = CHAIN;
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part_set_signal( p, nRCS[0], 1, 0 );
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part_set_signal( p, nRCS[1], 1, 1 );
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part_set_signal( p, nRCS[2], 1, 1 );
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part_set_signal( p, nRCS[3], 1, 1 );
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part_set_signal( p, nRCS[4], 1, 1 );
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part_set_signal( p, nRCS[5], 1, 1 );
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part_set_signal( p, nWBE[0], 1, 1 );
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part_set_signal( p, nWBE[1], 1, 1 );
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part_set_signal( p, nWBE[2], 1, 1 );
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part_set_signal( p, nWBE[3], 1, 1 );
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part_set_signal( p, nOE, 1, 1 );
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setup_address( bus, adr );
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setup_data( bus, data );
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chain_shift_data_registers( chain, 0 );
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part_set_signal( p, nWBE[0], 1, 0 );
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chain_shift_data_registers( chain, 0 );
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part_set_signal( p, nWBE[0], 1, 1 );
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part_set_signal( p, nRCS[0], 1, 1 );
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part_set_signal( p, nRCS[1], 1, 1 );
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part_set_signal( p, nRCS[2], 1, 1 );
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part_set_signal( p, nRCS[3], 1, 1 );
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part_set_signal( p, nRCS[4], 1, 1 );
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part_set_signal( p, nRCS[5], 1, 1 );
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chain_shift_data_registers( chain, 0 );
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}
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static int
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s3c4510_bus_width( bus_t *bus, uint32_t adr )
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{
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int b0size0, b0size1;
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b0size0 = part_get_signal( PART, part_find_signal( PART, "B0SIZE0" ));
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b0size1 = part_get_signal( PART, part_find_signal( PART, "B0SIZE1" ));
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switch ((b0size1 << 1) | b0size0) {
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case 1:
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printf( "B0SIZE[1:0]: 01, 8 bits\n" );
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dbus_width = 8;
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return 8;
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case 2:
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printf( "B0SIZE[1:0]: 10, 16 bits\n" );
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dbus_width = 16;
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return 16;
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case 3:
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printf( "B0SIZE[1:0]: 11, 32 bits\n" );
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dbus_width = 32;
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return 32;
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default:
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printf( "B0SIZE[1:0]: Unknown\n" );
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return 0;
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}
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}
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static void
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s3c4510_bus_free( bus_t *bus )
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{
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free( bus->params );
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free( bus );
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}
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static const bus_t s3c4510_bus = {
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NULL,
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s3c4510_bus_printinfo,
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s3c4510_bus_prepare,
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s3c4510_bus_width,
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s3c4510_bus_read_start,
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s3c4510_bus_read_next,
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s3c4510_bus_read_end,
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s3c4510_bus_read,
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s3c4510_bus_write,
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s3c4510_bus_free
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};
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bus_t *
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new_s3c4510_bus( chain_t *chain, int pn )
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{
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bus_t *bus;
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char buff[10];
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int i;
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int failed = 0;
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if (!chain || !chain->parts || chain->parts->len <= pn || pn < 0)
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return NULL;
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bus = malloc( sizeof (bus_t) );
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if (!bus)
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return NULL;
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memcpy( bus, &s3c4510_bus, sizeof (bus_t) );
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bus->params = malloc( sizeof (bus_params_t) );
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if (!bus->params) {
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free( bus );
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return NULL;
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}
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CHAIN = chain;
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PART = chain->parts->parts[pn];
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for (i = 0; i < 22; i++) {
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sprintf( buff, "ADDR%d", i );
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A[i] = part_find_signal( PART, buff );
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if (!A[i]) {
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printf( _("signal '%s' not found\n"), buff );
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failed = 1;
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break;
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}
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}
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for (i = 0; i < 32; i++) {
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sprintf( buff, "XDATA%d", i );
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D[i] = part_find_signal( PART, buff );
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if (!D[i]) {
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printf( _("signal '%s' not found\n"), buff );
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failed = 1;
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break;
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}
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}
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for (i = 0; i < 6; i++) {
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sprintf( buff, "nRCS%d", i );
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nRCS[i] = part_find_signal( PART, buff );
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if (!nRCS[i]) {
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printf( _("signal '%s' not found\n"), buff );
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failed = 1;
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break;
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}
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}
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for (i = 0; i < 4; i++) {
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sprintf( buff, "nWBE%d", i );
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nWBE[i] = part_find_signal( PART, "nWBE" );
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if (!nWBE) {
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printf( _("signal '%s' not found\n"), buff );
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failed = 1;
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break;
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}
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}
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nOE = part_find_signal( PART, "nOE" );
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if (!nOE) {
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printf( _("signal '%s' not found\n"), "nOE" );
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failed = 1;
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}
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if (failed) {
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free( bus->params );
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free( bus );
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return NULL;
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}
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return bus;
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}
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/*=============================================================================
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**
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** CVS Log
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** $Log$
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** Revision 1.1 2003/08/19 09:53:25 telka
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** 2003-08-19 Marcel Telka <marcel@telka.sk>
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**
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** * src/bus/Makefile.am (libbus_a_SOURCES): Added s3c4510x.c.
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** * src/bus/s3c4510x.c: New file (Jiun-Shian Ho).
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**
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*/
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