make urj_log into a macro. Principal reason: if urj_log won't print, it also

won't evaluate the arguments so there is no performance penalty in having
gazillion disabled low-level prints;

src/bus to use urj_log() i.s.o. printf; set urj_error wherever appropriate;
return FAIL/OK state where appropriate. read_start() now returns status.



git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1606 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Rutger Hofman 16 years ago
parent 64ae992278
commit dec5f8f6dc

@ -1,3 +1,12 @@
2009-05-19 Rutger Hofman <rfhh>
* include/urjtag/error.h: make urj_log into a macro. Principal reason: if
urj_log won't print, it also won't evaluate the arguments so there is no
performance penalty in having gazillion disabled low-level prints
* src/bus/*, include/urjtag/bus_driver.h: refactor src/bus to use urj_log
i.s.o. printf, set urj_error wherever appropriate, return FAIL/OK state
where appropriate. read_start() now returns status.
2009-05-18 Rutger Hofman <rfhh>
* src/cmd/cmd_debug.c, include/urjtag/jtag.h, src/global/urjtag.c: change

@ -60,10 +60,15 @@ struct urj_bus_driver
void (*prepare) (urj_bus_t *bus);
/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
int (*area) (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area);
void (*read_start) (urj_bus_t *bus, uint32_t adr);
/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
int (*read_start) (urj_bus_t *bus, uint32_t adr);
// @@@@ RFHH need to return status
uint32_t (*read_next) (urj_bus_t *bus, uint32_t adr);
// @@@@ RFHH need to return status
uint32_t (*read_end) (urj_bus_t *bus);
// @@@@ RFHH need to return status
uint32_t (*read) (urj_bus_t *bus, uint32_t adr);
// @@@@ RFHH need to return status
void (*write) (urj_bus_t *bus, uint32_t adr, uint32_t data);
int (*init) (urj_bus_t *bus);
};

@ -45,6 +45,7 @@ typedef enum urj_error
URJ_ERROR_BUFFER_EXHAUSTED,
URJ_ERROR_ILLEGAL_STATE,
URJ_ERROR_OUT_OF_BOUNDS,
URJ_ERROR_TIMEOUT,
URJ_ERROR_UNSUPPORTED,
URJ_ERROR_SYNTAX,
@ -53,12 +54,15 @@ typedef enum urj_error
URJ_ERROR_USB, /**< error from libusb */
URJ_ERROR_BUS,
URJ_ERROR_BUS_DMA,
URJ_ERROR_FLASH,
URJ_ERROR_FLASH_DETECT,
URJ_ERROR_FLASH_PROGRAM,
URJ_ERROR_FLASH_ERASE,
URJ_ERROR_FLASH_UNLOCK,
URJ_ERROR_UNIMPLEMENTED,
}
urj_error_t;

@ -40,12 +40,18 @@ urj_log_state_t;
extern urj_log_state_t urj_log_state;
int urj_log (urj_log_level_t level, const char *fmt, ...)
int urj_do_log (urj_log_level_t level, const char *fmt, ...)
#ifdef __GNUC__
__attribute__ ((format (printf, 2, 3)))
#endif
;
#define urj_log(lvl, ...) \
do { \
if ((lvl) >= urj_log_state.level) \
urj_do_log (lvl, __VA_ARGS__); \
} while (0)
/**
* Print warning unless logging level is > URJ_LOG_LEVEL_WARNING
*

@ -24,6 +24,8 @@
*
*/
/* @@@@ RFHH candidate for internal include file? */
#ifndef URJ_USBCONN_LIBUSB_H
#define URJ_USBCONN_LIBUSB_H 1

@ -219,7 +219,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
au1500_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -236,6 +236,8 @@ au1500_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -126,9 +126,6 @@ typedef struct
#define TRACE_ENTER() DBG(DBG_TRACE, ">>> %s", __FUNCTION__ )
#define TRACE_EXIT() DBG(DBG_TRACE, "<<< %s", __FUNCTION__ )
#define ERR(f, ...) \
printf( _("%s(%d): error, " f), __FILE__, __LINE__, ## __VA_ARGS__ )
/* ------------------------------------------------------------------------- */
static inline void
@ -391,7 +388,8 @@ nexus_memacc_read (urj_bus_t *bus, uint32_t *data)
nexus_reg_read (bus, OCD_REG_RWD, data);
break;
default:
ERR ("read failed, status=%lu\n", (long unsigned) status);
urj_error_set (URJ_ERROR_BUS, "read failed, status=%lu",
(long unsigned) status);
*data = 0xffffffff;
ret = ACCESS_STATUS_ERR;
break;
@ -420,7 +418,8 @@ nexus_memacc_write (urj_bus_t *bus, uint32_t addr, uint32_t data,
ret = ACCESS_STATUS_OK;
if (status)
{
ERR ("write failed, status=%lu\n", (long unsigned) status);
urj_error_set (URJ_ERROR_BUS, "write failed, status=%lu",
(long unsigned) status);
ret = ACCESS_STATUS_ERR;
}
@ -481,7 +480,7 @@ check_instruction (urj_part_t *part, const char *instr)
ret = (urj_part_find_instruction (part, instr) == NULL);
if (ret)
ERR ("instruction %s not found\n", instr);
urj_error_set (URJ_ERROR_NOTFOUND, "instruction %s not found", instr);
return ret;
}
@ -504,7 +503,7 @@ avr32_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
param = cmd_params[2];
if (!param)
{
ERR ("no bus mode specified\n");
urj_error_set (URJ_ERROR_SYNTAX, "no bus mode specified");
return NULL;
}
@ -534,7 +533,7 @@ avr32_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
}
else
{
ERR ("invalid bus mode: %s\n", param);
urj_error_set (URJ_ERROR_SYNTAX, "invalid bus mode: %s", param);
return NULL;
}
@ -667,7 +666,7 @@ avr32_bus_area (urj_bus_t *bus, uint32_t addr, urj_bus_area_t *area)
* bus->driver->(*read_start)
*
*/
static void
static int
avr32_bus_read_start (urj_bus_t *bus, uint32_t addr)
{
addr &= ADDR_MASK;
@ -692,6 +691,8 @@ avr32_bus_read_start (urj_bus_t *bus, uint32_t addr)
nexus_memacc_set_addr (bus, addr, RWCS_RD);
break;
}
return URJ_STATUS_OK;
}
/**

@ -190,7 +190,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
bcm1250_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -212,6 +212,8 @@ bcm1250_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**
@ -308,7 +310,7 @@ static uint64_t base = 0x1fc00000;
static int
bcm1250_ejtag_do (urj_bus_t *bus, uint64_t ad, uint64_t da, int read,
int type, unsigned char *buf, int verbose)
int type, unsigned char *buf)
{
urj_part_t *p = bus->part;
@ -320,9 +322,8 @@ bcm1250_ejtag_do (urj_bus_t *bus, uint64_t ad, uint64_t da, int read,
int j, k, n, m;
uint64_t a;
if (verbose)
printf ("BCM1250: ejtag_do(%08Lx, %08Lx, %i, %i)\n", ad, da, read,
type);
urj_log (URJ_LOG_LEVEL_DETAIL, "BCM1250: ejtag_do(%08Lx, %08Lx, %i, %i)\n",
ad, da, read, type);
a = ad >> 5;
for (j = 0; j < 35; j++)
@ -431,10 +432,13 @@ bcm1250_ejtag_do (urj_bus_t *bus, uint64_t ad, uint64_t da, int read,
p->active_instruction->data_register->in->data[j] = ctrl[k++] & 1;
}
urj_tap_chain_shift_data_registers (chain, 1);
if (verbose || read)
if (urj_log_state.level <= URJ_LOG_LEVEL_DETAIL || read)
{
volatile int q;
int to;
const urj_tap_register_t *out;
out = p->active_instruction->data_register->out;
to = 5;
for (q = 0; q < 100; q++);
@ -442,8 +446,7 @@ bcm1250_ejtag_do (urj_bus_t *bus, uint64_t ad, uint64_t da, int read,
urj_tap_chain_shift_instructions (chain);
urj_tap_chain_shift_data_registers (chain, 1);
while ((p->active_instruction->data_register->out->data[276 - 17] ==
0) && to--)
while ((out->data[276 - 17] == 0) && to--)
{
urj_tap_chain_shift_data_registers (chain, 1);
}
@ -453,30 +456,23 @@ bcm1250_ejtag_do (urj_bus_t *bus, uint64_t ad, uint64_t da, int read,
for (m = 0; m < 8; m++)
{
buf[j] <<= 1;
buf[j] +=
p->active_instruction->data_register->out->data[255 -
(j * 8) -
m] & 1;
buf[j] += out->data[255 - (j * 8) - m] & 1;
}
if (verbose)
printf ("%02x ", buf[j]);
urj_log (URJ_LOG_LEVEL_DETAIL, "%02x ", buf[j]);
}
if (verbose)
if (urj_log_state.level <= URJ_LOG_LEVEL_DETAIL)
{
printf ("\n");
urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
printf (" status:\n");
urj_log (URJ_LOG_LEVEL_DETAIL, " status:\n");
for (j = 0; j < 21; j++)
{
printf ("%c",
'0' +
p->active_instruction->data_register->out->data[276 -
j]);
urj_log (URJ_LOG_LEVEL_DETAIL, "%c", '0' + out->data[276 - j]);
if ((j == 5) || (j == 11) || (j == 12) || (j == 16)
|| (j == 17))
printf (" ");
urj_log (URJ_LOG_LEVEL_DETAIL, " ");
}
printf ("\n");
urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
}
}
return URJ_STATUS_OK;

@ -245,7 +245,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
bf533_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -259,6 +259,8 @@ bf533_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**
@ -316,7 +318,7 @@ bf533_ezkit_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
urj_part_t *p = bus->part;
urj_chain_t *chain = bus->chain;
// printf("Writing %04X to %08X...\n", data, adr);
urj_log (URJ_LOG_LEVEL_COMM, "Writing %04X to %08X...\n", data, adr);
select_flash (bus);
urj_part_set_signal (p, AOE, 1, 1);

@ -247,7 +247,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
bf533_stamp_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -261,6 +261,8 @@ bf533_stamp_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**
@ -318,7 +320,7 @@ bf533_stamp_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
urj_part_t *p = bus->part;
urj_chain_t *chain = bus->chain;
// printf("Writing %04X to %08X...\n", data, adr);
urj_log (URJ_LOG_LEVEL_COMM, "Writing %04X to %08X...\n", data, adr);
select_flash (bus);
urj_part_set_signal (p, AOE, 1, 1);

@ -229,7 +229,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
bf537_stamp_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -243,6 +243,8 @@ bf537_stamp_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -234,7 +234,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
bf548_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -249,6 +249,8 @@ bf548_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -261,7 +261,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
bf561_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -275,6 +275,8 @@ bf561_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -295,7 +295,7 @@ get_data_out (urj_bus_t *bus)
* bus->driver->(*read_start)
*
*/
static void
static int
flashbscoach_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -314,6 +314,7 @@ flashbscoach_bus_read_start (urj_bus_t *bus, uint32_t adr)
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -177,7 +177,6 @@ urj_bus_buses_add (urj_bus_t *abus)
/* @@@@ RFHH add status return */
urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
(size_t) 1, sizeof (urj_bus_t));
printf (_("Out of memory\n"));
return;
}
urj_buses.buses = b;

@ -158,7 +158,7 @@ ejtag_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
if (bus->part == bus->chain->parts->parts[i])
break;
urj_log (ll, _("EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"),
i);
i);
}
static uint32_t
@ -204,21 +204,20 @@ ejtag_run_pracc (urj_bus_t *bus, const uint32_t *code, unsigned int len)
urj_tap_chain_shift_data_registers (bus->chain, 0);
urj_tap_chain_shift_data_registers (bus->chain, 1);
// printf( "ctrl=%s\n", urj_tap_register_get_string( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "ctrl=%s\n",
urj_tap_register_get_string (ejctrl->out));
if (ejctrl->out->data[Rocc])
{
printf (_("%s(%d) Reset occurred, ctrl=%s\n"),
__FILE__, __LINE__,
urj_tap_register_get_string (ejctrl->out));
urj_error_set (URJ_ERROR_BUS, _("Reset occurred, ctrl=%s"),
urj_tap_register_get_string (ejctrl->out));
bus->initialized = 0;
break;
}
if (!ejctrl->out->data[PrAcc])
{
printf (_("%s(%d) No processor access, ctrl=%s\n"),
__FILE__, __LINE__,
urj_tap_register_get_string (ejctrl->out));
urj_error_set (URJ_ERROR_BUS, _("No processor access, ctrl=%s"),
urj_tap_register_get_string (ejctrl->out));
bus->initialized = 0;
break;
}
@ -230,8 +229,9 @@ ejtag_run_pracc (urj_bus_t *bus, const uint32_t *code, unsigned int len)
addr = reg_value (ejaddr->out);
if (addr & 3)
{
printf (_("%s(%d) PrAcc bad alignment: addr=0x%08lx\n"),
__FILE__, __LINE__, (long unsigned) addr);
urj_error_set (URJ_ERROR_BUS,
_("PrAcc bad alignment: addr=0x%08lx"),
(long unsigned) addr);
addr &= ~3;
}
@ -244,10 +244,10 @@ ejtag_run_pracc (urj_bus_t *bus, const uint32_t *code, unsigned int len)
{
urj_tap_chain_shift_data_registers (bus->chain, 1);
data = reg_value (ejdata->out);
#if 0
printf (_("%s(%d) PrAcc write: addr=0x%08lx data=0x%08lx\n"),
__FILE__, __LINE__, addr, data);
#endif
urj_log (URJ_LOG_LEVEL_ALL,
_("%s(%d) PrAcc write: addr=0x%08lx data=0x%08lx\n"),
__FILE__, __LINE__,
(long unsigned) addr, (long unsigned) data);
if (addr == UINT32_C (0xff200000))
{
/* Return value from the target CPU. */
@ -255,9 +255,9 @@ ejtag_run_pracc (urj_bus_t *bus, const uint32_t *code, unsigned int len)
}
else
{
printf (_("%s(%d) Unknown write addr=0x%08lx data=0x%08lx\n"),
__FILE__, __LINE__, (long unsigned) addr,
(long unsigned) data);
urj_error_set (URJ_ERROR_BUS,
_("Unknown write addr=0x%08lx data=0x%08lx"),
(long unsigned) addr, (long unsigned) data);
}
}
else
@ -273,10 +273,10 @@ ejtag_run_pracc (urj_bus_t *bus, const uint32_t *code, unsigned int len)
for (i = 0; i < 32; i++)
ejdata->in->data[i] = (data >> i) & 1;
}
#if 0
printf ("%s(%d) PrAcc read: addr=0x%08lx data=0x%08lx\n",
__FILE__, __LINE__, addr, data);
#endif
urj_log (URJ_LOG_LEVEL_ALL,
"%s(%d) PrAcc read: addr=0x%08lx data=0x%08lx\n",
__FILE__, __LINE__,
(long unsigned) addr, (long unsigned) data);
urj_tap_chain_shift_data_registers (bus->chain, 0);
}
@ -325,35 +325,38 @@ ejtag_bus_init (urj_bus_t *bus)
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
urj_tap_chain_shift_data_registers (bus->chain, 1); //Read
printf ("ImpCode=%s %08lX\n", urj_tap_register_get_string (ejimpl->out),
(long unsigned) reg_value (ejimpl->out));
urj_log (URJ_LOG_LEVEL_NORMAL, "ImpCode=%s %08lX\n",
urj_tap_register_get_string (ejimpl->out),
(long unsigned) reg_value (ejimpl->out));
BP->impcode = reg_value (ejimpl->out);
switch (EJTAG_VER)
{
case EJTAG_20:
printf ("EJTAG version: <= 2.0\n");
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: <= 2.0\n");
break;
case EJTAG_25:
printf ("EJTAG version: 2.5\n");
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 2.5\n");
break;
case EJTAG_26:
printf ("EJTAG version: 2.6\n");
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 2.6\n");
break;
case EJTAG_31:
printf ("EJTAG version: 3.1\n");
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 3.1\n");
break;
default:
printf ("EJTAG version: unknown (%lu)\n", (long unsigned) EJTAG_VER);
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: unknown (%lu)\n",
(long unsigned) EJTAG_VER);
}
printf ("EJTAG Implementation flags:%s%s%s%s%s%s%s\n",
(BP->impcode & (1 << 28)) ? " R3k" : " R4k",
(BP->impcode & (1 << 24)) ? " DINTsup" : "",
(BP->impcode & (1 << 22)) ? " ASID_8" : "",
(BP->impcode & (1 << 21)) ? " ASID_6" : "",
(BP->impcode & (1 << 16)) ? " MIPS16" : "",
(BP->impcode & (1 << 14)) ? " NoDMA" : " DMA",
(BP->impcode & (1)) ? " MIPS64" : " MIPS32");
urj_log (URJ_LOG_LEVEL_NORMAL,
"EJTAG Implementation flags:%s%s%s%s%s%s%s\n",
(BP->impcode & (1 << 28)) ? " R3k" : " R4k",
(BP->impcode & (1 << 24)) ? " DINTsup" : "",
(BP->impcode & (1 << 22)) ? " ASID_8" : "",
(BP->impcode & (1 << 21)) ? " ASID_6" : "",
(BP->impcode & (1 << 16)) ? " MIPS16" : "",
(BP->impcode & (1 << 14)) ? " NoDMA" : " DMA",
(BP->impcode & (1)) ? " MIPS64" : " MIPS32");
if (EJTAG_VER >= EJTAG_25)
{
@ -376,16 +379,18 @@ ejtag_bus_init (urj_bus_t *bus)
// Try enabling memory write on EJTAG_20 (BCM6348)
// Badly Copied from HairyDairyMaid V4.8
//ejtag_dma_write(0xff300000, (ejtag_dma_read(0xff300000) & ~(1<<2)) );
// printf("Set Address to READ from\n");
// printf("Select EJTAG ADDRESS Register\n");
urj_log (URJ_LOG_LEVEL_ALL, "Set Address to READ from\n");
urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG ADDRESS Register\n");
urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
urj_tap_chain_shift_instructions (bus->chain);
//Set to Debug Control Register Address, 0xFF300000
urj_tap_register_init (ejaddr->in,
"11111111001100000000000000000000");
// printf("Write to ejaddr->in =%s %08lX\n",urj_tap_register_get_string( ejaddr->in),reg_value( ejaddr->in ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write to ejaddr->in =%s %08lX\n",
urj_tap_register_get_string (ejaddr->in),
(unsigned long) reg_value (ejaddr->in));
urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
// printf("Select EJTAG CONTROL Register\n");
urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG CONTROL Register\n");
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
//Set some bits in CONTROL Register 0x00068B00
@ -397,11 +402,15 @@ ejtag_bus_init (urj_bus_t *bus)
ejctrl->in->data[DrWn] = 1; // 9-------|
ejctrl->in->data[Dsz1] = 1; // 8-------| DMA_WORD = 0x00000100 = Bit8
urj_tap_chain_shift_data_registers (bus->chain, 1); //WriteRead
// printf("Write To ejctrl->in =%s %08lX\n",urj_tap_register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
// printf("Read From ejctrl->out =%s %08lX\n",urj_tap_register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write To ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(unsigned long) reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read From ejctrl->out =%s %08lX\n",
urj_tap_register_get_string (ejctrl->out),
(unsigned long) reg_value (ejctrl->out));
do
{
// printf("Wait for DStrt to clear\n");
urj_log (URJ_LOG_LEVEL_ALL, "Wait for DStrt to clear\n");
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
@ -410,18 +419,26 @@ ejtag_bus_init (urj_bus_t *bus)
ejctrl->in->data[DmaAcc] = 1; // 17----||
ejctrl->in->data[ProbEn] = 1; // 15-----|
urj_tap_chain_shift_data_registers (bus->chain, 1); //WriteRead
// printf("Write To ejctrl->in =%s %08lX\n",urj_tap_register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
// printf("Read From ejctrl->out =%s %08lX\n",urj_tap_register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write To ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(unsigned long) reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read From ejctrl->out =%s %08lX\n",
urj_tap_register_get_string( ejctrl->out),
(unsigned long) reg_value (ejctrl->out));
}
while (ejctrl->out->data[DStrt] == 1);
// printf("Select EJTAG DATA Register\n");
urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG DATA Register\n");
urj_part_set_instruction (bus->part, "EJTAG_DATA");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejdata->in, 0); // Clear Register
urj_tap_chain_shift_data_registers (bus->chain, 1); //WriteRead
// printf( "Write To ejdata->in =%s %08lX\n", urj_tap_register_get_string( ejdata->in), reg_value( ejdata->in ) );
// printf( "Read From ejdata->out =%s %08lX\n", urj_tap_register_get_string( ejdata->out),reg_value( ejdata->out ) );
// printf("Select EJTAG CONTROL Register\n");
urj_log (URJ_LOG_LEVEL_ALL, "Write To ejdata->in =%s %08lX\n",
urj_tap_register_get_string (ejdata->in),
(unsigned long) reg_value (ejdata->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read From ejdata->out =%s %08lX\n",
urj_tap_register_get_string (ejdata->out),
(unsigned long) reg_value (ejdata->out));
urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG CONTROL Register\n");
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
@ -429,35 +446,45 @@ ejtag_bus_init (urj_bus_t *bus)
ejctrl->in->data[PrAcc] = 1; // 18----||
ejctrl->in->data[ProbEn] = 1; // 15-----|
urj_tap_chain_shift_data_registers (bus->chain, 1); //WriteRead
// printf("Write To ejctrl->in =%s %08lX\n",urj_tap_register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
// printf("Read From ejctrl->out =%s %08lX\n",urj_tap_register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write To ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(unsigned long) reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read From ejctrl->out =%s %08lX\n",
urj_tap_register_get_string (ejctrl->out),
(unsigned long) reg_value (ejctrl->out));
if (ejctrl->out->data[DeRR] == 1)
{
printf ("DMA READ ERROR\n");
urj_error_set (URJ_ERROR_BUS_DMA, "DMA READ ERROR");
}
//Now have data from DCR, need to reset the MP Bit (2) and write it back out
urj_tap_register_init (ejdata->in,
urj_tap_register_get_string (ejdata->out));
ejdata->in->data[MemProt] = 0;
// printf( "Need to Write ejdata-> =%s %08lX\n", urj_tap_register_get_string( ejdata->in),reg_value( ejdata->in ) );
urj_log (URJ_LOG_LEVEL_ALL, "Need to Write ejdata-> =%s %08lX\n",
urj_tap_register_get_string (ejdata->in),
(unsigned long) reg_value (ejdata->in));
// Now the Write
// printf("Set Address To Write To\n");
// printf("Select EJTAG ADDRESS Register\n");
urj_log (URJ_LOG_LEVEL_ALL, "Set Address To Write To\n");
urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG ADDRESS Register\n");
urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_init (ejaddr->in,
"11111111001100000000000000000000");
// printf("Write to ejaddr->in =%s %08lX\n",urj_tap_register_get_string( ejaddr->in), reg_value( ejaddr->in ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write to ejaddr->in =%s %08lX\n",
urj_tap_register_get_string (ejaddr->in),
(unsigned long) reg_value (ejaddr->in));
//This appears to be a write with NO Read
urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
// printf("Select EJTAG DATA Register\n");
urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG DATA Register\n");
urj_part_set_instruction (bus->part, "EJTAG_DATA");
urj_tap_chain_shift_instructions (bus->chain);
//The value is already in ejdata->in, so write it
// printf("Write To ejdata->in =%s %08lX\n", urj_tap_register_get_string( ejdata->in),reg_value( ejdata->in ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write To ejdata->in =%s %08lX\n",
urj_tap_register_get_string (ejdata->in),
(unsigned long) reg_value (ejdata->in));
urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
// printf("Select EJTAG CONTROL Register\n");
urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG CONTROL Register\n");
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
@ -469,11 +496,15 @@ ejtag_bus_init (urj_bus_t *bus)
ejctrl->in->data[ProbEn] = 1; // 15
ejctrl->in->data[PrAcc] = 1; // 18
urj_tap_chain_shift_data_registers (bus->chain, 1); //Write/Read
// printf("Write to ejctrl->in =%s %08lX\n",urj_tap_register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
// printf("Read from ejctrl->out =%s %08lX\n",urj_tap_register_get_string( ejctrl->out), reg_value( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write to ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(unsigned long) reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08lX\n",
urj_tap_register_get_string (ejctrl->out),
(unsigned long) reg_value (ejctrl->out));
do
{
// printf("Wait for DStrt to clear\n");
urj_log (URJ_LOG_LEVEL_ALL, "Wait for DStrt to clear\n");
//Might not need these 2 lines
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
@ -481,11 +512,15 @@ ejtag_bus_init (urj_bus_t *bus)
ejctrl->in->data[ProbEn] = 1; // 15
ejctrl->in->data[PrAcc] = 1; // 18
urj_tap_chain_shift_data_registers (bus->chain, 1); //Write/Read
// printf("Write to ejctrl->in =%s %08lX\n",urj_tap_register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
// printf("Read from ejctrl->out =%s %08lX\n",urj_tap_register_get_string( ejctrl->out), reg_value( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write to ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(unsigned long) reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08lX\n",
urj_tap_register_get_string (ejctrl->out),
(unsigned long) reg_value (ejctrl->out));
}
while (ejctrl->out->data[DStrt] == 1);
// printf("Select EJTAG CONTROL Register\n");
urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG CONTROL Register\n");
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
@ -493,11 +528,15 @@ ejtag_bus_init (urj_bus_t *bus)
ejctrl->in->data[PrAcc] = 1; // 18----||
ejctrl->in->data[ProbEn] = 1; // 15-----|
urj_tap_chain_shift_data_registers (bus->chain, 1); //Write/Read
// printf("Write To ejctrl->in =%s %08lX\n",urj_tap_register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
// printf("Read From ejctrl->out =%s %08lX\n",urj_tap_register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "Write To ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(unsigned long) reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read From ejctrl->out =%s %08lX\n",
urj_tap_register_get_string (ejctrl->out),
(unsigned long) reg_value (ejctrl->out));
if (ejctrl->out->data[DeRR] == 1)
{
printf ("DMA WRITE ERROR\n");
urj_error_set (URJ_ERROR_BUS_DMA, "DMA WRITE ERROR");
}
}
@ -533,7 +572,7 @@ ejtag_bus_init (urj_bus_t *bus)
}
else
{
printf ("Processor entered Debug Mode.\n");
urj_log (URJ_LOG_LEVEL_NORMAL, "Processor entered Debug Mode.\n");
}
if (ejctrl->out->data[Rocc])
{
@ -643,13 +682,16 @@ ejtag_gen_read (urj_bus_t *bus, uint32_t *code, uint32_t adr)
* bus->driver->(*read_start)
*
*/
static void
static int
ejtag_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
uint32_t code[3];
ejtag_run_pracc (bus, code, ejtag_gen_read (bus, code, adr));
// printf("URJ_BUS_READ_START: adr=0x%08lx\n", adr);
urj_log (URJ_LOG_LEVEL_COMM, "URJ_BUS_READ_START: adr=0x%08lx\n",
(long unsigned) adr);
return URJ_STATUS_OK;
}
/**
@ -667,7 +709,9 @@ ejtag_bus_read_next (urj_bus_t *bus, uint32_t adr)
d = ejtag_run_pracc (bus, code, p - code);
// printf("URJ_BUS_READ_NEXT: adr=0x%08lx data=0x%08lx\n", adr, d);
urj_log (URJ_LOG_LEVEL_COMM,
"URJ_BUS_READ_NEXT: adr=0x%08lx data=0x%08lx\n",
(long unsigned) adr, (long unsigned) d);
return d;
}
@ -686,7 +730,8 @@ ejtag_bus_read_end (urj_bus_t *bus)
d = ejtag_run_pracc (bus, code, 2);
// printf("URJ_BUS_READ_END: data=0x%08lx\n", d);
urj_log (URJ_LOG_LEVEL_COMM, "URJ_BUS_READ_END: data=0x%08lx\n",
(long unsigned) d);
return d;
}
@ -729,7 +774,9 @@ ejtag_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
ejtag_run_pracc (bus, code, p - code);
// printf("URJ_BUS_WRITE: adr=0x%08lx data=0x%08lx\n", adr, data);
urj_log (URJ_LOG_LEVEL_COMM,
"URJ_BUS_WRITE: adr=0x%08lx data=0x%08lx\n",
(long unsigned) adr, (long unsigned) data);
}
const urj_bus_driver_t urj_bus_ejtag_bus = {

@ -33,7 +33,6 @@
*
*/
//#define PRINT_DATA_DEBUG 1
#include <sysdep.h>
#include <stdlib.h>
@ -130,7 +129,8 @@ ejtag_dma_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
for (i = 0; i < bus->chain->parts->len; i++)
if (bus->part == bus->chain->parts->parts[i])
break;
urj_log (ll, _("EJTAG compatible bus driver via DMA (JTAG part No. %d)\n"), i);
urj_log (ll, _("EJTAG compatible bus driver via DMA (JTAG part No. %d)\n"),
i);
}
/**
@ -151,7 +151,6 @@ reg_value (urj_tap_register_t *reg)
return retval;
}
#ifdef PRINT_DATA_DEBUG
/* Small debug helper */
static char
siz_ (int sz)
@ -169,7 +168,6 @@ siz_ (int sz)
}
return 'E';
}
#endif
/**
* low-level dma write
@ -210,19 +208,16 @@ ejtag_dma_write (urj_bus_t *bus, unsigned int addr, unsigned int data, int sz)
for (i = 0; i < 32; i++)
ejaddr->in->data[i] = (addr >> i) & 1;
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the address to write */
#ifdef PRINT_DATA_DEBUG
printf ("Wrote to ejaddr->in =%s %08X\n",
urj_tap_register_get_string (ejaddr->in), reg_value (ejaddr->in));
#endif
urj_log (URJ_LOG_LEVEL_COMM, "Wrote to ejaddr->in =%s %08X\n",
urj_tap_register_get_string (ejaddr->in), reg_value (ejaddr->in));
urj_part_set_instruction (bus->part, "EJTAG_DATA");
urj_tap_chain_shift_instructions (bus->chain);
for (i = 0; i < 32; i++)
ejdata->in->data[i] = (data >> i) & 1;
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the data to write */
#ifdef PRINT_DATA_DEBUG
printf ("Wrote to edata->in(%c) =%s %08X\n", siz_ (sz),
urj_tap_register_get_string (ejdata->in), reg_value (ejdata->in));
#endif
urj_log (URJ_LOG_LEVEL_COMM, "Wrote to edata->in(%c) =%s %08X\n",
siz_ (sz), urj_tap_register_get_string (ejdata->in),
reg_value (ejdata->in));
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
@ -233,7 +228,8 @@ ejtag_dma_write (urj_bus_t *bus, unsigned int addr, unsigned int data, int sz)
if (sz)
ejctrl->in->data[sz] = 1; // Size : can be WORD/HALFWORD or nothing for byte
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Do the operation */
//printf("Wrote to ejctrl->in =%s %08X\n",urj_tap_register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08X\n",
urj_tap_register_get_string (ejctrl->in), reg_value (ejctrl->in));
do
{
@ -258,8 +254,8 @@ ejtag_dma_write (urj_bus_t *bus, unsigned int addr, unsigned int data, int sz)
urj_tap_chain_shift_data_registers (bus->chain, 1); // Disable DMA, reset state to previous one.
if (ejctrl->out->data[Derr] == 1)
{ // Check for DMA error, i.e. incorrect address
printf (_("%s(%d) Error on dma write (dma transaction failed)\n"),
__FILE__, __LINE__);
urj_error_set (URJ_ERROR_BUS_DMA,
_("dma write (dma transaction failed)"));
}
return;
}
@ -290,10 +286,8 @@ ejtag_dma_read (urj_bus_t *bus, unsigned int addr, int sz)
for (i = 0; i < 32; i++)
ejaddr->in->data[i] = (addr >> i) & 1;
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the address to read */
#ifdef PRINT_DATA_DEBUG
printf ("Wrote to ejaddr->in =%s %08X\n",
urj_tap_register_get_string (ejaddr->in), reg_value (ejaddr->in));
#endif
urj_log (URJ_LOG_LEVEL_COMM, "Wrote to ejaddr->in =%s %08X\n",
urj_tap_register_get_string (ejaddr->in), reg_value (ejaddr->in));
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
@ -305,7 +299,8 @@ ejtag_dma_read (urj_bus_t *bus, unsigned int addr, int sz)
ejctrl->in->data[sz] = 1; // Size : can be WORD/HALFWORD or nothing for byte
ejctrl->in->data[DmaRwn] = 1; // This is a read
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Do the operation */
//printf("Wrote to ejctrl->in =%s %08X\n",urj_tap_register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08X\n",
urj_tap_register_get_string (ejctrl->in), reg_value (ejctrl->in));
do
{
@ -317,8 +312,12 @@ ejtag_dma_read (urj_bus_t *bus, unsigned int addr, int sz)
ejctrl->in->data[DmaAcc] = 1;
urj_tap_chain_shift_data_registers (bus->chain, 1);
//printf("Wrote to ejctrl->in =%s %08X\n",urj_tap_register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
//printf("Read from ejctrl->out =%s %08X\n",urj_tap_register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08X\n",
urj_tap_register_get_string (ejctrl->in),
reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08X\n",
urj_tap_register_get_string (ejctrl->out),
reg_value (ejctrl->out));
timeout--;
if (!timeout)
break;
@ -330,11 +329,9 @@ ejtag_dma_read (urj_bus_t *bus, unsigned int addr, int sz)
urj_tap_register_fill (ejdata->in, 0);
urj_tap_chain_shift_data_registers (bus->chain, 1);
ret = reg_value (ejdata->out);
#ifdef PRINT_DATA_DEBUG
printf ("Read from ejdata->out(%c) =%s %08X\n", siz_ (sz),
urj_tap_register_get_string (ejdata->out),
reg_value (ejdata->out));
#endif
urj_log (URJ_LOG_LEVEL_COMM, "Read from ejdata->out(%c) =%s %08X\n",
siz_ (sz), urj_tap_register_get_string (ejdata->out),
reg_value (ejdata->out));
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
@ -342,13 +339,15 @@ ejtag_dma_read (urj_bus_t *bus, unsigned int addr, int sz)
ejctrl->in->data[ProbEn] = 1;
urj_tap_chain_shift_data_registers (bus->chain, 1); // Disable DMA, reset state to previous one.
// printf("Wrote to ejctrl->in =%s %08X\n",urj_tap_register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
// printf("Read from ejctrl->out =%s %08X\n",urj_tap_register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08X\n",
urj_tap_register_get_string (ejctrl->in),reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08X\n",
urj_tap_register_get_string (ejctrl->out), reg_value(ejctrl->out));
if (ejctrl->out->data[Derr] == 1)
{ // Check for DMA error, i.e. incorrect address
printf (_("%s(%d) Error on dma read (dma transaction failed)\n"),
__FILE__, __LINE__);
urj_error_set (URJ_ERROR_BUS_DMA,
_("dma read (dma transaction failed)"));
}
switch (sz)
@ -394,15 +393,14 @@ ejtag_dma_bus_init (urj_bus_t *bus)
if (!(ejctrl && ejimpl))
{
printf (_("%s(%d) EJCONTROL or EJIMPCODE register not found\n"),
__FILE__, __LINE__);
urj_error_set (URJ_ERROR_NOTFOUND,
_("EJCONTROL or EJIMPCODE register"));
return URJ_STATUS_FAIL;
}
if (!(ejaddr && ejdata))
{
printf (_
("%s(%d) EJADDRESS of EJDATA register not found, DMA impossible\n"),
__FILE__, __LINE__);
urj_error_set (URJ_ERROR_NOTFOUND,
_("EJADDRESS of EJDATA register; DMA impossible"));
return URJ_STATUS_FAIL;
}
@ -410,41 +408,43 @@ ejtag_dma_bus_init (urj_bus_t *bus)
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_chain_shift_data_registers (bus->chain, 0);
urj_tap_chain_shift_data_registers (bus->chain, 1);
printf ("ImpCode=%s\n", urj_tap_register_get_string (ejimpl->out));
urj_log (URJ_LOG_LEVEL_NORMAL, "ImpCode=%s\n",
urj_tap_register_get_string (ejimpl->out));
BP->impcode = reg_value (ejimpl->out);
switch (EJTAG_VER)
{
case EJTAG_20:
printf ("EJTAG version: <= 2.0\n");
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: <= 2.0\n");
break;
case EJTAG_25:
printf ("EJTAG version: 2.5\n");
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 2.5\n");
break;
case EJTAG_26:
printf ("EJTAG version: 2.6\n");
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 2.6\n");
break;
default:
printf ("EJTAG version: unknown (%lu)\n", (long unsigned) EJTAG_VER);
urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: unknown (%lu)\n",
(long unsigned) EJTAG_VER);
}
printf ("EJTAG Implementation flags:%s%s%s%s%s%s%s\n",
(BP->impcode & (1 << 28)) ? " R3k" : " R4k",
(BP->impcode & (1 << 24)) ? " DINTsup" : "",
(BP->impcode & (1 << 22)) ? " ASID_8" : "",
(BP->impcode & (1 << 21)) ? " ASID_6" : "",
(BP->impcode & (1 << 16)) ? " MIPS16" : "",
(BP->impcode & (1 << 14)) ? " NoDMA" : " DMA",
(BP->impcode & (1)) ? " MIPS64" : " MIPS32");
urj_log (URJ_LOG_LEVEL_NORMAL,
"EJTAG Implementation flags:%s%s%s%s%s%s%s\n",
(BP->impcode & (1 << 28)) ? " R3k" : " R4k",
(BP->impcode & (1 << 24)) ? " DINTsup" : "",
(BP->impcode & (1 << 22)) ? " ASID_8" : "",
(BP->impcode & (1 << 21)) ? " ASID_6" : "",
(BP->impcode & (1 << 16)) ? " MIPS16" : "",
(BP->impcode & (1 << 14)) ? " NoDMA" : " DMA",
(BP->impcode & (1)) ? " MIPS64" : " MIPS32");
if (BP->impcode & (1 << 14))
{
printf ("Warning, plateform claim there are no DMA support\n");
urj_warning ("plateform claim there are no DMA support\n");
}
if (EJTAG_VER != EJTAG_20)
{
printf
("Warning, plateform has a version which is not supposed to have DMA\n");
urj_warning ("plateform has a version which is not supposed to have DMA\n");
}
// The purpose of this is to make the processor break into debug mode on
@ -487,9 +487,9 @@ ejtag_dma_bus_init (urj_bus_t *bus)
if (timeout == 0)
{
printf (_("%s(%d) Failed to enter debug mode, ctrl=%s\n"),
__FILE__, __LINE__,
urj_tap_register_get_string (ejctrl->out));
urj_error_set (URJ_ERROR_TIMEOUT,
_("Failed to enter debug mode, ctrl=%s"),
urj_tap_register_get_string (ejctrl->out));
return URJ_STATUS_FAIL;
}
@ -504,19 +504,21 @@ ejtag_dma_bus_init (urj_bus_t *bus)
// Clear Memory Protection Bit in DCR
printf (_("Clear memory protection bit in DCR\n"));
urj_log (URJ_LOG_LEVEL_NORMAL, _("Clear memory protection bit in DCR\n"));
unsigned int val = ejtag_dma_read (bus, 0xff300000, DMA_WORD);
ejtag_dma_write (bus, 0xff300000, val & ~(1 << 2), DMA_WORD);
// Clear watchdog, if any
printf (_("Clear Watchdog\n"));
urj_log (URJ_LOG_LEVEL_NORMAL, _("Clear Watchdog\n"));
ejtag_dma_write (bus, 0xb8000080, 0, DMA_WORD);
printf (_("Potential flash base address: [0x%x], [0x%x]\n"),
ejtag_dma_read (bus, 0xfffe2000, DMA_WORD),
ejtag_dma_read (bus, 0xfffe1000, DMA_WORD));
urj_log (URJ_LOG_LEVEL_NORMAL,
_("Potential flash base address: [0x%x], [0x%x]\n"),
ejtag_dma_read (bus, 0xfffe2000, DMA_WORD),
ejtag_dma_read (bus, 0xfffe1000, DMA_WORD));
printf (_("Processor successfully switched in debug mode.\n"));
urj_log (URJ_LOG_LEVEL_NORMAL,
_("Processor successfully switched in debug mode.\n"));
bus->initialized = 1;
return URJ_STATUS_OK;
@ -624,7 +626,7 @@ get_sz (uint32_t adr)
static void
ejtag_dma_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
{
//printf("%s:adr=0x%x,data=0x%x\n",__FUNCTION__,adr,data);
urj_log (URJ_LOG_LEVEL_ALL, "%s:adr=0x%x,data=0x%x\n", __func__, adr, data);
ejtag_dma_write (bus, adr, data, get_sz (adr));
}
@ -636,7 +638,7 @@ static uint32_t
ejtag_dma_bus_read (urj_bus_t *bus, uint32_t adr)
{
int data = ejtag_dma_read (bus, adr, get_sz (adr));
//printf("%s:adr=0x%x,got=0x%x\n",__FUNCTION__,adr,data);
urj_log (URJ_LOG_LEVEL_ALL, "%s:adr=0x%x,got=0x%x\n", __func__, adr, data);
return data;
}
@ -645,12 +647,14 @@ static uint32_t _data_read;
* bus->driver->(*read_start)
*
*/
static void
static int
ejtag_dma_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
_data_read = ejtag_dma_read (bus, adr, get_sz (adr));
//printf("%s:adr=0x%x, got=0x%x\n",__FUNCTION__,adr,_data_read);
return;
urj_log (URJ_LOG_LEVEL_ALL, "%s:adr=0x%x, got=0x%x\n", __func__, adr,
_data_read);
return URJ_STATUS_OK;
}
/**
@ -662,7 +666,8 @@ ejtag_dma_bus_read_next (urj_bus_t *bus, uint32_t adr)
{
uint32_t tmp_value = _data_read;
_data_read = ejtag_dma_read (bus, adr, get_sz (adr));
//printf("%s:adr=0x%x, got=0x%x\n",__FUNCTION__,adr,_data_read);
urj_log (URJ_LOG_LEVEL_ALL, "%s:adr=0x%x, got=0x%x\n", __func__, adr,
_data_read);
return tmp_value;
}

@ -95,10 +95,8 @@ fjmem_detect_reg_len (urj_chain_t *chain, urj_part_t *part, char *opcode,
/* build register FJMEM_REG with length of 1 bit */
dr = urj_part_data_register_alloc (FJMEM_REG_NAME, 1);
if (!dr)
{
printf (_("out of memory\n"));
// retain error state
return 0;
}
dr->next = part->data_registers;
part->data_registers = dr;
@ -107,16 +105,14 @@ fjmem_detect_reg_len (urj_chain_t *chain, urj_part_t *part, char *opcode,
that maps to FJMEM_REG */
if (strlen (opcode) != part->instruction_length)
{
printf (_("invalid instruction length\n"));
urj_error_set (URJ_ERROR_INVALID, _("invalid instruction length"));
return 0;
}
i = urj_part_instruction_alloc (FJMEM_INST_NAME, part->instruction_length,
opcode);
if (!i)
{
printf (_("out of memory\n"));
// retain error state
return 0;
}
i->next = part->instructions;
part->instructions = i;
i->data_register = dr;
@ -170,9 +166,8 @@ fjmem_detect_reg_len (urj_chain_t *chain, urj_part_t *part, char *opcode,
fjmem_reg_len -= chain->parts->len - 1;
/* shift once more and return to idle state */
urj_tap_shift_register (chain, dr->in, NULL, URJ_CHAIN_EXITMODE_IDLE);
#ifdef DEBUG
printf ("FJMEM data register length: %d\n", fjmem_reg_len);
#endif
urj_log (URJ_LOG_LEVEL_DEBUG, "FJMEM data register length: %d\n",
fjmem_reg_len);
return fjmem_reg_len < FJMEM_MAX_REG_LEN ? fjmem_reg_len : -1;
}
@ -183,9 +178,6 @@ fjmem_detect_fields (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
block_desc_t *bd = &(BLOCK_DESC);
urj_data_register_t *dr = FJMEM_REG;
int idx;
#ifdef DEBUG
const char *reg_string;
#endif
/* set safe defaults */
bd->block_len = 0;
@ -198,17 +190,13 @@ fjmem_detect_fields (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
if (dr->in)
free (dr->in);
if ((dr->in = urj_tap_register_alloc (bd->reg_len)) == NULL)
{
printf (_("out of memory\n"));
// retain error state
return 0;
}
if (dr->out)
free (dr->out);
if ((dr->out = urj_tap_register_alloc (bd->reg_len)) == NULL)
{
printf (_("out of memory\n"));
// retain error state
return 0;
}
/* Shift the detect instruction (all-1) into FJMEM_REG. */
urj_tap_register_fill (dr->in, 1);
@ -225,10 +213,8 @@ fjmem_detect_fields (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
urj_tap_chain_shift_data_registers (chain, 1);
/* and examine output from field detect */
#ifdef DEBUG
reg_string = urj_tap_register_get_string (dr->out);
printf ("captured: %s\n", reg_string);
#endif
urj_log (URJ_LOG_LEVEL_DEBUG, "captured: %s\n",
urj_tap_register_get_string (dr->out));
/* scan block field */
idx = bd->block_pos;
while (dr->out->data[idx] && (idx < dr->out->len))
@ -245,11 +231,12 @@ fjmem_detect_fields (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
idx++;
bd->data_len = idx - bd->data_pos;
#ifdef DEBUG
printf ("block pos: %d, len: %d\n", bd->block_pos, bd->block_len);
printf ("addr pos: %d, len: %d\n", bd->addr_pos, bd->addr_len);
printf ("data pos: %d, len: %d\n", bd->data_pos, bd->data_len);
#endif
urj_log (URJ_LOG_LEVEL_DEBUG, "block pos: %d, len: %d\n",
bd->block_pos, bd->block_len);
urj_log (URJ_LOG_LEVEL_DEBUG, "addr pos: %d, len: %d\n",
bd->addr_pos, bd->addr_len);
urj_log (URJ_LOG_LEVEL_DEBUG, "data pos: %d, len: %d\n",
bd->data_pos, bd->data_len);
if ((bd->block_len > 0) && (bd->addr_len > 0) && (bd->data_len > 0))
return 1;
@ -264,9 +251,6 @@ fjmem_query_blocks (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
urj_data_register_t *dr = FJMEM_REG;
int max_block_num, block_num;
int failed = 0;
#ifdef DEBUG
const char *reg_string;
#endif
/* the current block number is 0, it has been requested by the previous
shift during fjmem_detect_fields */
@ -286,10 +270,8 @@ fjmem_query_blocks (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
urj_tap_chain_shift_data_registers (chain, 1);
/* and examine output from block query */
#ifdef DEBUG
reg_string = urj_tap_register_get_string (dr->out);
printf ("captured: %s\n", reg_string);
#endif
urj_log (URJ_LOG_LEVEL_DEBUG, "captured: %s\n",
urj_tap_register_get_string (dr->out));
/* extract address field length */
for (addr_len = 0; addr_len < bd->addr_len; addr_len++)
@ -312,7 +294,6 @@ fjmem_query_blocks (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
{
urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
(size_t) 1, sizeof (urj_bus_t));
printf (_("out of memory\n"));
failed |= 1;
break;
}
@ -357,13 +338,11 @@ fjmem_query_blocks (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
/* and fill in end address of this block */
bl->end = bl->start + (1 << (bl->addr_width + bl->ashift)) - 1;
#ifdef DEBUG
printf ("block # %d\n", block_num);
printf (" start 0x%08x\n", bl->start);
printf (" end 0x%08x\n", bl->end);
printf (" addr len %d\n", bl->addr_width);
printf (" data len %d\n", bl->data_width);
#endif
urj_log (URJ_LOG_LEVEL_DEBUG, "block # %d\n", block_num);
urj_log (URJ_LOG_LEVEL_DEBUG, " start 0x%08x\n", bl->start);
urj_log (URJ_LOG_LEVEL_DEBUG, " end 0x%08x\n", bl->end);
urj_log (URJ_LOG_LEVEL_DEBUG, " addr len %d\n", bl->addr_width);
urj_log (URJ_LOG_LEVEL_DEBUG, " data len %d\n", bl->data_width);
}
}
@ -395,7 +374,9 @@ fjmem_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
comma = strchr (params[idx], '=');
if (comma == NULL)
{
printf (_("Wrong parameter specification: %s\n"), params[idx]);
// @@@@ RFHH bail out?
urj_error_set (URJ_ERROR_SYNTAX,
_("Wrong parameter specification: %s"), params[idx]);
continue;
}
@ -468,7 +449,8 @@ fjmem_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
}
}
else
printf (_("Parameter for instruction opcode missing.\n"));
urj_error_set (URJ_ERROR_SYNTAX,
_("Parameter for instruction opcode missing"));
return bus;
}
@ -641,7 +623,7 @@ setup_data (urj_bus_t *bus, uint32_t d, block_param_t *block)
* bus->driver->(*read_start)
*
*/
static void
static int
fjmem_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_chain_t *chain = bus->chain;
@ -653,9 +635,9 @@ fjmem_bus_read_start (urj_bus_t *bus, uint32_t adr)
block_bus_area (bus, adr, &area, &block);
if (!block)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
LAST_ADDR = adr;
return;
return URJ_STATUS_FAIL;
}
setup_address (bus, adr, block);
@ -666,6 +648,8 @@ fjmem_bus_read_start (urj_bus_t *bus, uint32_t adr)
dr->in->data[bd->instr_pos + 2] = 0;
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**
@ -686,7 +670,7 @@ fjmem_bus_read_next (urj_bus_t *bus, uint32_t adr)
block_bus_area (bus, adr, &area, &block);
if (!block)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
LAST_ADDR = adr;
return 0;
}
@ -721,7 +705,7 @@ fjmem_bus_read_end (urj_bus_t *bus)
block_bus_area (bus, LAST_ADDR, &area, &block);
if (!block)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
return 0;
}
@ -757,7 +741,7 @@ fjmem_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
block_bus_area (bus, adr, &area, &block);
if (!block)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
return;
}

@ -26,6 +26,7 @@
#include <stdlib.h>
#include <urjtag/error.h>
#include <urjtag/part.h>
#include <urjtag/chain.h>
@ -35,16 +36,14 @@ int
urj_bus_generic_attach_sig (urj_part_t *part, urj_part_signal_t **sig,
char *id)
{
int failed = URJ_STATUS_OK;
*sig = urj_part_find_signal (part, id);
if (!*sig)
{
printf (_("signal '%s' not found\n"), id);
failed = URJ_STATUS_FAIL;
urj_error_set (URJ_ERROR_NOTFOUND, "signal '%s'", id);
return URJ_STATUS_FAIL;
}
return failed;
return URJ_STATUS_OK;
}
/**
@ -91,6 +90,7 @@ urj_bus_generic_prepare_extest (urj_bus_t *bus)
uint32_t
urj_bus_generic_read (urj_bus_t *bus, uint32_t adr)
{
// @@@@ RFHH check status
URJ_BUS_READ_START (bus, adr);
return URJ_BUS_READ_END (bus);
}

@ -193,7 +193,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
h7202_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
/* see Figure 10-12 in [1] */
@ -211,6 +211,8 @@ h7202_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -214,7 +214,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
ixp425_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -228,6 +228,8 @@ ixp425_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -202,7 +202,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
ixp435_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -216,6 +216,8 @@ ixp435_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -560,7 +560,7 @@ jopcyc_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
* bus->driver->(*read_start)
*
*/
static void
static int
jopcyc_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -571,9 +571,9 @@ jopcyc_bus_read_start (urj_bus_t *bus, uint32_t adr)
comp_bus_area (bus, adr, &area, &comp);
if (!comp)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
LAST_ADDR = adr;
return;
return URJ_STATUS_FAIL;
}
urj_part_set_signal (p, nCS, 1, 0);
@ -589,6 +589,8 @@ jopcyc_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus, comp);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**
@ -608,7 +610,7 @@ jopcyc_bus_read_next (urj_bus_t *bus, uint32_t adr)
comp_bus_area (bus, adr, &area, &comp);
if (!comp)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
LAST_ADDR = adr;
return 0;
}
@ -640,7 +642,7 @@ jopcyc_bus_read_end (urj_bus_t *bus)
comp_bus_area (bus, LAST_ADDR, &area, &comp);
if (!comp)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
return 0;
}
@ -674,7 +676,7 @@ jopcyc_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
comp_bus_area (bus, adr, &area, &comp);
if (!comp)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
return;
}

@ -240,7 +240,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
lh7a400_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
/* see Figure 3-3 in [1] */
@ -255,6 +255,8 @@ lh7a400_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -258,7 +258,7 @@ get_data (urj_bus_t *bus, uint32_t adr)
* bus->driver->(*read_start)
*
*/
static void
static int
mpc5200_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
bus_params_t *bp = (bus_params_t *) bus->params;
@ -290,6 +290,8 @@ mpc5200_bus_read_start (urj_bus_t *bus, uint32_t adr)
urj_part_set_signal (p, nALE, 1, 1);
}
urj_tap_chain_shift_data_registers (bus->chain, 0);
return URJ_STATUS_OK;
}
/**

@ -114,12 +114,14 @@ mpc824x_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
{
// BUS_WIDTH = 64; // Needs to fix, look at setup_data()
BUS_WIDTH = 32;
printf (_(" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently\n"));
urj_error_set (URJ_ERROR_UNSUPPORTED,
_(" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently"));
dfltWidth = 1;
}
else
{
printf (_(" Only 8,32 and 64 bus width are supported for Banks 0 and 1\n"));
urj_error_set (URJ_ERROR_UNSUPPORTED,
_(" Only 8,32 and 64 bus width are supported for Banks 0 and 1"));
return NULL;
}
}
@ -131,7 +133,8 @@ mpc824x_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
if (!strcmp ("help", cmd_params[i]))
{
printf (_("Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n\n"
urj_log (URJ_LOG_LEVEL_NORMAL,
_("Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n\n"
" WIDTH data bus width - 8, 32, 64 (default 8)\n"
" revbits reverse bits in data bus (default - no)\n"
" dbgAddr display address bus state (default - no)\n"
@ -151,7 +154,8 @@ mpc824x_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
}
if (dfltWidth)
printf (_(" Using default bus width %d\n"), BUS_WIDTH);
urj_log (URJ_LOG_LEVEL_NORMAL,
_(" Using default bus width %d\n"), BUS_WIDTH);
// REVBITS = 0;
@ -339,7 +343,8 @@ setup_address (urj_bus_t *bus, uint32_t a)
urj_part_set_signal (p, AR[i], 1, (a >> (i + 3)) & 1);
break;
default:
printf (_("Warning: unhandled bus width: %i\n"), BUS_WIDTH);
urj_error_set (URJ_ERROR_UNSUPPORTED,
_("Warning: unhandled bus width: %i"), BUS_WIDTH);
return;
}
@ -362,18 +367,18 @@ setup_address (urj_bus_t *bus, uint32_t a)
return;
}
printf (_("Addr [%2d:0]: %06lX "), k, (long unsigned) a);
urj_log (URJ_LOG_LEVEL_DEBUG, _("Addr [%2d:0]: %06lX "), k, (long unsigned) a);
for (i = 0; i < 3; i++)
{
for (j = 0; j < 8; j++)
if ((i * 8 + j) >= (23 - k))
printf ("%1lu",
urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu",
(long unsigned) ((a >> (23 - (i * 8 + j))) & 1));
else
printf (" ");
printf (" ");
urj_log (URJ_LOG_LEVEL_DEBUG, " ");
urj_log (URJ_LOG_LEVEL_DEBUG, " ");
}
printf ("\n");
urj_log (URJ_LOG_LEVEL_DEBUG, "\n");
}
}
@ -412,7 +417,7 @@ setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
/* Just for debugging */
if (dbgData)
{
printf (_("Data WR [%d:0]: %08lX "), area.width - 1,
urj_log (URJ_LOG_LEVEL_DEBUG, _("Data WR [%d:0]: %08lX "), area.width - 1,
(long unsigned) d);
int j;
int bytes = 0;
@ -427,14 +432,14 @@ setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
{
for (j = 0; j < 8; j++)
if (REVBITS)
printf ("%1lu", (long unsigned)
urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu", (long unsigned)
(d >> (BUS_WIDTH - 1 - (i * 8 + j))) & 1);
else
printf ("%1lu", (long unsigned)
urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu", (long unsigned)
(d >> ((i * 8 + j))) & 1);
printf (" ");
urj_log (URJ_LOG_LEVEL_DEBUG, " ");
}
printf ("\n");
urj_log (URJ_LOG_LEVEL_DEBUG, "\n");
}
}
@ -458,7 +463,7 @@ get_data (urj_bus_t *bus, uint32_t adr)
/* Just for debugging */
if (dbgData)
{
printf (_("Data RD [%d:0]: %08lX "), area.width - 1,
urj_log (URJ_LOG_LEVEL_DEBUG, _("Data RD [%d:0]: %08lX "), area.width - 1,
(long unsigned) d);
int j;
int bytes = 0;
@ -473,13 +478,13 @@ get_data (urj_bus_t *bus, uint32_t adr)
{
for (j = 0; j < 8; j++)
if (REVBITS)
printf ("%1lu", (long unsigned)
urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu", (long unsigned)
(d >> (BUS_WIDTH - 1 - (i * 8 + j))) & 1);
else
printf ("%1lu", (long unsigned) (d >> ((i * 8 + j))) & 1);
printf (" ");
urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu", (long unsigned) (d >> ((i * 8 + j))) & 1);
urj_log (URJ_LOG_LEVEL_DEBUG, " ");
}
printf ("\n");
urj_log (URJ_LOG_LEVEL_DEBUG, "\n");
}
return d;
@ -489,7 +494,7 @@ get_data (urj_bus_t *bus, uint32_t adr)
* bus->driver->(*read_start)
*
*/
static void
static int
mpc824x_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -505,6 +510,8 @@ mpc824x_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus, adr);
urj_tap_chain_shift_data_registers (bus->chain, 0);
return URJ_STATUS_OK;
}
/**

@ -184,7 +184,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
ppc405ep_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -198,6 +198,8 @@ ppc405ep_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -188,7 +188,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
ppc440gx_ebc8_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -202,6 +202,8 @@ ppc440gx_ebc8_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -138,8 +138,9 @@ prototype_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
else if (!strcmp ("x32", value))
ashift = 2;
else if (strcmp ("auto", value))
printf (_("value %s not defined for parameter %s\n"), value,
param);
urj_error_set (URJ_ERROR_INVALID,
_("value %s not defined for parameter %s"),
value, param);
continue;
}
@ -150,7 +151,8 @@ prototype_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
sig = urj_part_find_signal (bus->part, value);
if (!sig)
{
printf (_("signal '%s' is not found\n"), value);
urj_error_set (URJ_ERROR_NOTFOUND, _("signal '%s' not found"),
value);
failed = 1;
}
else if (!strcmp ("alsb", param))
@ -194,7 +196,8 @@ prototype_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
}
else
{
printf (_("parameter %s is unknown\n"), param);
urj_error_set (URJ_ERROR_INVALID, _("parameter %s is unknown"),
param);
failed = 1;
}
}
@ -232,7 +235,8 @@ prototype_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
}
else
{
printf (_("parameters alsb=<signal> and/or amsb=<signal> are not defined\n"));
urj_error_set (URJ_ERROR_INVALID,
_("parameters alsb=<signal> and/or amsb=<signal> are not defined"));
failed = 1;
}
@ -291,25 +295,29 @@ prototype_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
}
else
{
printf (_("parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"));
urj_error_set (URJ_ERROR_INVALID,
_("parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"));
failed = 1;
}
if (!CS)
{
printf (_("parameter cs=<signal> or ncs=<signal> is not defined\n"));
urj_error_set (URJ_ERROR_INVALID,
_("parameter cs=<signal> or ncs=<signal> is not defined\n"));
failed = 1;
}
if (!OE)
{
printf (_("parameter oe=<signal> or noe=<signal> is not defined\n"));
urj_error_set (URJ_ERROR_INVALID,
_("parameter oe=<signal> or noe=<signal> is not defined\n"));
failed = 1;
}
if (!WE)
{
printf (_("parameter we=<signal> or nwe=<signal> is not defined\n"));
urj_error_set (URJ_ERROR_INVALID,
_("parameter we=<signal> or nwe=<signal> is not defined\n"));
failed = 1;
}
@ -396,7 +404,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
prototype_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -410,6 +418,8 @@ prototype_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -209,8 +209,7 @@ pxa2xx_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
}
else
{
printf ("BUG in the code, file %s, line %d: unknown PROC\n", __FILE__,
__LINE__);
urj_error_set (URJ_ERROR_INVALID, "processor type %d", PROC);
ncs_map = pxa25x_ncs_map; // be dumb by default
}
for (i = 0; i < nCS_TOTAL; i++)
@ -308,7 +307,10 @@ pxa2xx_bus_init (urj_bus_t *bus)
BOOT_DEF_BOOT_SEL (urj_part_get_signal (p, bs));
}
else
printf ("BUG in the code, file %s, line %d.\n", __FILE__, __LINE__);
{
urj_error_set (URJ_ERROR_INVALID, "processor type %d", PROC);
return URJ_STATUS_FAIL;
}
urj_part_set_instruction (p, "BYPASS");
urj_tap_chain_shift_instructions (chain);
@ -358,12 +360,12 @@ pxa2xx_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
case 5:
case 6:
case 7:
printf ("TODO - BOOT_SEL: %lu\n",
(long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
urj_error_set (URJ_ERROR_UNIMPLEMENTED, "TODO - BOOT_SEL: %lu",
(long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
return URJ_STATUS_FAIL;
default:
printf ("BUG in the code, file %s, line %d.\n", __FILE__,
__LINE__);
urj_error_set (URJ_ERROR_INVALID, "BOOT_DEF value %lu",
(long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
return URJ_STATUS_FAIL;
}
}
@ -457,12 +459,12 @@ pxa27x_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
case 5:
case 6:
case 7:
printf ("TODO - BOOT_SEL: %lu\n",
urj_error_set (URJ_ERROR_UNIMPLEMENTED, "TODO - BOOT_SEL: %lu",
(long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
return URJ_STATUS_FAIL;
default:
printf ("BUG in the code, file %s, line %d.\n", __FILE__,
__LINE__);
urj_error_set (URJ_ERROR_INVALID, "BOOT_SEL: %lu",
(long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
return URJ_STATUS_FAIL;
}
}
@ -473,10 +475,12 @@ pxa27x_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
for (ncs_index = 1, tmp_addr = 0x04000000; ncs_index <= 5;
ncs_index++, tmp_addr += 0x04000000)
{
//printf( "Checking area %08X - %08X... ", tmp_addr, tmp_addr + 0x04000000 - 1);
urj_log (URJ_LOG_LEVEL_DEBUG, "Checking area %08lX - %08lX... ",
(unsigned long)tmp_addr,
(unsigned long)tmp_addr + 0x04000000 - 1);
if ((adr >= tmp_addr) && (adr < tmp_addr + 0x04000000))
{ // if the addr is within our window
//printf( "match\n");
urj_log (URJ_LOG_LEVEL_DEBUG, "match\n");
sprintf (pxa27x_ncs_map[ncs_index].label_buf,
"Static Chip Select %d = %s %s", ncs_index,
pxa27x_ncs_map[ncs_index].sig_name,
@ -488,7 +492,7 @@ pxa27x_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
return URJ_STATUS_OK;
}
//else printf( "no match\n");
urj_log (URJ_LOG_LEVEL_DEBUG, "no match\n");
}
if (adr < UINT32_C (0x40000000))
@ -579,7 +583,7 @@ setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
pxa2xx_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
int cs_index = 0;
@ -589,11 +593,18 @@ pxa2xx_bus_read_start (urj_bus_t *bus, uint32_t adr)
LAST_ADR = adr;
if (adr >= 0x18000000)
return;
{
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, "adr 0x%lx",
(long unsigned) adr);
return URJ_STATUS_FAIL;
}
cs_index = adr >> 26;
if (nCS[cs_index] == NULL)
return;
{
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, "nCS[%d] null", cs_index);
return URJ_STATUS_FAIL;
}
/* see Figure 6-13 in [1] */
urj_part_set_signal (p, nCS[cs_index], 1, 0);
@ -610,6 +621,8 @@ pxa2xx_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus, adr);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -88,6 +88,7 @@ urj_bus_readmem (urj_bus_t *bus, FILE *f, uint32_t addr, uint32_t len)
a = addr;
end = a + len;
urj_log (URJ_LOG_LEVEL_NORMAL, _("reading:\n"));
// @@@@ RFHH check status
URJ_BUS_READ_START (bus, addr);
for (a += step; a <= end; a += step)
{

@ -58,6 +58,7 @@
#include <stdint.h>
#include <string.h>
#include <urjtag/log.h>
#include <urjtag/part.h>
#include <urjtag/bus.h>
#include <urjtag/chain.h>
@ -68,9 +69,6 @@
#include "generic_bus.h"
#ifndef DEBUG_LVL2
#define DEBUG_LVL2(x)
#endif
/** @brief Bus driver for Samsung S3C4510X */
typedef struct
@ -257,7 +255,8 @@ s3c4510_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
area->width = dbus_width = 32;
return URJ_STATUS_OK;
default:
printf ("B0SIZE[1:0]: Unknown\n");
urj_error_set (URJ_ERROR_INVALID, ("B0SIZE[1:0] 0x%01x: Unknown"),
(b0size1 << 1) | b0size0);
area->width = 0;
return URJ_STATUS_FAIL;
}
@ -334,7 +333,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
s3c4510_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
/* see Figure 4-19 in [1] */
@ -344,6 +343,8 @@ s3c4510_bus_read_start (urj_bus_t *bus, uint32_t adr)
setup_address (bus, adr);
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**
@ -433,7 +434,7 @@ s3c4510_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
s3c4510_bus_setup_ctrl (bus, 0x01ffff); /* nOE=1, nRCS0 =1 */
urj_tap_chain_shift_data_registers (chain, 0);
DEBUG_LVL2 (printf ("URJ_BUS_WRITE %08x @ %08x\n", data, adr);)
urj_log (URJ_LOG_LEVEL_DEBUG, "URJ_BUS_WRITE %08x @ %08x\n", data, adr);
}
const urj_bus_driver_t urj_bus_s3c4510_bus = {

@ -200,7 +200,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
sa1110_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
/* see Figure 10-12 in [1] */
@ -221,6 +221,8 @@ sa1110_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -178,7 +178,7 @@ sh7727_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
area->width = 32;
return URJ_STATUS_OK;
default:
printf (_("Error: Invalid bus width (MD3 = MD4 = 0)!\n"));
urj_error_set (URJ_ERROR_INVALID, "Invalid bus width (MD3 = MD4 = 0)");
area->width = 0;
return URJ_STATUS_FAIL;
}
@ -224,7 +224,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
sh7727_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -252,6 +252,8 @@ sh7727_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (bus->chain, 0);
return URJ_STATUS_OK;
}
/**

@ -199,7 +199,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
sh7750r_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -229,6 +229,8 @@ sh7750r_bus_read_start (urj_bus_t *bus, uint32_t adr)
setup_address (bus, adr);
set_data_in (bus);
urj_tap_chain_shift_data_registers (bus->chain, 0);
return URJ_STATUS_OK;
}
/**

@ -195,7 +195,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
sh7751r_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -223,6 +223,8 @@ sh7751r_bus_read_start (urj_bus_t *bus, uint32_t adr)
setup_address (bus, adr);
set_data_in (bus);
urj_tap_chain_shift_data_registers (bus->chain, 0);
return URJ_STATUS_OK;
}
/**

@ -205,7 +205,7 @@ setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
sharc_21065L_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_chain_t *chain = bus->chain;
@ -213,8 +213,11 @@ sharc_21065L_bus_read_start (urj_bus_t *bus, uint32_t adr)
LAST_ADR = adr;
if (adr >= 0x080000)
return;
{
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, "adr 0x%08lx",
(long unsigned) adr);
return URJ_STATUS_FAIL;
}
urj_part_set_signal (p, BMS, 1, 0);
urj_part_set_signal (p, nWE, 1, 1);
@ -224,6 +227,8 @@ sharc_21065L_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus, adr);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -321,7 +321,7 @@ get_data (urj_bus_t *bus, uint32_t adr)
* bus->driver->(*read_start)
*
*/
static void
static int
slsup3_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -351,6 +351,7 @@ slsup3_bus_read_start (urj_bus_t *bus, uint32_t adr)
urj_tap_chain_shift_data_registers (bus->chain, 0);
return URJ_STATUS_OK;
}
/**

@ -235,7 +235,7 @@ setup_data (urj_bus_t *bus, uint32_t d)
* bus->driver->(*read_start)
*
*/
static void
static int
tx4925_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -249,6 +249,8 @@ tx4925_bus_read_start (urj_bus_t *bus, uint32_t adr)
set_data_in (bus);
urj_tap_chain_shift_data_registers (chain, 0);
return URJ_STATUS_OK;
}
/**

@ -709,7 +709,7 @@ zefant_xs3_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
* bus->driver->(*read_start)
*
*/
static void
static int
zefant_xs3_bus_read_start (urj_bus_t *bus, uint32_t adr)
{
urj_part_t *p = bus->part;
@ -721,9 +721,9 @@ zefant_xs3_bus_read_start (urj_bus_t *bus, uint32_t adr)
comp_bus_area (bus, adr, &area, &comp);
if (!comp)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
LAST_ADDR = adr;
return;
return URJ_STATUS_FAIL;
}
/* determine proper address setup strategy for component */
@ -769,10 +769,12 @@ zefant_xs3_bus_read_start (urj_bus_t *bus, uint32_t adr)
break;
default:
printf (_("Component type not supported\n"));
break;
urj_error_set (URJ_ERROR_UNSUPPORTED,
_("Component type not supported"));
return URJ_STATUS_FAIL;
}
return URJ_STATUS_OK;
}
/**
@ -792,7 +794,7 @@ zefant_xs3_bus_read_next (urj_bus_t *bus, uint32_t adr)
comp_bus_area (bus, adr, &area, &comp);
if (!comp)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
LAST_ADDR = adr;
return 0;
}
@ -817,7 +819,8 @@ zefant_xs3_bus_read_next (urj_bus_t *bus, uint32_t adr)
break;
default:
printf (_("Component type not supported\n"));
urj_error_set (URJ_ERROR_UNSUPPORTED,
_("Component type not supported"));
break;
}
@ -842,7 +845,7 @@ zefant_xs3_bus_read_end (urj_bus_t *bus)
comp_bus_area (bus, LAST_ADDR, &area, &comp);
if (!comp)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
return 0;
}
@ -874,7 +877,8 @@ zefant_xs3_bus_read_end (urj_bus_t *bus)
break;
default:
printf (_("Component type not supported\n"));
urj_error_set (URJ_ERROR_UNSUPPORTED,
_("Component type not supported"));
break;
}
@ -897,7 +901,7 @@ zefant_xs3_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
comp_bus_area (bus, adr, &area, &comp);
if (!comp)
{
printf (_("Address out of range\n"));
urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
return;
}
@ -990,7 +994,8 @@ zefant_xs3_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
break;
default:
printf (_("Component type not supported\n"));
urj_error_set (URJ_ERROR_UNSUPPORTED,
_("Component type not supported"));
break;
}
}

@ -121,6 +121,7 @@ urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr,
#define D(data) ((data) << d)
#define gD(data) (((data) >> d) & 0xFF)
#define read1(off) gD(URJ_BUS_READ( bus, A(off) ))
// @@@@ RFHH check status of URJ_BUS_READ_START
#define read2(off) (URJ_BUS_READ_START (bus, A(off)), gD (URJ_BUS_READ_NEXT (bus, A((off) + 1))) | gD (URJ_BUS_READ_END (bus)) << 8)
#define write1(off,data) URJ_BUS_WRITE( bus, A(off), D(data) )

@ -61,7 +61,7 @@ stdout_vprintf(const char *fmt, va_list ap)
}
int
urj_log (urj_log_level_t level, const char *fmt, ...)
urj_do_log (urj_log_level_t level, const char *fmt, ...)
{
va_list ap;
int r;
@ -108,6 +108,7 @@ urj_error_string (urj_error_t err)
case URJ_ERROR_BUFFER_EXHAUSTED: return "buffer exhausted";
case URJ_ERROR_ILLEGAL_STATE: return "illegal state transition";
case URJ_ERROR_OUT_OF_BOUNDS: return "out of bounds";
case URJ_ERROR_TIMEOUT: return "timeout";
case URJ_ERROR_UNSUPPORTED: return "unsupported";
case URJ_ERROR_SYNTAX: return "syntax";
@ -116,12 +117,15 @@ urj_error_string (urj_error_t err)
case URJ_ERROR_USB: return "libusb error";
case URJ_ERROR_BUS: return "bus";
case URJ_ERROR_BUS_DMA: return "bus DMA";
case URJ_ERROR_FLASH: return "flash";
case URJ_ERROR_FLASH_DETECT: return "flash detect";
case URJ_ERROR_FLASH_PROGRAM: return "flash program";
case URJ_ERROR_FLASH_ERASE: return "flash erase";
case URJ_ERROR_FLASH_UNLOCK: return "flash unlock";
case URJ_ERROR_UNIMPLEMENTED: return "unimplemented";
}
return "UNDEFINED ERROR";

@ -37,7 +37,7 @@
#include "generic.h"
#include "generic_parport.h"
#ifdef UNUSED
#ifdef UNUSED // @@@@ RFHH
static void
print_vector (urj_log_level_t ll, int len, char *vec)
{
@ -78,7 +78,6 @@ urj_tap_cable_generic_parport_connect (char *params[], urj_cable_t *cable)
if (port == NULL)
{
// retain error state
// printf (_("Error: Cable connection failed!\n"));
return URJ_STATUS_FAIL;
}

@ -62,7 +62,6 @@ jim_cable_connect (char *params[], urj_cable_t *cable)
if (!s)
{
// retain error state
// printf (_("Initialization failed.\n"));
return URJ_STATUS_FAIL;
}

@ -177,8 +177,7 @@ set_mapping (char *bitmap, urj_cable_t *cable)
if (map_pin (tdo, &(PRM_TDO_ACT (cable)), &(PRM_TDO_INACT (cable))) != 0)
return -1;
if (map_pin (trst, &(PRM_TRST_ACT (cable)), &(PRM_TRST_INACT (cable))) !=
0)
if (map_pin (trst, &(PRM_TRST_ACT (cable)), &(PRM_TRST_INACT (cable))) != 0)
return -1;
if (map_pin (tdi, &(PRM_TDI_ACT (cable)), &(PRM_TDI_INACT (cable))) != 0)
return -1;

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