2005-07-12 Marcel Telka <marcel@telka.sk>

* sh/sh7709s/intc.h: New file.
	* Makefile.am (nobase_openwinceinc_HEADERS): Added sh/sh7709s/intc.h.


git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@654 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Marcel Telka 20 years ago
parent 79ec55d036
commit dfc20c243c

@ -1,3 +1,8 @@
2005-07-12 Marcel Telka <marcel@telka.sk>
* sh/sh7709s/intc.h: New file.
* Makefile.am (nobase_openwinceinc_HEADERS): Added sh/sh7709s/intc.h.
2005-06-29 Marcel Telka <marcel@telka.sk>
* configure.ac: Simplified support for Hitachi Workbench/IAR Compiler.

@ -116,6 +116,7 @@ nobase_openwinceinc_HEADERS = \
h8/h8s2357/timer.h \
h8/h8s2357/tpu.h \
h8/h8s2357/wdt.h \
sh/sh7709s/intc.h \
sh/sh7750/ccn.h \
std/mic.h

@ -5,6 +5,7 @@ include-0.4:
* Added Renesas H8/3048 registers.
* Added Renesas H8S/2357 registers.
* Added Renesas SH7750 CCN registers.
* Added Renesas SH7709S INTC registers.
* Added Hitiachi HD64461 registers.
* Added more manufacturer entries into Manufacturer's Identification Code database.
* Changes in stdint.h support:

@ -0,0 +1,83 @@
/*
* $Id$
*
* Renesas SH7709S Interrupt Controller Registers
* Copyright (C) 2005 Marcel Telka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of the copyright holders nor the names of their
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Written by Marcel Telka <marcel@telka.sk>, 2005.
*
* Documentation:
* [1] Renesas Technology, "SH7709S Group Hardware Manual",
* Rev.5.00, 2003.9.18, REJ09B0081-0500O
*
*/
#ifndef SH7709S_INTC_H
#define SH7709S_INTC_H
#include <common.h>
#if LANGUAGE == C
#include <stdint.h>
#endif
/* Interrupt Controller Registers */
#if LANGUAGE == C
typedef volatile struct INTC_registers {
uint16_t nirr;
uint16_t nimr;
} INTC_registers_t;
#endif /* LANGUAGE == C */
#define NIRR_OFFSET 0x00
#define NIMR_OFFSET 0x02
/* NIRR bits */
#define NIRR_PCC0R bit(14)
#define NIRR_PCC1R bit(13)
#define NIRR_AFER bit(12)
#define NIRR_GPIOR bit(11)
#define NIRR_TMU0R bit(10)
#define NIRR_TMU1R bit(9)
#define NIRR_IRDAR bit(6)
#define NIRR_UARTR bit(5)
/* NIMR bits */
#define NIMR_PCC0M bit(14)
#define NIMR_PCC1M bit(13)
#define NIMR_AFEM bit(12)
#define NIMR_GPIOM bit(11)
#define NIMR_TMU0M bit(10)
#define NIMR_TMU1M bit(9)
#define NIMR_IRDAM bit(6)
#define NIMR_UARTM bit(5)
#endif /* SH7709S_INTC_H */
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