Reverted a few more prefix-replaced strings (urj_flash_cfi_array)

git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1536 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Rutger Hofman 16 years ago
parent d37d7014c5
commit e5b34b6286

@ -35,9 +35,6 @@ noinst_HEADERS = \
data_register.h \
cmd.h \
flash.h \
flash/cfi.h \
flash/mic.h \
flash/intel.h \
gettext.h \
part_instruction.h \
parport.h \

@ -47,21 +47,19 @@
static int dbg = 0;
static int amd_flash_erase_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
static int amd_flash_erase_block (urj_flash_cfi_array_t *cfi_array,
uint32_t adr);
static int amd_flash_unlock_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
static int amd_flash_unlock_block (urj_flash_cfi_array_t *cfi_array,
uint32_t adr);
static int amd_flash_program_single (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr,
uint32_t data);
static int amd_flash_program_buffer (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr,
uint32_t *buffer, int count);
static int amd_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
static int amd_flash_program_single (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t data);
static int amd_flash_program_buffer (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count);
static int amd_flash_program (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count);
static int amd_flash_program32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
static int amd_flash_program32 (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count);
static void amd_flash_read_array (urj_flash_cfi_array_t *urj_flash_cfi_array);
static void amd_flash_read_array (urj_flash_cfi_array_t *cfi_array);
/* The code below assumes a connection of the flash chip address LSB (A0)
* to A0, A1 or A2 of the byte-addressed CPU bus dependent on the bus width.
@ -81,14 +79,14 @@ static void amd_flash_read_array (urj_flash_cfi_array_t *urj_flash_cfi_array);
* driver has to deal with this. - kawk 2008-01 */
static int
amd_flash_address_shift (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_flash_address_shift (urj_flash_cfi_array_t *cfi_array)
{
if (urj_flash_cfi_array->bus_width == 4)
if (cfi_array->bus_width == 4)
return 2;
/* else: urj_flash_cfi_array->bus_width is 2 (16 bit) or 1 (8 bit): */
/* else: cfi_array->bus_width is 2 (16 bit) or 1 (8 bit): */
switch (urj_flash_cfi_array->cfi_chips[0]->cfi.device_geometry.
switch (cfi_array->cfi_chips[0]->cfi.device_geometry.
device_interface)
{
case CFI_INTERFACE_X8_X16: /* regardless whether 8 or 16 bit mode */
@ -103,7 +101,7 @@ amd_flash_address_shift (urj_flash_cfi_array_t *urj_flash_cfi_array)
break;
}
if (urj_flash_cfi_array->bus_width == 2)
if (cfi_array->bus_width == 2)
return 1;
return 0;
@ -111,29 +109,29 @@ amd_flash_address_shift (urj_flash_cfi_array_t *urj_flash_cfi_array)
/* autodetect, we can handle this chip */
static int
amd_flash_autodetect32 (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_flash_autodetect32 (urj_flash_cfi_array_t *cfi_array)
{
if (urj_flash_cfi_array->bus_width != 4)
if (cfi_array->bus_width != 4)
return 0;
return (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
return (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_AMD_SCS);
}
static int
amd_flash_autodetect16 (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_flash_autodetect16 (urj_flash_cfi_array_t *cfi_array)
{
if (urj_flash_cfi_array->bus_width != 2)
if (cfi_array->bus_width != 2)
return 0;
return (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
return (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_AMD_SCS);
}
static int
amd_flash_autodetect8 (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_flash_autodetect8 (urj_flash_cfi_array_t *cfi_array)
{
if (urj_flash_cfi_array->bus_width != 1)
if (cfi_array->bus_width != 1)
return 0;
return (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
return (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_AMD_SCS);
}
@ -147,11 +145,11 @@ amd_flash_autodetect8 (urj_flash_cfi_array_t *urj_flash_cfi_array)
*/
#if 0
static int
amdstatus29 (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr,
amdstatus29 (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
int data)
{
urj_bus_t *bus = urj_flash_cfi_array->bus;
int o = amd_flash_address_shift (urj_flash_cfi_array);
urj_bus_t *bus = cfi_array->bus;
int o = amd_flash_address_shift (cfi_array);
int timeout;
uint32_t dq7mask = ((1 << 7) << 16) + (1 << 7);
uint32_t dq5mask = ((1 << 5) << 16) + (1 << 5);
@ -187,9 +185,9 @@ amdstatus29 (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr,
* second implementation: see [1], page 30
*/
static int
amdstatus (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr, int data)
amdstatus (urj_flash_cfi_array_t *cfi_array, uint32_t adr, int data)
{
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
int timeout;
uint32_t togglemask = ((1 << 6) << 16) + (1 << 6); /* DQ 6 */
@ -224,10 +222,10 @@ amdstatus (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr, int data)
* second implementation: see [1], page 30
*/
static int
amdstatus (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr, int data)
amdstatus (urj_flash_cfi_array_t *cfi_array, uint32_t adr, int data)
{
urj_bus_t *bus = urj_flash_cfi_array->bus;
int o = amd_flash_address_shift (urj_flash_cfi_array);
urj_bus_t *bus = cfi_array->bus;
int o = amd_flash_address_shift (cfi_array);
int timeout;
uint32_t togglemask = ((1 << 6) << 16) + (1 << 6); /* DQ 6 */
/* int dq5mask = ((1 << 5) << 16) + (1 << 5); DQ5 */
@ -269,16 +267,16 @@ amdstatus (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr, int data)
#if 0
static int
amdisprotected (parts * ps, urj_flash_cfi_array_t *urj_flash_cfi_array,
amdisprotected (parts * ps, urj_flash_cfi_array_t *cfi_array,
uint32_t adr)
{
uint32_t data;
int o = amd_flash_address_shift (urj_flash_cfi_array);
int o = amd_flash_address_shift (cfi_array);
URJ_BUS_WRITE (ps, urj_flash_cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, sector erase */
URJ_BUS_WRITE (ps, urj_flash_cfi_array->address + (0x02aa << o),
URJ_BUS_WRITE (ps, cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, sector erase */
URJ_BUS_WRITE (ps, cfi_array->address + (0x02aa << o),
0x00550055);
URJ_BUS_WRITE (ps, urj_flash_cfi_array->address + (0x0555 << o),
URJ_BUS_WRITE (ps, cfi_array->address + (0x0555 << o),
0x00900090);
data = URJ_BUS_READ (ps, adr + (0x0002 << 2));
@ -290,26 +288,23 @@ amdisprotected (parts * ps, urj_flash_cfi_array_t *urj_flash_cfi_array,
#endif /* 0 */
static void
amd_flash_print_info (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_flash_print_info (urj_flash_cfi_array_t *cfi_array)
{
int mid, cid, prot;
urj_bus_t *bus = urj_flash_cfi_array->bus;
int o = amd_flash_address_shift (urj_flash_cfi_array);
urj_bus_t *bus = cfi_array->bus;
int o = amd_flash_address_shift (cfi_array);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29 */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x02aa << o),
URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29 */
URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o),
0x00550055);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0555 << o),
URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o),
0x00900090);
mid =
URJ_BUS_READ (bus,
urj_flash_cfi_array->address + (0x00 << o)) & 0xFFFF;
cid =
URJ_BUS_READ (bus,
urj_flash_cfi_array->address + (0x01 << o)) & 0xFFFF;
prot =
URJ_BUS_READ (bus, urj_flash_cfi_array->address + (0x02 << o)) & 0xFF;
amd_flash_read_array (urj_flash_cfi_array); /* AMD reset */
mid = URJ_BUS_READ (bus,
cfi_array->address + (0x00 << o)) & 0xFFFF;
cid = URJ_BUS_READ (bus,
cfi_array->address + (0x01 << o)) & 0xFFFF;
prot = URJ_BUS_READ (bus, cfi_array->address + (0x02 << o)) & 0xFF;
amd_flash_read_array (cfi_array); /* AMD reset */
printf (_("Chip: AMD Flash\n\tManufacturer: "));
switch (mid)
{
@ -401,47 +396,46 @@ amd_flash_print_info (urj_flash_cfi_array_t *urj_flash_cfi_array)
printf (_("\n\tProtected: %04x\n"), prot);
/* Read Array */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0000 << o),
0x00ff00ff);
URJ_BUS_WRITE (bus, cfi_array->address + (0x0000 << o), 0x00ff00ff);
}
static int
amd_flash_erase_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_flash_erase_block (urj_flash_cfi_array_t *cfi_array,
uint32_t adr)
{
urj_bus_t *bus = urj_flash_cfi_array->bus;
int o = amd_flash_address_shift (urj_flash_cfi_array);
urj_bus_t *bus = cfi_array->bus;
int o = amd_flash_address_shift (cfi_array);
printf ("flash_erase_block 0x%08X\n", adr);
/* printf("protected: %d\n", amdisprotected(ps, urj_flash_cfi_array, adr)); */
/* printf("protected: %d\n", amdisprotected(ps, cfi_array, adr)); */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, sector erase */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x02aa << o),
URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, sector erase */
URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o),
0x00550055);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0555 << o),
URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o),
0x00800080);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0555 << o),
URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o),
0x00aa00aa);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x02aa << o),
URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o),
0x00550055);
URJ_BUS_WRITE (bus, adr, 0x00300030);
if (amdstatus (urj_flash_cfi_array, adr, 0xffff))
if (amdstatus (cfi_array, adr, 0xffff))
{
printf ("flash_erase_block 0x%08X DONE\n", adr);
amd_flash_read_array (urj_flash_cfi_array); /* AMD reset */
amd_flash_read_array (cfi_array); /* AMD reset */
return 0;
}
printf ("flash_erase_block 0x%08X FAILED\n", adr);
/* Read Array */
amd_flash_read_array (urj_flash_cfi_array); /* AMD reset */
amd_flash_read_array (cfi_array); /* AMD reset */
return URJ_FLASH_ERROR_UNKNOWN;
}
static int
amd_flash_unlock_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_flash_unlock_block (urj_flash_cfi_array_t *cfi_array,
uint32_t adr)
{
printf ("flash_unlock_block 0x%08X IGNORE\n", adr);
@ -449,37 +443,37 @@ amd_flash_unlock_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
amd_flash_program_single (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_flash_program_single (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t data)
{
int status;
urj_bus_t *bus = urj_flash_cfi_array->bus;
int o = amd_flash_address_shift (urj_flash_cfi_array);
urj_bus_t *bus = cfi_array->bus;
int o = amd_flash_address_shift (cfi_array);
if (dbg)
printf ("\nflash_program 0x%08X = 0x%08X\n", adr, data);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, program */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x02aa << o),
URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, program */
URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o),
0x00550055);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0555 << o),
URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o),
0x00A000A0);
URJ_BUS_WRITE (bus, adr, data);
status = amdstatus (urj_flash_cfi_array, adr, data);
status = amdstatus (cfi_array, adr, data);
/* amd_flash_read_array(ps); */
return !status;
}
static int
amd_program_buffer_status (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_program_buffer_status (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t data)
{
/* NOTE: Status polling according to [3], Figure 1.
The current method for status polling is not compatible with 32 bit (2x16) configurations
since it only checks the DQ7 bit of the lower chip. */
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
int timeout;
const uint32_t dq7mask = (1 << 7);
const uint32_t dq5mask = (1 << 5);
@ -508,14 +502,14 @@ amd_program_buffer_status (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
amd_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_flash_program_buffer (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count)
{
/* NOTE: Write buffer programming operation according to [3], Figure 1. */
int status;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_flash_cfi_chip_t *cfi_chip = urj_flash_cfi_array->cfi_chips[0];
int o = amd_flash_address_shift (urj_flash_cfi_array);
urj_bus_t *bus = cfi_array->bus;
urj_flash_cfi_chip_t *cfi_chip = cfi_array->cfi_chips[0];
int o = amd_flash_address_shift (cfi_array);
int wb_bytes = cfi_chip->cfi.device_geometry.max_bytes_write;
int chip_width = cfi_chip->width;
int offset = 0;
@ -534,10 +528,8 @@ amd_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
if (wcount > count)
wcount = count;
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x0555 << o),
0x00aa00aa);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0x02aa << o),
0x00550055);
URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa);
URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o), 0x00550055);
URJ_BUS_WRITE (bus, adr, 0x00250025);
URJ_BUS_WRITE (bus, sa, wcount - 1);
@ -545,7 +537,7 @@ amd_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
for (idx = 0; idx < wcount; idx++)
{
URJ_BUS_WRITE (bus, adr, buffer[offset + idx]);
adr += urj_flash_cfi_array->bus_width;
adr += cfi_array->bus_width;
}
offset += wcount;
@ -553,8 +545,7 @@ amd_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
URJ_BUS_WRITE (bus, sa, 0x00290029);
status =
amd_program_buffer_status (urj_flash_cfi_array,
adr - urj_flash_cfi_array->bus_width,
amd_program_buffer_status (cfi_array, adr - cfi_array->bus_width,
buffer[offset - 1]);
/* amd_flash_read_array(ps); */
if (status != 1)
@ -567,11 +558,10 @@ amd_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
amd_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr,
amd_flash_program (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
uint32_t *buffer, int count)
{
urj_flash_cfi_query_structure_t *cfi =
&(urj_flash_cfi_array->cfi_chips[0]->cfi);
urj_flash_cfi_query_structure_t *cfi = &(cfi_array->cfi_chips[0]->cfi);
int max_bytes_write = cfi->device_geometry.max_bytes_write;
#ifndef FLASH_MULTI_BYTE
@ -580,8 +570,7 @@ amd_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr,
/* multi-byte writes supported? */
if (max_bytes_write > 1)
return amd_flash_program_buffer (urj_flash_cfi_array, adr, buffer,
count);
return amd_flash_program_buffer (cfi_array, adr, buffer, count);
else
{
@ -590,11 +579,10 @@ amd_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr,
for (idx = 0; idx < count; idx++)
{
int status = amd_flash_program_single (urj_flash_cfi_array, adr,
buffer[idx]);
int status = amd_flash_program_single (cfi_array, adr, buffer[idx]);
if (status)
return status;
adr += urj_flash_cfi_array->bus_width;
adr += cfi_array->bus_width;
}
}
@ -602,7 +590,7 @@ amd_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array, uint32_t adr,
}
static int
amd_flash_program32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_flash_program32 (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count)
{
/* Single byte programming is forced for 32 bit (2x16) flash configuration.
@ -616,20 +604,20 @@ amd_flash_program32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
for (idx = 0; idx < count; idx++)
{
int status =
amd_flash_program_single (urj_flash_cfi_array, adr, buffer[idx]);
amd_flash_program_single (cfi_array, adr, buffer[idx]);
if (status)
return status;
adr += urj_flash_cfi_array->bus_width;
adr += cfi_array->bus_width;
}
return 0;
}
static void
amd_flash_read_array (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_flash_read_array (urj_flash_cfi_array_t *cfi_array)
{
/* Read Array */
URJ_BUS_WRITE (urj_flash_cfi_array->bus, urj_flash_cfi_array->address, 0x00F000F0); /* AMD reset */
URJ_BUS_WRITE (cfi_array->bus, cfi_array->address, 0x00F000F0); /* AMD reset */
}
urj_flash_driver_t urj_flash_amd_32_flash_driver = {

@ -40,6 +40,8 @@
#include <flash.h>
#include <bus.h>
#include "jedec.h"
//write specific
#define AMD_SECTOR_PROTECTED
@ -74,40 +76,21 @@ static struct
}
var_forced_detection;
int urj_flash_amd_detect (urj_bus_t *bus, uint32_t adr,
urj_flash_cfi_array_t **urj_flash_cfi_array);
static int amd_29xx040_autodetect (urj_flash_cfi_array_t
*urj_flash_cfi_array);
static int amd_29xx040_status (urj_bus_t *bus, uint32_t adr,
unsigned short data);
static void amd_29xx040_print_info (urj_flash_cfi_array_t
*urj_flash_cfi_array);
static void amd_29xx040_read_array (urj_flash_cfi_array_t
*urj_flash_cfi_array);
static int amd_29xx040_erase_block (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr);
static int amd_29xx040_program_single (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr,
uint32_t data);
static int amd_29xx040_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
uint32_t adr, uint32_t *buffer, int count);
static int amd_29xx040_unlock_block (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr);
int
urj_flash_amd_detect (urj_bus_t *bus, uint32_t adr,
urj_flash_cfi_array_t **urj_flash_cfi_array)
urj_flash_cfi_array_t **cfi_array)
{
int mid;
int did;
urj_bus_area_t area;
urj_flash_cfi_query_structure_t *cfi;
if (!urj_flash_cfi_array || !bus)
if (!cfi_array || !bus)
return -1; /* invalid parameters */
*urj_flash_cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
if (!*urj_flash_cfi_array)
*cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
if (!*cfi_array)
return -2; /* out of memory */
URJ_BUS_WRITE (bus, adr + 0x0, 0xf0);
@ -135,27 +118,27 @@ urj_flash_amd_detect (urj_bus_t *bus, uint32_t adr,
break;
}
(*urj_flash_cfi_array)->bus = bus;
(*urj_flash_cfi_array)->address = 0;
(*cfi_array)->bus = bus;
(*cfi_array)->address = 0;
if (URJ_BUS_AREA (bus, adr + 0, &area) != URJ_STATUS_OK)
return -8; /* bus width detection failed */
unsigned int bw = area.width;
int ba, i;
if (bw != 8 && bw != 16 && bw != 32)
return -3; /* invalid bus width */
(*urj_flash_cfi_array)->bus_width = ba = bw / 8;
(*urj_flash_cfi_array)->cfi_chips =
(*cfi_array)->bus_width = ba = bw / 8;
(*cfi_array)->cfi_chips =
calloc (ba, sizeof (urj_flash_cfi_chip_t *));
if (!(*urj_flash_cfi_array)->cfi_chips)
if (!(*cfi_array)->cfi_chips)
return -2;
for (i = 0; i < ba; i++)
{
(*urj_flash_cfi_array)->cfi_chips[i] =
(*cfi_array)->cfi_chips[i] =
calloc (1, sizeof (urj_flash_cfi_chip_t));
if (!(*urj_flash_cfi_array)->cfi_chips[i])
if (!(*cfi_array)->cfi_chips[i])
return -2; /* out of memory */
(*urj_flash_cfi_array)->cfi_chips[i]->width = 1; //ba;
cfi = &(*urj_flash_cfi_array)->cfi_chips[i]->cfi;
(*cfi_array)->cfi_chips[i]->width = 1; //ba;
cfi = &(*cfi_array)->cfi_chips[i]->cfi;
cfi->identification_string.pri_id_code = CFI_VENDOR_NULL;
cfi->identification_string.pri_vendor_tbl = NULL;
@ -183,7 +166,7 @@ urj_flash_amd_detect (urj_bus_t *bus, uint32_t adr,
static int
amd_29xx040_autodetect (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_29xx040_autodetect (urj_flash_cfi_array_t *cfi_array)
{
return (var_forced_detection.flash == AMD_29xx040B); //Non-CFI Am29xx040B flash
}
@ -226,23 +209,23 @@ amd_29xx040_status (urj_bus_t *bus, uint32_t adr, unsigned short data)
static void
amd_29xx040_print_info (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_29xx040_print_info (urj_flash_cfi_array_t *cfi_array)
{
int mid, did, prot;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x0, 0xf0);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x2AA, 0x55);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0x90);
mid = URJ_BUS_READ (bus, urj_flash_cfi_array->address + 0x0);
did = URJ_BUS_READ (bus, urj_flash_cfi_array->address + 0x1);
prot = URJ_BUS_READ (bus, urj_flash_cfi_array->address + 0x2);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x0, 0xf0);
URJ_BUS_WRITE (bus, cfi_array->address + 0x0, 0xf0);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0x90);
mid = URJ_BUS_READ (bus, cfi_array->address + 0x0);
did = URJ_BUS_READ (bus, cfi_array->address + 0x1);
prot = URJ_BUS_READ (bus, cfi_array->address + 0x2);
URJ_BUS_WRITE (bus, cfi_array->address + 0x0, 0xf0);
printf ("%s: mid %x, did %x\n", __FUNCTION__, mid, did);
// amd_29xx040_read_array( urj_flash_cfi_array ); /* AMD reset */
// amd_29xx040_read_array( cfi_array ); /* AMD reset */
switch (mid)
{
@ -272,29 +255,29 @@ amd_29xx040_print_info (urj_flash_cfi_array_t *urj_flash_cfi_array)
}
static void
amd_29xx040_read_array (urj_flash_cfi_array_t *urj_flash_cfi_array)
amd_29xx040_read_array (urj_flash_cfi_array_t *cfi_array)
{
/* Read Array */
if (var_forced_detection.unlock_bypass == AMD_BYPASS_UNLOCK_MODE)
{
/* @@@@ RFHH: changed this without understanding */
URJ_BUS_WRITE (urj_flash_cfi_array->bus,
urj_flash_cfi_array->address + 0x555, 0x90);
URJ_BUS_WRITE (urj_flash_cfi_array->bus,
urj_flash_cfi_array->address + 0x2AA, 0x00);
URJ_BUS_WRITE (cfi_array->bus,
cfi_array->address + 0x555, 0x90);
URJ_BUS_WRITE (cfi_array->bus,
cfi_array->address + 0x2AA, 0x00);
usleep (100);
var_forced_detection.unlock_bypass = AMD_STANDARD_MODE;
}
URJ_BUS_WRITE (urj_flash_cfi_array->bus, urj_flash_cfi_array->address + 0x0, 0x0F0); /* AMD reset */
URJ_BUS_WRITE (cfi_array->bus, cfi_array->address + 0x0, 0x0F0); /* AMD reset */
}
static int
amd_29xx040_erase_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_29xx040_erase_block (urj_flash_cfi_array_t *cfi_array,
uint32_t adr)
{
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
printf ("flash_erase_block 0x%08X\n", adr);
@ -302,41 +285,41 @@ amd_29xx040_erase_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
if (var_forced_detection.unlock_bypass == AMD_BYPASS_UNLOCK_MODE)
{
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0x90);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x2AA, 0x00);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0x90);
URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x00);
usleep (100);
var_forced_detection.unlock_bypass = AMD_STANDARD_MODE;
}
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x0, 0xf0);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x2AA, 0x55);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0x80);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x2AA, 0x55);
// URJ_BUS_WRITE( bus, urj_flash_cfi_array->address + 0x555, 0x10 ); //Chip Erase
URJ_BUS_WRITE (bus, cfi_array->address + 0x0, 0xf0);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0x80);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
// URJ_BUS_WRITE( bus, cfi_array->address + 0x555, 0x10 ); //Chip Erase
URJ_BUS_WRITE (bus, adr, 0x30); //Sector erase
if (amd_29xx040_status (bus, adr, 0xff))
{
printf ("flash_erase_block 0x%08X DONE\n", adr);
amd_29xx040_read_array (urj_flash_cfi_array); /* AMD reset */
amd_29xx040_read_array (cfi_array); /* AMD reset */
return ERASE_FLASH_SUCCESS;
}
printf ("flash_erase_block 0x%08X FAILED\n", adr);
/* Read Array */
amd_29xx040_read_array (urj_flash_cfi_array); /* AMD reset */
amd_29xx040_read_array (cfi_array); /* AMD reset */
return FLASH_ERASE_ERROR;
}
static int
amd_29xx040_program_single (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_29xx040_program_single (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t data)
{
int status;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
if (0)
printf ("\nflash_program 0x%08X = 0x%08X\n", adr, data);
@ -344,29 +327,29 @@ amd_29xx040_program_single (urj_flash_cfi_array_t *urj_flash_cfi_array,
{
if (var_forced_detection.unlock_bypass != AMD_BYPASS_UNLOCK_MODE)
{
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x2AA, 0x55);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0x20);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0x20);
usleep (1000);
var_forced_detection.unlock_bypass = AMD_BYPASS_UNLOCK_MODE;
}
}
else
{
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x2AA, 0x55);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
}
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + 0x555, 0xA0);
URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xA0);
URJ_BUS_WRITE (bus, adr, data);
status = amd_29xx040_status (bus, adr, data);
/* amd_29xx040_read_array(urj_flash_cfi_array); */
/* amd_29xx040_read_array(cfi_array); */
return !status;
}
static int
amd_29xx040_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_29xx040_program (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count)
{
int idx;
@ -374,18 +357,18 @@ amd_29xx040_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
/* unroll buffer to single writes */
for (idx = 0; idx < count; idx++)
{
int status = amd_29xx040_program_single (urj_flash_cfi_array, adr,
int status = amd_29xx040_program_single (cfi_array, adr,
buffer[idx]);
if (status)
return status;
adr += urj_flash_cfi_array->bus_width;
adr += cfi_array->bus_width;
}
return 0;
}
static int
amd_29xx040_unlock_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
amd_29xx040_unlock_block (urj_flash_cfi_array_t *cfi_array,
uint32_t adr)
{
printf ("flash_unlock_block 0x%08X IGNORE\n", adr);

@ -39,37 +39,37 @@
#include <bus.h>
void
urj_flash_cfi_array_free (urj_flash_cfi_array_t *urj_flash_cfi_array)
urj_flash_cfi_array_free (urj_flash_cfi_array_t *cfi_array)
{
if (!urj_flash_cfi_array)
if (!cfi_array)
return;
if (urj_flash_cfi_array->cfi_chips)
if (cfi_array->cfi_chips)
{
int i;
for (i = 0; i < urj_flash_cfi_array->bus_width; i++)
for (i = 0; i < cfi_array->bus_width; i++)
{
if (!urj_flash_cfi_array->cfi_chips[i])
if (!cfi_array->cfi_chips[i])
continue;
free (urj_flash_cfi_array->cfi_chips[i]->cfi.device_geometry.
free (cfi_array->cfi_chips[i]->cfi.device_geometry.
erase_block_regions);
if (urj_flash_cfi_array->cfi_chips[i]->cfi.identification_string.
if (cfi_array->cfi_chips[i]->cfi.identification_string.
pri_vendor_tbl)
free (urj_flash_cfi_array->cfi_chips[i]->cfi.
free (cfi_array->cfi_chips[i]->cfi.
identification_string.pri_vendor_tbl);
free (urj_flash_cfi_array->cfi_chips[i]);
free (cfi_array->cfi_chips[i]);
}
free (urj_flash_cfi_array->cfi_chips);
free (cfi_array->cfi_chips);
}
free (urj_flash_cfi_array);
free (cfi_array);
}
int
urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr,
urj_flash_cfi_array_t **urj_flash_cfi_array)
urj_flash_cfi_array_t **cfi_array)
{
unsigned int bw; /* bus width */
unsigned int d; /* data offset */
@ -77,24 +77,24 @@ urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr,
int ma; /* flash mode address multiplier */
urj_bus_area_t area;
if (!urj_flash_cfi_array || !bus)
if (!cfi_array || !bus)
return -1; /* invalid parameters */
*urj_flash_cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
if (!*urj_flash_cfi_array)
*cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
if (!*cfi_array)
return -2; /* out of memory */
(*urj_flash_cfi_array)->bus = bus;
(*urj_flash_cfi_array)->address = adr;
(*cfi_array)->bus = bus;
(*cfi_array)->address = adr;
if (URJ_BUS_AREA (bus, adr, &area) != URJ_STATUS_OK)
return -8; /* bus width detection failed */
bw = area.width;
if (bw != 8 && bw != 16 && bw != 32)
return -3; /* invalid bus width */
(*urj_flash_cfi_array)->bus_width = ba = bw / 8;
(*urj_flash_cfi_array)->cfi_chips =
(*cfi_array)->bus_width = ba = bw / 8;
(*cfi_array)->cfi_chips =
calloc (ba, sizeof (urj_flash_cfi_chip_t *));
if (!(*urj_flash_cfi_array)->cfi_chips)
if (!(*cfi_array)->cfi_chips)
return -2; /* out of memory */
for (d = 0; d < bw; d += 8)
@ -135,14 +135,14 @@ urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr,
return -6; /* CFI not detected (Y) */
}
(*urj_flash_cfi_array)->cfi_chips[d / 8] =
(*cfi_array)->cfi_chips[d / 8] =
calloc (1, sizeof (urj_flash_cfi_chip_t));
if (!(*urj_flash_cfi_array)->cfi_chips[d / 8])
if (!(*cfi_array)->cfi_chips[d / 8])
{
write1 (0, CFI_CMD_READ_ARRAY1);
return -2; /* out of memory */
}
cfi = &(*urj_flash_cfi_array)->cfi_chips[d / 8]->cfi;
cfi = &(*cfi_array)->cfi_chips[d / 8]->cfi;
/* Identification string - see Table 6 in [1] */
cfi->identification_string.pri_id_code = read2 (PRI_VENDOR_ID_OFFSET);
@ -403,31 +403,31 @@ urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr,
case CFI_INTERFACE_X8:
if (ma != 1)
return -7; /* error in device detection */
(*urj_flash_cfi_array)->cfi_chips[d / 8]->width = 1;
(*cfi_array)->cfi_chips[d / 8]->width = 1;
break;
case CFI_INTERFACE_X16:
if (ma != 1)
return -7; /* error in device detection */
(*urj_flash_cfi_array)->cfi_chips[d / 8]->width = 2;
(*cfi_array)->cfi_chips[d / 8]->width = 2;
d += 8;
break;
case CFI_INTERFACE_X8_X16:
if (ma != 1 && ma != 2)
return -7; /* error in device detection */
(*urj_flash_cfi_array)->cfi_chips[d / 8]->width = 2 / ma;
(*cfi_array)->cfi_chips[d / 8]->width = 2 / ma;
if (ma == 1)
d += 8;
break;
case CFI_INTERFACE_X32:
if (ma != 1)
return -7; /* error in device detection */
(*urj_flash_cfi_array)->cfi_chips[d / 8]->width = 4;
(*cfi_array)->cfi_chips[d / 8]->width = 4;
d += 24;
break;
case CFI_INTERFACE_X16_X32:
if (ma != 1 && ma != 2)
return -7; /* error in device detection */
(*urj_flash_cfi_array)->cfi_chips[d / 8]->width = 4 / ma;
(*cfi_array)->cfi_chips[d / 8]->width = 4 / ma;
if (ma == 1)
d += 24;
else

@ -48,97 +48,92 @@
#include <flash.h>
#include <bus.h>
static int intel_flash_erase_block (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr);
static int intel_flash_unlock_block (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr);
static int intel_flash_program_single (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr,
uint32_t data);
static int intel_flash_program_buffer (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr,
uint32_t *buffer, int count);
static int intel_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
static int intel_flash_erase_block (urj_flash_cfi_array_t *cfi_array,
uint32_t adr);
static int intel_flash_unlock_block (urj_flash_cfi_array_t *cfi_array,
uint32_t adr);
static int intel_flash_program_single (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t data);
static int intel_flash_program_buffer (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer,
int count);
static int intel_flash_program (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count);
static int intel_flash_erase_block32 (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr);
static int intel_flash_unlock_block32 (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr);
static int intel_flash_program32_single (urj_flash_cfi_array_t
*urj_flash_cfi_array, uint32_t adr,
uint32_t data);
static int intel_flash_program32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
static int intel_flash_erase_block32 (urj_flash_cfi_array_t *cfi_array,
uint32_t adr);
static int intel_flash_unlock_block32 (urj_flash_cfi_array_t *cfi_array,
uint32_t adr);
static int intel_flash_program32_single (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t data);
static int intel_flash_program32 (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count);
/* autodetect, we can handle this chip */
static int
intel_flash_autodetect32 (urj_flash_cfi_array_t *urj_flash_cfi_array)
intel_flash_autodetect32 (urj_flash_cfi_array_t *cfi_array)
{
urj_bus_area_t area;
if (URJ_BUS_AREA
(urj_flash_cfi_array->bus, urj_flash_cfi_array->address,
&area) != URJ_STATUS_OK)
if (URJ_BUS_AREA (cfi_array->bus, cfi_array->address,
&area) != URJ_STATUS_OK)
return 0;
return ((urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
return ((cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_MITSUBISHI_SCS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_MITSUBISHI_ECS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_INTEL_ECS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_INTEL_SCS)) && (area.width == 32);
}
static int
intel_flash_autodetect (urj_flash_cfi_array_t *urj_flash_cfi_array)
intel_flash_autodetect (urj_flash_cfi_array_t *cfi_array)
{
urj_bus_area_t area;
if (URJ_BUS_AREA
(urj_flash_cfi_array->bus, urj_flash_cfi_array->address,
&area) != URJ_STATUS_OK)
if (URJ_BUS_AREA (cfi_array->bus, cfi_array->address,
&area) != URJ_STATUS_OK)
return 0;
return ((urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
return ((cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_MITSUBISHI_SCS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_MITSUBISHI_ECS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_INTEL_ECS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_INTEL_SCS)) && (area.width == 16);
}
static int
intel_flash_autodetect8 (urj_flash_cfi_array_t *urj_flash_cfi_array)
intel_flash_autodetect8 (urj_flash_cfi_array_t *cfi_array)
{
urj_bus_area_t area;
if (URJ_BUS_AREA
(urj_flash_cfi_array->bus, urj_flash_cfi_array->address,
&area) != URJ_STATUS_OK)
if (URJ_BUS_AREA (cfi_array->bus, cfi_array->address,
&area) != URJ_STATUS_OK)
return 0;
return ((urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
return ((cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_MITSUBISHI_SCS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_MITSUBISHI_ECS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_INTEL_ECS)
|| (urj_flash_cfi_array->cfi_chips[0]->cfi.identification_string.
|| (cfi_array->cfi_chips[0]->cfi.identification_string.
pri_id_code == CFI_VENDOR_INTEL_SCS)) && (area.width == 8);
}
static void
_intel_flash_print_info (urj_flash_cfi_array_t *urj_flash_cfi_array, int o)
_intel_flash_print_info (urj_flash_cfi_array_t *cfi_array, int o)
{
uint32_t mid, cid;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
mid =
(URJ_BUS_READ (bus, urj_flash_cfi_array->address + (0x00 << o)) &
(URJ_BUS_READ (bus, cfi_array->address + (0x00 << o)) &
0xFF);
switch (mid)
{
@ -158,7 +153,7 @@ _intel_flash_print_info (urj_flash_cfi_array_t *urj_flash_cfi_array, int o)
printf (_("Chip: "));
cid =
(URJ_BUS_READ (bus, urj_flash_cfi_array->address + (0x01 << o)) &
(URJ_BUS_READ (bus, cfi_array->address + (0x01 << o)) &
0xFFFF);
switch (cid)
{
@ -216,57 +211,56 @@ _intel_flash_print_info (urj_flash_cfi_array_t *urj_flash_cfi_array, int o)
}
/* Read Array */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0 << o), 0x00FF00FF);
URJ_BUS_WRITE (bus, cfi_array->address + (0 << o), 0x00FF00FF);
}
static void
intel_flash_print_info (urj_flash_cfi_array_t *urj_flash_cfi_array)
intel_flash_print_info (urj_flash_cfi_array_t *cfi_array)
{
int o = 1;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
/* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
/* TODO */
/* Clear Status Register */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0 << o), 0x0050);
URJ_BUS_WRITE (bus, cfi_array->address + (0 << o), 0x0050);
/* Read Identifier Command */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0 << 0), 0x0090);
URJ_BUS_WRITE (bus, cfi_array->address + (0 << 0), 0x0090);
_intel_flash_print_info (urj_flash_cfi_array, o);
_intel_flash_print_info (cfi_array, o);
}
static void
intel_flash_print_info32 (urj_flash_cfi_array_t *urj_flash_cfi_array)
intel_flash_print_info32 (urj_flash_cfi_array_t *cfi_array)
{
int o = 2;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
/* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
/* TODO */
/* Clear Status Register */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0 << o), 0x00500050);
URJ_BUS_WRITE (bus, cfi_array->address + (0 << o), 0x00500050);
/* Read Identifier Command */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address + (0 << 0), 0x00900090);
URJ_BUS_WRITE (bus, cfi_array->address + (0 << 0), 0x00900090);
_intel_flash_print_info (urj_flash_cfi_array, o);
_intel_flash_print_info (cfi_array, o);
}
static int
intel_flash_erase_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
uint32_t adr)
intel_flash_erase_block (urj_flash_cfi_array_t *cfi_array, uint32_t adr)
{
uint16_t sr;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address,
URJ_BUS_WRITE (bus, cfi_array->address,
CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_BLOCK_ERASE);
URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_CONFIRM);
while (!((sr = URJ_BUS_READ (bus, urj_flash_cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
switch (sr & ~CFI_INTEL_SR_READY)
{
@ -289,18 +283,17 @@ intel_flash_erase_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
intel_flash_unlock_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
uint32_t adr)
intel_flash_unlock_block (urj_flash_cfi_array_t *cfi_array, uint32_t adr)
{
uint16_t sr;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address,
URJ_BUS_WRITE (bus, cfi_array->address,
CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_LOCK_SETUP);
URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_UNLOCK_BLOCK);
while (!((sr = URJ_BUS_READ (bus, urj_flash_cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
if (sr != CFI_INTEL_SR_READY)
{
@ -312,18 +305,18 @@ intel_flash_unlock_block (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
intel_flash_program_single (urj_flash_cfi_array_t *urj_flash_cfi_array,
intel_flash_program_single (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t data)
{
uint16_t sr;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address,
URJ_BUS_WRITE (bus, cfi_array->address,
CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_PROGRAM1);
URJ_BUS_WRITE (bus, adr, data);
while (!((sr = URJ_BUS_READ (bus, urj_flash_cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
if (sr != CFI_INTEL_SR_READY)
{
@ -335,13 +328,13 @@ intel_flash_program_single (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
intel_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
intel_flash_program_buffer (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count)
{
/* NOTE: Write-to-buffer programming operation according to [5], Figure 9 */
uint16_t sr;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_flash_cfi_chip_t *cfi_chip = urj_flash_cfi_array->cfi_chips[0];
urj_bus_t *bus = cfi_array->bus;
urj_flash_cfi_chip_t *cfi_chip = cfi_array->cfi_chips[0];
int wb_bytes = cfi_chip->cfi.device_geometry.max_bytes_write;
int chip_width = cfi_chip->width;
int offset = 0;
@ -358,11 +351,11 @@ intel_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
wcount = count;
/* issue command WRITE_TO_BUFFER */
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address,
URJ_BUS_WRITE (bus, cfi_array->address,
CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_WRITE_TO_BUFFER);
/* poll XSR7 == 1 */
while (!((sr = URJ_BUS_READ (bus, urj_flash_cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
/* write count value (number of upcoming writes - 1) */
URJ_BUS_WRITE (bus, adr, wcount - 1);
@ -371,7 +364,7 @@ intel_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
for (idx = 0; idx < wcount; idx++)
{
URJ_BUS_WRITE (bus, adr, buffer[offset + idx]);
adr += urj_flash_cfi_array->bus_width;
adr += cfi_array->bus_width;
}
offset += wcount;
@ -382,7 +375,7 @@ intel_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
/* poll SR7 == 1 */
while (!((sr = URJ_BUS_READ (bus, urj_flash_cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
if (sr != CFI_INTEL_SR_READY)
{
printf (_("flash: unknown error while programming\n"));
@ -393,11 +386,10 @@ intel_flash_program_buffer (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
intel_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
intel_flash_program (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count)
{
urj_flash_cfi_query_structure_t *cfi =
&(urj_flash_cfi_array->cfi_chips[0]->cfi);
urj_flash_cfi_query_structure_t *cfi = &(cfi_array->cfi_chips[0]->cfi);
int max_bytes_write = cfi->device_geometry.max_bytes_write;
#ifndef FLASH_MULTI_BYTE
@ -406,8 +398,7 @@ intel_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
/* multi-byte writes supported? */
if (max_bytes_write > 1)
return intel_flash_program_buffer (urj_flash_cfi_array, adr, buffer,
count);
return intel_flash_program_buffer (cfi_array, adr, buffer, count);
else
{
@ -416,11 +407,11 @@ intel_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
for (idx = 0; idx < count; idx++)
{
int status = intel_flash_program_single (urj_flash_cfi_array, adr,
int status = intel_flash_program_single (cfi_array, adr,
buffer[idx]);
if (status)
return status;
adr += urj_flash_cfi_array->bus_width;
adr += cfi_array->bus_width;
}
}
@ -428,13 +419,12 @@ intel_flash_program (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
intel_flash_erase_block32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
uint32_t adr)
intel_flash_erase_block32 (urj_flash_cfi_array_t *cfi_array, uint32_t adr)
{
uint32_t sr;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address,
URJ_BUS_WRITE (bus, cfi_array->address,
(CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) |
CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
URJ_BUS_WRITE (bus, adr,
@ -443,7 +433,7 @@ intel_flash_erase_block32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
URJ_BUS_WRITE (bus, adr,
(CFI_INTEL_CMD_CONFIRM << 16) | CFI_INTEL_CMD_CONFIRM);
while (((sr = URJ_BUS_READ (bus, urj_flash_cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
while (((sr = URJ_BUS_READ (bus, cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY))
{
@ -455,13 +445,13 @@ intel_flash_erase_block32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
intel_flash_unlock_block32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
intel_flash_unlock_block32 (urj_flash_cfi_array_t *cfi_array,
uint32_t adr)
{
uint32_t sr;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address,
URJ_BUS_WRITE (bus, cfi_array->address,
(CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) |
CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
URJ_BUS_WRITE (bus, adr,
@ -471,7 +461,7 @@ intel_flash_unlock_block32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
(CFI_INTEL_CMD_UNLOCK_BLOCK << 16) |
CFI_INTEL_CMD_UNLOCK_BLOCK);
while (((sr = URJ_BUS_READ (bus, urj_flash_cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
while (((sr = URJ_BUS_READ (bus, cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY))
{
@ -483,20 +473,20 @@ intel_flash_unlock_block32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
intel_flash_program32_single (urj_flash_cfi_array_t *urj_flash_cfi_array,
intel_flash_program32_single (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t data)
{
uint32_t sr;
urj_bus_t *bus = urj_flash_cfi_array->bus;
urj_bus_t *bus = cfi_array->bus;
URJ_BUS_WRITE (bus, urj_flash_cfi_array->address,
URJ_BUS_WRITE (bus, cfi_array->address,
(CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) |
CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
URJ_BUS_WRITE (bus, adr,
(CFI_INTEL_CMD_PROGRAM1 << 16) | CFI_INTEL_CMD_PROGRAM1);
URJ_BUS_WRITE (bus, adr, data);
while (((sr = URJ_BUS_READ (bus, urj_flash_cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
while (((sr = URJ_BUS_READ (bus, cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY))
{
@ -508,7 +498,7 @@ intel_flash_program32_single (urj_flash_cfi_array_t *urj_flash_cfi_array,
}
static int
intel_flash_program32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
intel_flash_program32 (urj_flash_cfi_array_t *cfi_array,
uint32_t adr, uint32_t *buffer, int count)
{
/* Single byte programming is forced for 32 bit (2x16) flash configuration.
@ -520,30 +510,27 @@ intel_flash_program32 (urj_flash_cfi_array_t *urj_flash_cfi_array,
/* unroll buffer to single writes */
for (idx = 0; idx < count; idx++)
{
int status = intel_flash_program32_single (urj_flash_cfi_array, adr,
buffer[idx]);
int status = intel_flash_program32_single (cfi_array, adr, buffer[idx]);
if (status)
return status;
adr += urj_flash_cfi_array->bus_width;
adr += cfi_array->bus_width;
}
return 0;
}
static void
intel_flash_readarray32 (urj_flash_cfi_array_t *urj_flash_cfi_array)
intel_flash_readarray32 (urj_flash_cfi_array_t *cfi_array)
{
/* Read Array */
URJ_BUS_WRITE (urj_flash_cfi_array->bus, urj_flash_cfi_array->address,
0x00FF00FF);
URJ_BUS_WRITE (cfi_array->bus, cfi_array->address, 0x00FF00FF);
}
static void
intel_flash_readarray (urj_flash_cfi_array_t *urj_flash_cfi_array)
intel_flash_readarray (urj_flash_cfi_array_t *cfi_array)
{
/* Read Array */
URJ_BUS_WRITE (urj_flash_cfi_array->bus, urj_flash_cfi_array->address,
0x00FF00FF);
URJ_BUS_WRITE (cfi_array->bus, cfi_array->address, 0x00FF00FF);
}
urj_flash_driver_t urj_flash_intel_32_flash_driver = {

@ -709,7 +709,7 @@ static const struct amd_flash_info table[] = {
int
urj_flash_jedec_detect (urj_bus_t *bus, uint32_t adr,
urj_flash_cfi_array_t **urj_flash_cfi_array)
urj_flash_cfi_array_t **cfi_array)
{
/* Temporary containers for manufacturer and device id while
probing with different Autoselect methods. */
@ -720,27 +720,26 @@ urj_flash_jedec_detect (urj_bus_t *bus, uint32_t adr,
urj_flash_cfi_query_structure_t *cfi;
urj_bus_area_t area;
*urj_flash_cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
if (!*urj_flash_cfi_array)
*cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
if (!*cfi_array)
return -2; /* out of memory */
(*urj_flash_cfi_array)->bus = bus;
(*urj_flash_cfi_array)->address = adr;
(*cfi_array)->bus = bus;
(*cfi_array)->address = adr;
if (URJ_BUS_AREA (bus, adr, &area) != URJ_STATUS_OK)
return -8; /* bus width detection failed */
bw = area.width;
if (bw != 8 && bw != 16 && bw != 32)
return -3; /* invalid bus width */
(*urj_flash_cfi_array)->bus_width = ba = bw / 8;
(*cfi_array)->bus_width = ba = bw / 8;
(*urj_flash_cfi_array)->cfi_chips =
(*cfi_array)->cfi_chips =
calloc (1, sizeof (urj_flash_cfi_chip_t *) * ba);
if (!(*urj_flash_cfi_array)->cfi_chips)
if (!(*cfi_array)->cfi_chips)
return -2; /* out of memory */
(*urj_flash_cfi_array)->cfi_chips[0] =
calloc (1, sizeof (urj_flash_cfi_chip_t));
if (!(*urj_flash_cfi_array)->cfi_chips[0])
(*cfi_array)->cfi_chips[0] = calloc (1, sizeof (urj_flash_cfi_chip_t));
if (!(*cfi_array)->cfi_chips[0])
return -2; /* out of memory */
/* probe device with Autoselect method 1 */
@ -777,7 +776,7 @@ urj_flash_jedec_detect (urj_bus_t *bus, uint32_t adr,
if (i == sizeof (table) / sizeof (struct amd_flash_info))
return -4;
cfi = &(*urj_flash_cfi_array)->cfi_chips[0]->cfi;
cfi = &(*cfi_array)->cfi_chips[0]->cfi;
cfi->identification_string.pri_id_code = CFI_VENDOR_AMD_SCS;
cfi->identification_string.pri_vendor_tbl = NULL;
@ -790,26 +789,26 @@ urj_flash_jedec_detect (urj_bus_t *bus, uint32_t adr,
switch (table[i].interface_width)
{
case CFI_INTERFACE_X8:
(*urj_flash_cfi_array)->cfi_chips[0]->width = 1;
(*cfi_array)->cfi_chips[0]->width = 1;
break;
case CFI_INTERFACE_X16:
(*urj_flash_cfi_array)->cfi_chips[0]->width = 2;
(*cfi_array)->cfi_chips[0]->width = 2;
break;
case CFI_INTERFACE_X8_X16:
fprintf (stderr,
"Warning: Unsupported interface geometry %s, falling back to %s\n",
"CFI_INTERFACE_X8_X16", "CFI_INTERFACE_X16");
(*urj_flash_cfi_array)->cfi_chips[0]->width = 2;
(*cfi_array)->cfi_chips[0]->width = 2;
cfi->device_geometry.device_interface = CFI_INTERFACE_X16;
break;
case CFI_INTERFACE_X32:
(*urj_flash_cfi_array)->cfi_chips[0]->width = 4;
(*cfi_array)->cfi_chips[0]->width = 4;
break;
case CFI_INTERFACE_X16_X32:
fprintf (stderr,
"Warning: Unsupported interface geometry %s, falling back to %s\n",
"CFI_INTERFACE_X16_X32", "CFI_INTERFACE_X32");
(*urj_flash_cfi_array)->cfi_chips[0]->width = 4;
(*cfi_array)->cfi_chips[0]->width = 4;
cfi->device_geometry.device_interface = CFI_INTERFACE_X32;
break;
default:
@ -817,7 +816,7 @@ urj_flash_jedec_detect (urj_bus_t *bus, uint32_t adr,
fprintf (stderr,
"Error: Unsupported interface geometry %d, bailing out\n",
table[i].interface_width);
(*urj_flash_cfi_array)->cfi_chips[0]->width = 1;
(*cfi_array)->cfi_chips[0]->width = 1;
cfi->device_geometry.device_interface = CFI_INTERFACE_X8;
return -5;
break;

@ -61,7 +61,7 @@ urj_flash_jedec_exp_read_id (urj_bus_t *bus, uint32_t adr, uint32_t dmask,
int
urj_flash_jedec_exp_detect (urj_bus_t *bus, uint32_t adr,
urj_flash_cfi_array_t **urj_flash_cfi_array)
urj_flash_cfi_array_t **cfi_array)
{
/* Temporary containers for manufacturer and device id while
probing with different Autoselect methods. */
@ -69,12 +69,12 @@ urj_flash_jedec_exp_detect (urj_bus_t *bus, uint32_t adr,
int det_buswidth;
urj_bus_area_t area;
*urj_flash_cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
if (!*urj_flash_cfi_array)
*cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
if (!*cfi_array)
return -2; /* out of memory */
(*urj_flash_cfi_array)->bus = bus;
(*urj_flash_cfi_array)->address = adr;
(*cfi_array)->bus = bus;
(*cfi_array)->address = adr;
if (URJ_BUS_AREA (bus, adr, &area) != URJ_STATUS_OK)
return -8; /* bus width detection failed */
bw = area.width;
@ -84,16 +84,16 @@ urj_flash_jedec_exp_detect (urj_bus_t *bus, uint32_t adr,
if (bw != 8 && bw != 16 && bw != 32)
return -3; /* invalid bus width */
(*urj_flash_cfi_array)->bus_width = ba = bw / 8;
(*cfi_array)->bus_width = ba = bw / 8;
(*urj_flash_cfi_array)->cfi_chips =
(*cfi_array)->cfi_chips =
calloc (1, sizeof (urj_flash_cfi_chip_t *));
if (!(*urj_flash_cfi_array)->cfi_chips)
if (!(*cfi_array)->cfi_chips)
return -2; /* out of memory */
(*urj_flash_cfi_array)->cfi_chips[0] =
(*cfi_array)->cfi_chips[0] =
calloc (1, sizeof (urj_flash_cfi_chip_t));
if (!(*urj_flash_cfi_array)->cfi_chips[0])
if (!(*cfi_array)->cfi_chips[0])
return -2; /* out of memory */
printf

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