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@ -168,24 +168,24 @@ typedef volatile struct UART_registers {
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#define IER_TIE bit(1)
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#define IER_RAVIE bit(0)
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/* IIR bits */
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/* IIR bits - see Table 10-9 in [1] */
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#define IIR_FIFOES_MASK 0xC0
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#define IIR_FIFOES(x) ((x << 6) & IIR_FIFOES_MASK)
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#define IIR_FIFOES_MASK bits(7,6)
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#define IIR_FIFOES(x) bits_val(7,6,x)
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#define IIR_TOD bit(3)
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#define IIR_IID_MASK 0x06
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#define IIR_IID(x) ((x << 1) & IIR_IID_MASK)
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#define IIR_IID_MASK bits(2,1)
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#define IIR_IID(x) bits_val(2,1,x)
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#define IIR_IP bit(0)
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/* FCR bits */
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/* FCR bits - see Table 10-11 in [1] */
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#define FCR_ITL_MASK 0xC0
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#define FCR_ITL(x) ((x << 6) & FCR_ITL_MASK)
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#define FCR_ITL_MASK bits(7,6)
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#define FCR_ITL(x) bits_val(7,6,x)
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#define FCR_RESETTF bit(2)
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#define FCR_RESETRF bit(1)
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#define FCR_TRFIFOE bit(0)
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/* LCR bits */
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/* LCR bits - see Table 10-12 in [1] */
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#define LCR_DLAB bit(7)
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#define LCR_SB bit(6)
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@ -193,8 +193,8 @@ typedef volatile struct UART_registers {
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#define LCR_EPS bit(4)
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#define LCR_PEN bit(3)
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#define LCR_STB bit(2)
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#define LCR_WLS_MASK 0x03
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#define LCR_WLS(x) (x & LCR_WLS_MASK)
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#define LCR_WLS_MASK bits(1,0)
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#define LCR_WLS(x) bits_val(1,0,x)
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/* LSR bits */
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@ -226,10 +226,10 @@ typedef volatile struct UART_registers {
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#define MSR_DDSR bit(1)
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#define MSR_DCTS bit(0)
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/* SPR bits */
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/* SPR bits - see Table 10-16 in [1] */
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#define SPR_SP_MASK 0xFF
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#define SPR_SP(x) (x & SPR_SP_MASK)
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#define SPR_SP_MASK bits(7,0)
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#define SPR_SP(x) bits(7,0,x)
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/* ISR bits */
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