2002-11-02 Marcel Telka <marcel@telka.sk>

* arm/pxa2x0/*: Added _t suffix for register type names.
	* arm/sa11x0/*: Ditto.
	* device/flash/cfi.h: Removed _t suffix from structure names.


git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@251 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Marcel Telka 22 years ago
parent b3b1a3f48e
commit eb4ede2493

@ -1,3 +1,9 @@
2002-11-02 Marcel Telka <marcel@telka.sk>
* arm/pxa2x0/*: Added _t suffix for register type names.
* arm/sa11x0/*: Ditto.
* device/flash/cfi.h: Removed _t suffix from structure names.
2002-11-01 Marcel Telka <marcel@telka.sk>
Version 0.1 released.

@ -79,10 +79,10 @@ typedef volatile struct AC97_registers {
uint32_t __sacr[64]; /* Secondary Audio codec Registers */
uint32_t __pmcr[64]; /* Primary Modem codec Registers */
uint32_t __smcr[64]; /* Secondary Modem codec Registers */
} AC97_registers;
} AC97_registers_t;
#ifdef PXA2X0_UNMAPPED
#define AC97_pointer ((AC97_registers*) AC97_BASE)
#define AC97_pointer ((AC97_registers_t*) AC97_BASE)
#endif
#define POCR AC97_pointer->pocr

@ -54,10 +54,10 @@ typedef volatile struct CM_registers {
uint32_t cccr;
uint32_t cken;
uint32_t oscc;
} CM_registers;
} CM_registers_t;
#ifdef PXA2X0_UNMAPPED
#define CM_pointer ((CM_registers*) CM_BASE)
#define CM_pointer ((CM_registers_t*) CM_BASE)
#endif
#define CCCR CM_pointer->cccr

@ -55,7 +55,7 @@ typedef struct _DMA_dar {
uint32_t dsadr;
uint32_t dtadr;
uint32_t dcmd;
} _DMA_dar;
} _DMA_dar_t;
typedef volatile struct DMA_registers {
uint32_t dcsr[16];
@ -64,11 +64,11 @@ typedef volatile struct DMA_registers {
uint32_t __reserved2[3];
uint32_t drcmr[40];
uint32_t __reserved3[24];
_DMA_dar dar[16];
} DMA_registers;
_DMA_dar_t dar[16];
} DMA_registers_t;
#ifdef PXA2X0_UNMAPPED
#define DMA_pointer ((DMA_registers*) DMA_BASE)
#define DMA_pointer ((DMA_registers_t*) DMA_BASE)
#endif
#define DCSR(i) DMA_pointer->dcsr[i]

@ -78,10 +78,10 @@ typedef volatile struct GPIO_registers {
uint32_t gafr1_u;
uint32_t gafr2_l;
uint32_t gafr2_u;
} GPIO_registers;
} GPIO_registers_t;
#ifdef PXA2X0_UNMAPPED
#define GPIO_pointer ((GPIO_registers*) GPIO_BASE)
#define GPIO_pointer ((GPIO_registers_t*) GPIO_BASE)
#endif
#define GPLR0 GPIO_pointer->gplr0

@ -61,10 +61,10 @@ typedef volatile struct I2C_registers {
uint32_t isr;
uint32_t __reserved5;
uint32_t isar;
} I2C_registers;
} I2C_registers_t;
#ifdef PXA2X0_UNMAPPED
#define I2C_pointer ((I2C_registers*) I2C_BASE)
#define I2C_pointer ((I2C_registers_t*) I2C_BASE)
#endif
#define IBMR I2C_pointer->ibmr

@ -62,10 +62,10 @@ typedef volatile struct I2S_registers {
uint32_t sadiv;
uint32_t __reserved4[7];
uint32_t sadr;
} I2S_registers;
} I2S_registers_t;
#ifdef PXA2X0_UNMAPPED
#define I2S_pointer ((I2S_registers*) I2S_BASE)
#define I2S_pointer ((I2S_registers_t*) I2S_BASE)
#endif
#define SACR0 I2S_pointer->sacr0

@ -57,10 +57,10 @@ typedef volatile struct IC_registers {
uint32_t icfp;
uint32_t icpr;
uint32_t iccr;
} IC_registers;
} IC_registers_t;
#ifdef PXA2X0_UNMAPPED
#define IC_pointer ((IC_registers*) IC_BASE)
#define IC_pointer ((IC_registers_t*) IC_BASE)
#endif
#define ICIP IC_pointer->icip

@ -58,10 +58,10 @@ typedef volatile struct ICP_registers {
uint32_t __reserved;
uint32_t icsr0;
uint32_t icsr1;
} ICP_registers;
} ICP_registers_t;
#ifdef PXA2X0_UNMAPPED
#define ICP_pointer ((ICP_registers*) ICP_BASE)
#define ICP_pointer ((ICP_registers_t*) ICP_BASE)
#endif
#define ICCR0 ICP_pointer->iccr0

@ -69,10 +69,10 @@ typedef volatile struct LCD_registers {
uint32_t fsadr1;
uint32_t fidr1;
uint32_t ldcmd1;
} LCD_registers;
} LCD_registers_t;
#ifdef PXA2X0_UNMAPPED
#define LCD_pointer ((LCD_registers*) LCD_BASE)
#define LCD_pointer ((LCD_registers_t*) LCD_BASE)
#endif
#define LCCR(i) LCD_pointer->lccr[i]

@ -71,10 +71,10 @@ typedef volatile struct MC_registers {
uint32_t mcio1;
uint32_t mdmrs;
uint32_t boot_def;
} MC_registers;
} MC_registers_t;
#ifdef PXA2X0_UNMAPPED
#define MC_pointer ((MC_registers*) MC_BASE)
#define MC_pointer ((MC_registers_t*) MC_BASE)
#endif
#define MDCNFG MC_pointer->mdcnfg

@ -69,10 +69,10 @@ typedef volatile struct MMC_registers {
uint32_t mmc_res;
uint32_t mmc_rxfifo;
uint32_t mmc_txfifo;
} MMC_registers;
} MMC_registers_t;
#ifdef PXA2X0_UNMAPPED
#define MMC_pointer ((MMC_registers*) MMC_BASE)
#define MMC_pointer ((MMC_registers_t*) MMC_BASE)
#endif
#define MMC_STRPCL MMC_pointer->mmc_strpcl

@ -56,10 +56,10 @@ typedef volatile struct OST_registers {
uint32_t ossr;
uint32_t ower;
uint32_t oier;
} OST_registers;
} OST_registers_t;
#ifdef PXA2X0_UNMAPPED
#define OST_pointer ((OST_registers*) OST_BASE)
#define OST_pointer ((OST_registers_t*) OST_BASE)
#endif
#define OSMR(i) OST_pointer->osmr[i]

@ -64,10 +64,10 @@ typedef volatile struct PMRC_registers {
uint32_t pgsr2;
uint32_t __reserved;
uint32_t rcsr;
} PMRC_registers;
} PMRC_registers_t;
#ifdef PXA2X0_UNMAPPED
#define PMRC_pointer ((PMRC_registers*) PMRC_BASE)
#define PMRC_pointer ((PMRC_registers_t*) PMRC_BASE)
#endif
#define PMCR PMRC_pointer->pmcr

@ -55,11 +55,11 @@ typedef volatile struct PWM_registers {
uint32_t pwm_ctrl;
uint32_t pwm_pwduty;
uint32_t pwm_perval;
} PWM_registers;
} PWM_registers_t;
#ifdef PXA2X0_UNMAPPED
#define PWM0_pointer ((PWM_registers*) PWM0_BASE)
#define PWM1_pointer ((PWM_registers*) PWM1_BASE)
#define PWM0_pointer ((PWM_registers_t*) PWM0_BASE)
#define PWM1_pointer ((PWM_registers_t*) PWM1_BASE)
#endif
#define PWM_CTRL PWM_pointer->pwm_ctrl

@ -55,10 +55,10 @@ typedef volatile struct RTC_registers {
uint32_t rtar;
uint32_t rtsr;
uint32_t rttr;
} RTC_registers;
} RTC_registers_t;
#ifdef PXA2X0_UNMAPPED
#define RTC_pointer ((RTC_registers*) RTC_BASE)
#define RTC_pointer ((RTC_registers_t*) RTC_BASE)
#endif
#define RCNR RTC_pointer->rcnr

@ -57,10 +57,10 @@ typedef volatile struct SSP_registers {
uint32_t sssr;
uint32_t __reserved;
uint32_t ssdr;
} SSP_registers;
} SSP_registers_t;
#ifdef PXA2X0_UNMAPPED
#define SSP_pointer ((SSP_registers*) SSP_BASE)
#define SSP_pointer ((SSP_registers_t*) SSP_BASE)
#endif
#define SSCR0 SSP_pointer->sscr0

@ -72,12 +72,12 @@ typedef volatile struct UART_registers {
uint32_t msr;
uint32_t spr;
uint32_t isr;
} UART_registers;
} UART_registers_t;
#ifdef PXA2X0_UNMAPPED
#define FFUART_pointer ((UART_registers *) FFUART_BASE)
#define BTUART_pointer ((UART_registers *) BTUART_BASE)
#define STUART_pointer ((UART_registers *) STUART_BASE)
#define FFUART_pointer ((UART_registers_t*) FFUART_BASE)
#define BTUART_pointer ((UART_registers_t*) BTUART_BASE)
#define STUART_pointer ((UART_registers_t*) STUART_BASE)
#endif
#define RBR UART_pointer->rbr

@ -97,10 +97,10 @@ typedef volatile struct UDC_registers {
uint32_t uddr13;
uint32_t __reserved16[127];
uint32_t uddr14;
} UDC_registers;
} UDC_registers_t;
#ifdef PXA2X0_UNMAPPED
#define UDC_pointer ((UDC_registers*) UDC_BASE)
#define UDC_pointer ((UDC_registers_t*) UDC_BASE)
#endif
#define UDCCR UDC_pointer->udccr

@ -56,10 +56,10 @@ typedef volatile struct GPCLK_registers {
uint32_t __reserved;
uint32_t gpclkr2;
uint32_t gpclkr3;
} GPCLK_registers;
} GPCLK_registers_t;
#ifdef SA11X0_UNMAPPED
#define GPCLK_pointer ((GPCLK_registers*) GPCLK_BASE)
#define GPCLK_pointer ((GPCLK_registers_t*) GPCLK_BASE)
#endif
#define GPCLKR0 GPCLK_pointer->gpclkr0

@ -59,10 +59,10 @@ typedef volatile struct GPIO_registers {
uint32_t gfer;
uint32_t gedr;
uint32_t gafr;
} GPIO_registers;
} GPIO_registers_t;
#ifdef SA11X0_UNMAPPED
#define GPIO_pointer ((GPIO_registers*) GPIO_BASE)
#define GPIO_pointer ((GPIO_registers_t*) GPIO_BASE)
#endif
#define GPLR GPIO_pointer->gplr

@ -58,10 +58,10 @@ typedef volatile struct HSSP_registers {
uint32_t __reserved2;
uint32_t hssr0;
uint32_t hssr1;
} HSSP_registers;
} HSSP_registers_t;
#ifdef SA11X0_UNMAPPED
#define HSSP_pointer ((HSSP_registers*) HSSP_BASE)
#define HSSP_pointer ((HSSP_registers_t*) HSSP_BASE)
#endif
#define HSCR0 HSSP_pointer->hscr0

@ -58,10 +58,10 @@ typedef volatile struct IC_registers {
uint32_t icfp;
uint32_t __reserved[3];
uint32_t icpr;
} IC_registers;
} IC_registers_t;
#ifdef SA11X0_UNMAPPED
#define IC_pointer ((IC_registers*) IC_BASE)
#define IC_pointer ((IC_registers_t*) IC_BASE)
#endif
#define ICIP IC_pointer->icip

@ -61,10 +61,10 @@ typedef volatile struct LCD_registers {
uint32_t lccr1;
uint32_t lccr2;
uint32_t lccr3;
} LCD_registers;
} LCD_registers_t;
#ifdef SA11X0_UNMAPPED
#define LCD_pointer ((LCD_registers*) LCD_BASE)
#define LCD_pointer ((LCD_registers_t*) LCD_BASE)
#endif
#define LCCR0 LCD_pointer->lccr0

@ -64,10 +64,10 @@ typedef volatile struct MC_registers {
uint32_t mdcas22;
uint32_t msc2;
uint32_t smcnfg;
} MC_registers;
} MC_registers_t;
#ifdef SA11X0_UNMAPPED
#define MC_pointer ((MC_registers*) MC_BASE)
#define MC_pointer ((MC_registers_t*) MC_BASE)
#endif
#define MDCNFG MC_pointer->mdcnfg

@ -58,10 +58,10 @@ typedef volatile struct MCP_registers {
uint32_t mcdr2;
uint32_t __reserved2;
uint32_t mcsr;
} MCP_registers;
} MCP_registers_t;
#ifdef SA11X0_UNMAPPED
#define MCP_pointer ((MCP_registers*) MCP_BASE)
#define MCP_pointer ((MCP_registers_t*) MCP_BASE)
#endif
#define MCCR0 MCP_pointer->mccr0

@ -56,10 +56,10 @@ typedef volatile struct OST_registers {
uint32_t ossr;
uint32_t ower;
uint32_t oier;
} OST_registers;
} OST_registers_t;
#ifdef SA11X0_UNMAPPED
#define OST_pointer ((OST_registers*) OST_BASE)
#define OST_pointer ((OST_registers_t*) OST_BASE)
#endif
#define OSMR(i) OST_pointer->osmr[i]

@ -59,10 +59,10 @@ typedef volatile struct PM_registers {
uint32_t ppcr;
uint32_t pgsr;
uint32_t posr;
} PM_registers;
} PM_registers_t;
#ifdef SA11X0_UNMAPPED
#define PM_pointer ((PM_registers*) PM_BASE)
#define PM_pointer ((PM_registers_t*) PM_BASE)
#endif
#define PMCR PM_pointer->pmcr

@ -60,10 +60,10 @@ typedef volatile struct PPC_registers {
uint32_t hscr2;
uint32_t __reserved2;
uint32_t mccr1;
} PPC_registers;
} PPC_registers_t;
#ifdef SA11X0_UNMAPPED
#define PPC_pointer ((PPC_registers*) PPC_BASE)
#define PPC_pointer ((PPC_registers_t*) PPC_BASE)
#endif
#define PPDR PPC_pointer->ppdr

@ -54,10 +54,10 @@ typedef volatile struct RC_registers {
uint32_t rsrr;
uint32_t rcsr;
uint32_t tucr;
} RC_registers;
} RC_registers_t;
#ifdef SA11X0_UNMAPPED
#define RC_pointer ((RC_registers*) RC_BASE)
#define RC_pointer ((RC_registers_t*) RC_BASE)
#endif
#define RSRR RC_pointer->rsrr

@ -56,10 +56,10 @@ typedef volatile struct RTC_registers {
uint32_t rttr;
uint32_t __reserved;
uint32_t rtsr;
} RTC_registers;
} RTC_registers_t;
#ifdef SA11X0_UNMAPPED
#define RTC_pointer ((RTC_registers*) RTC_BASE)
#define RTC_pointer ((RTC_registers_t*) RTC_BASE)
#endif
#define RTAR RTC_pointer->rtar

@ -57,10 +57,10 @@ typedef volatile struct SSP_registers {
uint32_t ssdr;
uint32_t __reserved2;
uint32_t sssr;
} SSP_registers;
} SSP_registers_t;
#ifdef SA11X0_UNMAPPED
#define SSP_pointer ((SSP_registers*) SSP_BASE)
#define SSP_pointer ((SSP_registers_t*) SSP_BASE)
#endif
#define SSCR0 SSP_pointer->sscr0

@ -62,12 +62,12 @@ typedef volatile struct UART_registers {
uint32_t __reserved;
uint32_t utsr0;
uint32_t utsr1;
} UART_registers;
} UART_registers_t;
#ifdef SA11X0_UNMAPPED
#define UART1_pointer ((UART_registers*) UART1_BASE)
#define UART2_pointer ((UART_registers*) UART2_BASE)
#define UART3_pointer ((UART_registers*) UART3_BASE)
#define UART1_pointer ((UART_registers_t*) UART1_BASE)
#define UART2_pointer ((UART_registers_t*) UART2_BASE)
#define UART3_pointer ((UART_registers_t*) UART3_BASE)
#endif
#define UTCR0 UART_pointer->utcr0

@ -64,10 +64,10 @@ typedef volatile struct UDC_registers {
uint32_t udcdr;
uint32_t __reserved2;
uint32_t udcsr;
} UDC_registers;
} UDC_registers_t;
#ifdef SA11X0_UNMAPPED
#define UDC_pointer ((UDC_registers*) UDC_BASE)
#define UDC_pointer ((UDC_registers_t*) UDC_BASE)
#endif
#define UDCCR UDC_pointer->udccr

@ -63,7 +63,7 @@
#define ALT_VENDOR_TABLE_ADR_OFFSET 0x19
#if LANGUAGE == C
typedef struct cfi_query_identification_string_t {
typedef struct cfi_query_identification_string {
uint16_t pri_id_code;
void *pri_vendor_tbl;
uint16_t alt_id_code;
@ -98,7 +98,7 @@ typedef struct cfi_query_identification_string_t {
#define MAX_CHIP_ERASE_TIMEOUT_OFFSET 0x26 /* Maximum timeout for chip erase */
#if LANGUAGE == C
typedef struct cfi_query_system_interface_information_t {
typedef struct cfi_query_system_interface_information {
uint16_t vcc_min_wev; /* in mV */
uint16_t vcc_max_wev; /* in mV */
uint16_t vpp_min_wev; /* in mV, 0 - no Vpp pin is present */
@ -123,9 +123,9 @@ typedef struct cfi_query_system_interface_information_t {
#define ERASE_BLOCK_REGION_OFFSET 0x2D /* Erase Block Region Information */
#if LANGUAGE == C
typedef struct cfi_erase_block_region_t cfi_erase_block_region_t;
typedef struct cfi_erase_block_region cfi_erase_block_region_t;
typedef struct cfi_device_geometry_t {
typedef struct cfi_device_geometry {
uint32_t device_size; /* in B */
uint16_t device_interface; /* see Table 2 in [2] */
uint32_t max_bytes_write; /* in B */
@ -133,7 +133,7 @@ typedef struct cfi_device_geometry_t {
cfi_erase_block_region_t *erase_block_regions;
} cfi_device_geometry_t;
struct cfi_erase_block_region_t {
struct cfi_erase_block_region {
uint32_t erase_block_size; /* in B */
uint32_t number_of_erase_blocks;
};
@ -150,7 +150,7 @@ struct cfi_erase_block_region_t {
/* CFI Query structure - see 4.3.1 in [1] */
#if LANGUAGE == C
typedef struct cfi_query_structure_t {
typedef struct cfi_query_structure {
cfi_query_identification_string_t identification_string;
cfi_query_system_interface_information_t system_interface_info;
cfi_device_geometry_t device_geometry;

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