[ 1236272 ] Add support for Analog Devices Blackfin Processor: Blackfin.patch
git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@708 b68d4a1b-bc3d-0410-92ed-d4ac073336b7master
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#
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# $Id: PARTS,v 1.1.1.1 2005/03/18 15:02:50 klingler Exp $
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; either version 2
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# of the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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# 02111-1307, USA.
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#
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# Written by Richard Klingler <richard@klingler.net>
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#
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# bits 27-12 of the Device Identification Register
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0010011110100101 bf533 BF533
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#
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# $Id: STEPPINGS,v 1.3 2005/07/08 15:05:41 rgetz Exp $
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; either version 2
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# of the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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# 02111-1307, USA.
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#
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# Written by Richard Klingler <richard@klingler.net>
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#
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# bits 31-28 of the Device Identification Register
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0000 bf533 0
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0001 bf533 1
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0010 bf533 2
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0011 bf533 3
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signal ADDR[1]
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signal ADDR[2]
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signal ADDR[3]
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signal ADDR[4]
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signal ADDR[5]
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signal ADDR[6]
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signal ADDR[7]
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signal ADDR[8]
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signal ADDR[9]
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signal ADDR[10]
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signal ADDR[11]
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signal ADDR[12]
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signal ADDR[13]
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signal ADDR[14]
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signal ADDR[15]
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signal ADDR[16]
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signal ADDR[17]
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signal ADDR[18]
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signal ADDR[19]
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signal AMS_B0
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signal AMS_B1
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signal AMS_B2
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signal AMS_B3
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signal AOE_B
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signal ARDY
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signal ARE_B
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signal AWE_B
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signal ABE_B0
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signal ABE_B1
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signal BG_B
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signal BGH_B
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signal BMODE0
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signal BMODE1
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signal BR_B
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signal DATA[0]
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signal DATA[1]
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signal DATA[2]
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signal DATA[3]
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signal DATA[4]
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signal DATA[5]
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signal DATA[6]
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signal DATA[7]
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signal DATA[8]
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signal DATA[9]
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signal DATA[10]
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signal DATA[11]
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signal DATA[12]
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signal DATA[13]
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signal DATA[14]
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signal DATA[15]
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signal DR0PRI
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signal DR0SEC
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signal DR1PRI
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signal DR1SEC
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signal DT0PRI
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signal DT0SEC
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signal DT1PRI
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signal DT1SEC
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signal MISO
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signal MOSI
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signal NMI
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signal PF0
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signal PF1
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signal PF2
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signal PF3
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signal PF4
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signal PF5
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signal PF6
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signal PF7
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signal PF8
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signal PF9
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signal PF10
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signal PF11
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signal PF12
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signal PF13
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signal PF14
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signal PF15
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signal PP_CLK
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signal PP0
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signal PP1
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signal PP2
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signal PP3
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signal RESET_B
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signal RFS0
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signal RFS1
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signal RSCLK0
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signal RSCLK1
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signal TSCLK0
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signal TSCLK1
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signal CLKOUT
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signal RX
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signal TX
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signal SA10
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signal SCAS_B
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signal SCK
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signal SCKE
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signal SMS_B
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signal SRAS_B
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signal SWE_B
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signal TCK
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signal TDI
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signal TDO
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signal TMS
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signal TRST_B
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signal EMU_B
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signal TEST
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signal TFS0
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signal TFS1
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signal TMR0
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signal TMR1
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signal TMR2
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signal RTXI
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signal RTXO
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signal VDD_INT0
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signal VDD_INT1
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signal VDD_INT2
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signal VDD_INT3
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signal VDD_INT4
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signal VDD_INT5
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signal VDD_EXT0
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signal VDD_EXT1
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signal VDD_EXT2
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signal VDD_EXT3
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signal VDD_EXT4
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signal VDD_EXT5
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signal VDD_EXT6
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signal VDD_EXT7
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signal VDD_EXT8
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signal VDD_EXT9
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signal VDD_EXT10
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signal VDD_EXT11
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signal GND0
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signal GND1
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signal GND2
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signal GND3
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signal GND4
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signal GND5
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signal GND6
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signal GND7
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signal GND8
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signal GND9
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signal GND10
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signal GND11
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signal GND12
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signal GND13
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signal GND14
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signal GND15
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signal GND16
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signal GND17
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signal GND18
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signal GND19
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signal GND20
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signal GND21
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signal GND22
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signal GND23
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signal VDD_RTC
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signal CLKIN
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signal XTAL
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signal VROUT0
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register BSR 197
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register BR 1
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register DIR 32
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instruction length 5
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instruction EXTEST 00000 BSR
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instruction SAMPLE/PRELOAD 10000 BSR
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instruction IDCODE 00010 DIR
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instruction BYPASS 11111 BR
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bit 196 C 0 *
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bit 195 O 1 DATA[0] 196 0 Z
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bit 194 I 1 DATA[0]
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bit 193 O 1 DATA[1] 196 0 Z
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bit 192 I 1 DATA[1]
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bit 191 O 1 DATA[2] 196 0 Z
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bit 190 I 1 DATA[2]
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bit 189 O 1 DATA[3] 196 0 Z
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bit 188 I 1 DATA[3]
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bit 187 O 1 DATA[4] 196 0 Z
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bit 186 I 1 DATA[4]
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bit 185 O 1 DATA[5] 196 0 Z
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bit 184 I 1 DATA[5]
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bit 183 O 1 DATA[6] 196 0 Z
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bit 182 I 1 DATA[6]
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bit 181 O 1 DATA[7] 196 0 Z
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bit 180 I 1 DATA[7]
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bit 179 O 1 DATA[8] 196 0 Z
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bit 178 I 1 DATA[8]
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bit 177 O 1 DATA[9] 196 0 Z
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bit 176 I 1 DATA[9]
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bit 175 O 1 DATA[10] 196 0 Z
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bit 174 I 1 DATA[10]
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bit 173 O 1 DATA[11] 196 0 Z
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bit 172 I 1 DATA[11]
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bit 171 O 1 DATA[12] 196 0 Z
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bit 170 I 1 DATA[12]
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bit 169 O 1 DATA[13] 196 0 Z
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bit 168 I 1 DATA[13]
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bit 167 O 1 DATA[14] 196 0 Z
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bit 166 I 1 DATA[14]
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bit 165 O 1 DATA[15] 196 0 Z
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bit 164 I 1 DATA[15]
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bit 163 I 1 TEST
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bit 162 I 1 BMODE0
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bit 161 I 1 BMODE1
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bit 160 I 1 RX
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bit 159 O 1 TX
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bit 158 C 0 *
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bit 157 O 1 TMR0 158 0 Z
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bit 156 I 1 TMR0
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bit 155 C 0 *
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bit 154 O 1 TMR1 155 0 Z
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bit 153 I 1 TMR1
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bit 152 C 0 *
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bit 151 O 1 TMR2 152 0 Z
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bit 150 I 1 TMR2
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bit 149 C 0 *
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bit 148 O 1 RSCLK0 149 0 Z
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bit 147 I 1 RSCLK0
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bit 146 C 0 *
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bit 145 O 1 RFS0 146 0 Z
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bit 144 I 1 RFS0
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bit 143 I 1 DR0PRI
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bit 142 I 1 DR0SEC
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bit 141 C 0 *
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bit 140 O 1 TSCLK0 141 0 Z
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bit 139 I 1 TSCLK0
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bit 138 C 0 *
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bit 137 O 1 TFS0 138 0 Z
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bit 136 I 1 TFS0
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bit 135 C 0 *
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bit 134 O 1 DT0PRI 135 0 Z
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bit 133 C 0 *
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bit 132 O 1 DT0SEC 133 0 Z
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bit 131 C 0 *
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bit 130 O 1 RSCLK1 131 0 Z
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bit 129 I 1 RSCLK1
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bit 128 C 0 *
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bit 127 O 1 RFS1 128 0 Z
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bit 126 I 1 RFS1
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bit 125 I 1 DR1PRI
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bit 124 I 1 DR1SEC
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bit 123 C 0 *
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bit 122 O 1 TSCLK1 123 0 Z
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bit 121 I 1 TSCLK1
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bit 120 C 0 *
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bit 119 O 1 TFS1 120 0 Z
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bit 118 I 1 TFS1
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bit 117 C 0 *
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bit 116 O 1 DT1PRI 117 0 Z
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bit 115 C 0 *
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bit 114 O 1 DT1SEC 115 0 Z
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bit 113 C 0 *
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bit 112 O 1 MOSI 113 0 Z
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bit 111 I 1 MOSI
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bit 110 C 0 *
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bit 109 O 1 MISO 110 0 Z
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bit 108 I 1 MISO
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bit 107 C 0 *
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bit 106 O 1 SCK 107 0 Z
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bit 105 I 1 SCK
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bit 104 C 0 *
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bit 103 O 1 PF0 104 0 Z
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bit 102 I 1 PF0
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bit 101 C 0 *
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bit 100 O 1 PF1 101 0 Z
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bit 99 I 1 PF1
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bit 98 C 0 *
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bit 97 O 1 PF2 98 0 Z
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bit 96 I 1 PF2
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bit 95 C 0 *
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bit 94 O 1 PF3 95 0 Z
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bit 93 I 1 PF3
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bit 92 C 0 *
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bit 91 O 1 PF4 92 0 Z
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bit 90 I 1 PF4
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bit 89 C 0 *
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bit 88 O 1 PF5 89 0 Z
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bit 87 I 1 PF5
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bit 86 C 0 *
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bit 85 O 1 PF6 86 0 Z
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bit 84 I 1 PF6
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bit 83 C 0 *
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bit 82 O 1 PF7 83 0 Z
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bit 81 I 1 PF7
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bit 80 C 0 *
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bit 79 O 1 PF8 80 0 Z
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bit 78 I 1 PF8
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bit 77 C 0 *
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bit 76 O 1 PF9 77 0 Z
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bit 75 I 1 PF9
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bit 74 C 0 *
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bit 73 O 1 PF10 74 0 Z
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bit 72 I 1 PF10
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bit 71 C 0 *
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bit 70 O 1 PF11 71 0 Z
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bit 69 I 1 PF11
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bit 68 C 0 *
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bit 67 O 1 PF12 68 0 Z
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bit 66 I 1 PF12
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bit 65 C 0 *
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bit 64 O 1 PF13 65 0 Z
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bit 63 I 1 PF13
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bit 62 C 0 *
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bit 61 O 1 PF14 62 0 Z
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bit 60 I 1 PF14
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bit 59 C 0 *
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bit 58 O 1 PF15 59 0 Z
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bit 57 I 1 PF15
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bit 56 C 0 *
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bit 55 O 1 PP3 56 0 Z
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bit 54 I 1 PP3
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bit 53 C 0 *
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bit 52 O 1 PP2 53 0 Z
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bit 51 I 1 PP2
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bit 50 C 0 *
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bit 49 O 1 PP1 50 0 Z
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bit 48 I 1 PP1
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bit 47 C 0 *
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bit 46 O 1 PP0 47 0 Z
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bit 45 I 1 PP0
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bit 44 I 1 PP_CLK
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bit 43 I 1 NMI
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bit 42 I 1 RESET_B
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bit 41 O 1 SCKE 39 0 Z
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bit 40 O 1 SMS_B 39 0 Z
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bit 39 C 0 *
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bit 38 O 1 CLKOUT 39 0 Z
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bit 37 O 1 SRAS_B 39 0 Z
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bit 36 O 1 SCAS_B 39 0 Z
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bit 35 O 1 SWE_B 39 0 Z
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bit 34 O 1 SA10 39 0 Z
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bit 33 I 1 BR_B
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bit 32 I 1 ARDY
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bit 31 O 1 AMS_B0 27 0 Z
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bit 30 O 1 AMS_B1 27 0 Z
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bit 29 O 1 AMS_B2 27 0 Z
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bit 28 O 1 AMS_B3 27 0 Z
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bit 27 C 0 *
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bit 26 O 1 AOE_B 27 0 Z
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bit 25 O 1 ARE_B 27 0 Z
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bit 24 O 1 AWE_B 27 0 Z
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bit 23 O 1 ABE_B0 17 0 Z
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bit 22 O 1 ABE_B1 17 0 Z
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bit 21 O 1 ADDR[1] 17 0 Z
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bit 20 O 1 ADDR[2] 17 0 Z
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bit 19 O 1 ADDR[3] 17 0 Z
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bit 18 O 1 ADDR[4] 17 0 Z
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bit 17 C 0 *
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bit 16 O 1 ADDR[5] 17 0 Z
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bit 15 O 1 ADDR[6] 17 0 Z
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bit 14 O 1 ADDR[7] 17 0 Z
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bit 13 O 1 ADDR[8] 17 0 Z
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bit 12 O 1 ADDR[9] 17 0 Z
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bit 11 O 1 ADDR[10] 17 0 Z
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bit 10 O 1 ADDR[11] 17 0 Z
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bit 9 O 1 ADDR[12] 17 0 Z
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bit 8 O 1 ADDR[13] 17 0 Z
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bit 7 O 1 ADDR[14] 17 0 Z
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bit 6 O 1 ADDR[15] 17 0 Z
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bit 5 O 1 ADDR[16] 17 0 Z
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bit 4 O 1 ADDR[17] 17 0 Z
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bit 3 O 1 ADDR[18] 17 0 Z
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bit 2 O 1 ADDR[19] 17 0 Z
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bit 1 O 1 BGH_B
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bit 0 O 1 BG_B
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