diff --git a/urjtag/ChangeLog b/urjtag/ChangeLog index a61e57d4..ce732d7b 100644 --- a/urjtag/ChangeLog +++ b/urjtag/ChangeLog @@ -2,6 +2,16 @@ * acinclude.m4 (LT_INIT): Fix typo in fallback macro. + * src/bus/blackfin.c, src/bus/blackfin.h: New unified Blackfin bus core. + * src/bus/bf518f_ezbrd.c, src/bus/bf533_stamp.c, src/bus/bf537_stamp.c, + src/bus/bf548_ezkit.c, src/bus/bf561_ezkit.c: Convert to unified + Blackfin bus core. + * configure.ac, src/bus/buses_list.h, src/bus/Makefile.am: Drop board + specific bus options and have just one "blackfin" bus option since + all the buses on top of it are small shims now. + * data/analog/bf518/bf518, data/analog/bf548/bf548: Rename a few bus + signals to use the same style as all other buses. + 2010-10-26 Mike Frysinger * src/tap/cable_list.h, src/tap/cable/generic_usbconn_list.h, diff --git a/urjtag/configure.ac b/urjtag/configure.ac index d3f025b1..ed3a35a9 100644 --- a/urjtag/configure.ac +++ b/urjtag/configure.ac @@ -560,19 +560,7 @@ URJ_DRIVER_SET([bus], [ au1500 avr32 bcm1250 - bf518f_ezbrd - bf51x - bf526_ezkit - bf527_ezkit - bf52x - bf533_stamp - bf533_ezkit - bf537_stamp - bf537_ezkit - bf538f_ezkit - bf53x - bf548_ezkit - bf561_ezkit + blackfin bscoach ejtag ejtag_dma diff --git a/urjtag/data/analog/bf518/bf518 b/urjtag/data/analog/bf518/bf518 index 26f6cdcf..4d5dc164 100644 --- a/urjtag/data/analog/bf518/bf518 +++ b/urjtag/data/analog/bf518/bf518 @@ -18,6 +18,7 @@ signal PH2 signal PH7 signal PH3 signal PH4 +salias AOE_B PH4 signal PH5 signal PF10 signal PF11 @@ -77,22 +78,22 @@ signal ADDR6 signal TDO signal ADDR7 signal SA10 -signal SMS_n -signal AWE_n +signal SMS_B +signal AWE_B signal ADDR8 signal ADDR9 -signal ARE_n -signal SCAS_n +signal ARE_B +signal SCAS_B signal ABE_B0 signal ABE_B1 -signal SRAS_n +signal SRAS_B signal SCKE signal ADDR10 signal ADDR11 signal ADDR12 signal ADDR13 signal ADDR14 -signal SWE_n +signal SWE_B signal ADDR15 signal ADDR16 signal ADDR17 @@ -374,16 +375,16 @@ bit 29 I 1 RESET bit 28 C 0 * bit 27 O 1 CLKOUT 28 0 Z bit 26 O 1 AMS_B0 24 0 Z -bit 25 O 1 AWE_n 24 0 Z +bit 25 O 1 AWE_B 24 0 Z bit 24 C 0 * -bit 23 O 1 ARE_n 24 0 Z +bit 23 O 1 ARE_B 24 0 Z bit 22 O 1 AMS_B1 24 0 Z bit 21 O 1 SCKE 28 0 Z -bit 20 O 1 SMS_n 28 0 Z +bit 20 O 1 SMS_B 28 0 Z bit 19 I 1 TEST -bit 18 O 1 SRAS_n 28 0 Z -bit 17 O 1 SCAS_n 28 0 Z -bit 16 O 1 SWE_n 28 0 Z +bit 18 O 1 SRAS_B 28 0 Z +bit 17 O 1 SCAS_B 28 0 Z +bit 16 O 1 SWE_B 28 0 Z bit 15 O 1 SA10 28 0 Z bit 14 O 1 ABE_B0 7 0 Z bit 13 O 1 ABE_B1 7 0 Z diff --git a/urjtag/data/analog/bf548/bf548 b/urjtag/data/analog/bf548/bf548 index 91b528b0..56517ce3 100644 --- a/urjtag/data/analog/bf548/bf548 +++ b/urjtag/data/analog/bf548/bf548 @@ -216,11 +216,11 @@ signal DATA3 signal DATA2 signal DATA1 signal DATA0 -signal AWEB -signal AREB +signal AWE_B +signal ARE_B signal RESETB signal NMIB -signal AOEB +signal AOE_B signal AMS_B3 signal AMS_B2 signal AMS_B1 @@ -756,16 +756,16 @@ bit 327 C 0 * bit 326 O 1 AMS_B3 327 0 Z bit 325 I 1 AMS_B3 bit 324 C 0 * -bit 323 O 1 AOEB 324 0 Z -bit 322 I 1 AOEB +bit 323 O 1 AOE_B 324 0 Z +bit 322 I 1 AOE_B bit 321 I 1 NMIB bit 320 I 1 RESETB bit 319 C 0 * -bit 318 O 1 AREB 319 0 Z -bit 317 I 1 AREB +bit 318 O 1 ARE_B 319 0 Z +bit 317 I 1 ARE_B bit 316 C 0 * -bit 315 O 1 AWEB 316 0 Z -bit 314 I 1 AWEB +bit 315 O 1 AWE_B 316 0 Z +bit 314 I 1 AWE_B bit 313 C 0 * bit 312 O 1 DATA0 313 0 Z bit 311 I 1 DATA0 diff --git a/urjtag/src/bus/Makefile.am b/urjtag/src/bus/Makefile.am index edeef61a..f1c85525 100644 --- a/urjtag/src/bus/Makefile.am +++ b/urjtag/src/bus/Makefile.am @@ -51,44 +51,14 @@ if ENABLE_BUS_BCM1250 libbus_la_SOURCES += bcm1250.c endif -if ENABLE_BUS_BF518F_EZBRD -libbus_la_SOURCES += bf518f_ezbrd.c -endif - -if ENABLE_BUS_BF526_EZKIT -libbus_la_SOURCES += bf537_stamp.c -else -if ENABLE_BUS_BF527_EZKIT -libbus_la_SOURCES += bf537_stamp.c -else -if ENABLE_BUS_BF533_EZKIT -libbus_la_SOURCES += bf537_stamp.c -else -if ENABLE_BUS_BF537_STAMP -libbus_la_SOURCES += bf537_stamp.c -else -if ENABLE_BUS_BF537_EZKIT -libbus_la_SOURCES += bf537_stamp.c -else -if ENABLE_BUS_BF538F_EZKIT -libbus_la_SOURCES += bf537_stamp.c -endif -endif -endif -endif -endif -endif - -if ENABLE_BUS_BF533_STAMP -libbus_la_SOURCES += bf533_stamp.c -endif - -if ENABLE_BUS_BF548_EZKIT -libbus_la_SOURCES += bf548_ezkit.c -endif - -if ENABLE_BUS_BF561_EZKIT -libbus_la_SOURCES += bf561_ezkit.c +if ENABLE_BUS_BLACKFIN +libbus_la_SOURCES += \ + blackfin.c \ + bf518f_ezbrd.c \ + bf533_stamp.c \ + bf537_stamp.c \ + bf548_ezkit.c \ + bf561_ezkit.c endif if ENABLE_BUS_BSCOACH diff --git a/urjtag/src/bus/bf518f_ezbrd.c b/urjtag/src/bus/bf518f_ezbrd.c index a9450a8c..484e02a3 100644 --- a/urjtag/src/bus/bf518f_ezbrd.c +++ b/urjtag/src/bus/bf518f_ezbrd.c @@ -22,57 +22,20 @@ * Written by Jie Zhang , 2009. */ -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "buses.h" -#include "generic_bus.h" +#include "blackfin.h" typedef struct { - urj_part_signal_t *ams[2]; - urj_part_signal_t *addr[19]; - urj_part_signal_t *data[16]; - urj_part_signal_t *abe[2]; - urj_part_signal_t *awe; - urj_part_signal_t *are; - urj_part_signal_t *sras; - urj_part_signal_t *scas; - urj_part_signal_t *sms; - urj_part_signal_t *swe; + bfin_bus_params_t params; /* needs to be first */ } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data -#define AWE ((bus_params_t *) bus->params)->awe -#define ARE ((bus_params_t *) bus->params)->are -#define ABE ((bus_params_t *) bus->params)->abe -#define SRAS ((bus_params_t *) bus->params)->sras -#define SCAS ((bus_params_t *) bus->params)->scas -#define SMS ((bus_params_t *) bus->params)->sms -#define SWE ((bus_params_t *) bus->params)->swe - -/* - * bus->driver->(*new_bus) - * - */ static urj_bus_t * bf518f_ezbrd_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, const urj_param_t *cmd_params[]) { urj_bus_t *bus; urj_part_t *part; - char buff[15]; - int i; + bfin_bus_params_t *params; int failed = 0; bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t)); @@ -80,39 +43,14 @@ bf518f_ezbrd_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return NULL; part = bus->part; - for (i = 0; i < 2; i++) - { - sprintf (buff, "AMS_B%d", i); - failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff); - } - - for (i = 0; i < 19; i++) - { - sprintf (buff, "ADDR%d", i + 1); - failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff); - } - - for (i = 0; i < 16; i++) - { - sprintf (buff, "DATA%d", i); - failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff); - } - - failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWE_n"); - - failed |= urj_bus_generic_attach_sig (part, &(ARE), "ARE_n"); - - failed |= urj_bus_generic_attach_sig (part, &(ABE[0]), "ABE_B0"); - - failed |= urj_bus_generic_attach_sig (part, &(ABE[1]), "ABE_B1"); - - failed |= urj_bus_generic_attach_sig (part, &(SRAS), "SRAS_n"); - - failed |= urj_bus_generic_attach_sig (part, &(SCAS), "SCAS_n"); - - failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE_n"); - - failed |= urj_bus_generic_attach_sig (part, &(SMS), "SMS_n"); + params = bus->params; + params->async_size = 4 * 1024 * 1024; + params->ams_cnt = 4; + params->abe_cnt = 2; + params->addr_cnt = 19; + params->data_cnt = 16; + params->sdram = 1; + failed |= bfin_bus_new (bus); if (failed) { @@ -123,248 +61,5 @@ bf518f_ezbrd_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return bus; } -/** - * bus->driver->(*area) - * - */ - -#define ASYNC_MEM_BASE 0x20000000 -#define ASYNC_MEM_SIZE (2 * 1024 * 1024) -#define IS_ASYNC_ADDR(addr) ({ \ - unsigned long __addr = (unsigned long) addr; \ - __addr >= ASYNC_MEM_BASE && __addr < ASYNC_MEM_BASE + ASYNC_MEM_SIZE; \ - }) -#define ASYNC_BANK(addr) (((addr) & (ASYNC_MEM_SIZE - 1)) >> 20) - -static int -bf518f_ezbrd_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area) -{ - if (adr < ASYNC_MEM_BASE) - { - /* we can only wiggle SDRAM pins directly, so cannot drive it */ - urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, - _("reading external memory not supported")); - return URJ_STATUS_FAIL; - } - else if (IS_ASYNC_ADDR(adr)) - { - area->description = "asynchronous memory"; - area->start = ASYNC_MEM_BASE; - area->length = ASYNC_MEM_SIZE; - area->width = 16; - } - else - { - /* L1 needs core to access it */ - urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, - _("reading on-chip memory not supported")); - return URJ_STATUS_FAIL; - } - return URJ_STATUS_OK; -} - -static void -select_flash (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, AMS[0], 1, !(ASYNC_BANK(adr) == 0)); - urj_part_set_signal (p, AMS[1], 1, !(ASYNC_BANK(adr) == 1)); - - urj_part_set_signal (p, ABE[0], 1, 0); - urj_part_set_signal (p, ABE[1], 1, 0); - - urj_part_set_signal (p, SRAS, 1, 1); - urj_part_set_signal (p, SCAS, 1, 1); - urj_part_set_signal (p, SWE, 1, 1); - urj_part_set_signal (p, SMS, 1, 1); -} - -static void -unselect_flash (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, AMS[0], 1, 1); - urj_part_set_signal (p, AMS[1], 1, 1); - - urj_part_set_signal (p, ABE[0], 1, 1); - urj_part_set_signal (p, ABE[1], 1, 1); - - urj_part_set_signal (p, SRAS, 1, 1); - urj_part_set_signal (p, SCAS, 1, 1); - urj_part_set_signal (p, SWE, 1, 1); - urj_part_set_signal (p, SMS, 1, 1); -} - -static void -setup_address (urj_bus_t *bus, uint32_t a) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 19; i++) - urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 1)) & 1); -} - -static void -set_data_in (urj_bus_t *bus) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 0, 0); -} - -static void -setup_data (urj_bus_t *bus, uint32_t d) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1); -} - -/** - * bus->driver->(*read_start) - * - */ -static int -bf518f_ezbrd_bus_read_start (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus, adr); - urj_part_set_signal (p, ARE, 1, 0); - urj_part_set_signal (p, AWE, 1, 1); - - setup_address (bus, adr); - set_data_in (bus); - - urj_tap_chain_shift_data_registers (chain, 0); - - return URJ_STATUS_OK; -} - -/** - * bus->driver->(*read_next) - * - */ -static uint32_t -bf518f_ezbrd_bus_read_next (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - setup_address( bus, adr ); - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*read_end) - * - */ -static uint32_t -bf518f_ezbrd_bus_read_end (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - unselect_flash (bus); - urj_part_set_signal (p, ARE, 1, 1); - urj_part_set_signal (p, AWE, 1, 1); - - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*write) - * - */ -static void -bf518f_ezbrd_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus, adr); - urj_part_set_signal (p, ARE, 1, 1); - - setup_address (bus, adr); - setup_data (bus, data); - - urj_tap_chain_shift_data_registers (chain, 0); - - urj_part_set_signal (p, AWE, 1, 0); - urj_tap_chain_shift_data_registers (chain, 0); - urj_part_set_signal (p, AWE, 1, 1); - unselect_flash (bus); - urj_tap_chain_shift_data_registers (chain, 0); -} - -/** - * bus->driver->(*printinfo) - * - */ -static void -bf518f_ezbrd_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus) -{ - int i; - - for (i = 0; i < bus->chain->parts->len; i++) - if (bus->part == bus->chain->parts->parts[i]) - break; - urj_log (ll, _("%s (JTAG part No. %d)\n"), bus->driver->description, i); -} - -#define BF518F_EZBRD_BUS_FUNCTIONS \ - bf518f_ezbrd_bus_new, \ - urj_bus_generic_free, \ - bf518f_ezbrd_bus_printinfo, \ - urj_bus_generic_prepare_extest, \ - bf518f_ezbrd_bus_area, \ - bf518f_ezbrd_bus_read_start, \ - bf518f_ezbrd_bus_read_next, \ - bf518f_ezbrd_bus_read_end, \ - urj_bus_generic_read, \ - bf518f_ezbrd_bus_write, \ - urj_bus_generic_no_init - -#ifdef ENABLE_BUS_BF518F_EZBRD - -const urj_bus_driver_t urj_bus_bf518f_ezbrd_bus = -{ - "bf518f_ezbrd", - N_("Blackfin BF518F EZ-BRD bus driver via BSR"), - BF518F_EZBRD_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF518F_EZBRD */ - -#ifdef ENABLE_BUS_BF51X - -const urj_bus_driver_t urj_bus_bf51x_bus = -{ - "bf51x", - N_("Generic Blackfin BF51x bus driver via BSR"), - BF518F_EZBRD_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF51X */ +BFIN_BUS_DECLARE(bf518f_ezbrd, "BF518F EZ-Board"); +_BFIN_BUS_DECLARE(bf51x, bf518f_ezbrd, "Generic BF51x"); diff --git a/urjtag/src/bus/bf533_stamp.c b/urjtag/src/bus/bf533_stamp.c index e3db31a1..b4b2c1d6 100644 --- a/urjtag/src/bus/bf533_stamp.c +++ b/urjtag/src/bus/bf533_stamp.c @@ -20,62 +20,40 @@ * * Written by Christian Pellegrin , 2003. * Modified by Marcel Telka , 2003. - * */ -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "buses.h" -#include "generic_bus.h" +#include "blackfin.h" typedef struct { - urj_part_signal_t *ams[4]; - urj_part_signal_t *addr[19]; - urj_part_signal_t *data[16]; + bfin_bus_params_t params; /* needs to be first */ urj_part_signal_t *pf[2]; - urj_part_signal_t *are; - urj_part_signal_t *awe; - urj_part_signal_t *aoe; - urj_part_signal_t *sras; - urj_part_signal_t *scas; - urj_part_signal_t *sms; - urj_part_signal_t *swe; } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data #define PF ((bus_params_t *) bus->params)->pf -#define AWE ((bus_params_t *) bus->params)->awe -#define ARE ((bus_params_t *) bus->params)->are -#define AOE ((bus_params_t *) bus->params)->aoe -#define SRAS ((bus_params_t *) bus->params)->sras -#define SCAS ((bus_params_t *) bus->params)->scas -#define SMS ((bus_params_t *) bus->params)->sms -#define SWE ((bus_params_t *) bus->params)->swe -/** - * bus->driver->(*new_bus) - * - */ +static void +bf533_stamp_unselect_flash (urj_bus_t *bus) +{ + urj_part_t *part = bus->part; + + urj_part_set_signal (part, PF[0], 1, 0); + urj_part_set_signal (part, PF[1], 1, 0); +} + +static void +bf533_stamp_select_flash (urj_bus_t *bus, uint32_t addr) +{ + bf533_stamp_unselect_flash (bus); +} + static urj_bus_t * bf533_stamp_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, const urj_param_t *cmd_params[]) { urj_bus_t *bus; urj_part_t *part; - char buff[15]; - int i; + bfin_bus_params_t *params; int failed = 0; bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t)); @@ -83,43 +61,19 @@ bf533_stamp_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return NULL; part = bus->part; - for (i = 0; i < 2; i++) - { - sprintf (buff, "PF%d", i); - failed |= urj_bus_generic_attach_sig (part, &(PF[i]), buff); - } - - for (i = 0; i < 4; i++) - { - sprintf (buff, "AMS_B%d", i); - failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff); - } - - for (i = 0; i < 19; i++) - { - sprintf (buff, "ADDR%d", i + 1); - failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff); - } - - for (i = 0; i < 16; i++) - { - sprintf (buff, "DATA%d", i); - failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff); - } - - failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(ARE), "ARE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(AOE), "AOE_B"); + params = bus->params; + params->async_size = 4 * 1024 * 1024; + params->ams_cnt = 4; + params->abe_cnt = 2; + params->addr_cnt = 19; + params->data_cnt = 16; + params->select_flash = bf533_stamp_select_flash; + params->unselect_flash = bf533_stamp_unselect_flash; + params->sdram = 1; + failed |= bfin_bus_new (bus); - failed |= urj_bus_generic_attach_sig (part, &(SRAS), "SRAS_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SCAS), "SCAS_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SMS), "SMS_B"); + failed |= urj_bus_generic_attach_sig (part, &PF[0], "PF0"); + failed |= urj_bus_generic_attach_sig (part, &PF[1], "PF1"); if (failed) { @@ -130,222 +84,4 @@ bf533_stamp_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return bus; } -/** - * bus->driver->(*printinfo) - * - */ -static void -bf533_stamp_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus) -{ - int i; - - for (i = 0; i < bus->chain->parts->len; i++) - if (bus->part == bus->chain->parts->parts[i]) - break; - urj_log (ll, _("Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"), - i); -} - -/** - * bus->driver->(*area) - * - */ -static int -bf533_stamp_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area) -{ - area->description = NULL; - area->start = UINT32_C (0x00000000); - area->length = UINT64_C (0x100000000); - area->width = 16; - - return URJ_STATUS_OK; -} - -static void -select_flash (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, PF[0], 1, 0); - urj_part_set_signal (p, PF[1], 1, 0); - - urj_part_set_signal (p, AMS[0], 1, 1); - urj_part_set_signal (p, AMS[1], 1, 1); - urj_part_set_signal (p, AMS[2], 1, 1); - urj_part_set_signal (p, AMS[3], 1, 1); - if (adr >= 0x20000000 && adr <= 0x203fffff) { - uint32_t ams_idx; - ams_idx = (adr >> 20) & 0x3; - urj_part_set_signal (p, AMS[ams_idx], 1, 0); - } - - urj_part_set_signal (p, SRAS, 1, 1); - urj_part_set_signal (p, SCAS, 1, 1); - urj_part_set_signal (p, SWE, 1, 1); - urj_part_set_signal (p, SMS, 1, 1); -} - -static void -unselect_flash (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, PF[0], 1, 0); - urj_part_set_signal (p, PF[1], 1, 0); - - urj_part_set_signal (p, AMS[0], 1, 1); - urj_part_set_signal (p, AMS[1], 1, 1); - urj_part_set_signal (p, AMS[2], 1, 1); - urj_part_set_signal (p, AMS[3], 1, 1); - - urj_part_set_signal (p, SRAS, 1, 1); - urj_part_set_signal (p, SCAS, 1, 1); - urj_part_set_signal (p, SWE, 1, 1); - urj_part_set_signal (p, SMS, 1, 1); -} - -static void -setup_address (urj_bus_t *bus, uint32_t a) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 19; i++) - urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 1)) & 1); -} - -static void -set_data_in (urj_bus_t *bus) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 0, 0); -} - -static void -setup_data (urj_bus_t *bus, uint32_t d) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1); - -} - -/** - * bus->driver->(*read_start) - * - */ -static int -bf533_stamp_bus_read_start (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus, adr); - urj_part_set_signal (p, AOE, 1, 0); - urj_part_set_signal (p, ARE, 1, 0); - urj_part_set_signal (p, AWE, 1, 1); - - setup_address (bus, adr); - set_data_in (bus); - - urj_tap_chain_shift_data_registers (chain, 0); - - return URJ_STATUS_OK; -} - -/** - * bus->driver->(*read_next) - * - */ -static uint32_t -bf533_stamp_bus_read_next (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - setup_address (bus, adr); - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*read_end) - * - */ -static uint32_t -bf533_stamp_bus_read_end (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - unselect_flash (bus); - urj_part_set_signal (p, AOE, 1, 1); - urj_part_set_signal (p, ARE, 1, 1); - urj_part_set_signal (p, AWE, 1, 1); - - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*write) - * - */ -static void -bf533_stamp_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - urj_log (URJ_LOG_LEVEL_COMM, "Writing %04lX to %08lX...\n", - (long unsigned) data, (long unsigned) adr); - - select_flash (bus, adr); - urj_part_set_signal (p, ARE, 1, 1); - urj_part_set_signal (p, AOE, 1, 1); - urj_part_set_signal (p, AWE, 1, 1); - - setup_address (bus, adr); - setup_data (bus, data); - - urj_tap_chain_shift_data_registers (chain, 0); - - urj_part_set_signal (p, AWE, 1, 0); - urj_tap_chain_shift_data_registers (chain, 0); - urj_part_set_signal (p, AWE, 1, 1); - unselect_flash (bus); - urj_tap_chain_shift_data_registers (chain, 0); -} - -const urj_bus_driver_t urj_bus_bf533_stamp_bus = { - "bf533_stamp", - N_("Blackfin BF533 Stamp board bus driver"), - bf533_stamp_bus_new, - urj_bus_generic_free, - bf533_stamp_bus_printinfo, - urj_bus_generic_prepare_extest, - bf533_stamp_bus_area, - bf533_stamp_bus_read_start, - bf533_stamp_bus_read_next, - bf533_stamp_bus_read_end, - urj_bus_generic_read, - bf533_stamp_bus_write, - urj_bus_generic_no_init -}; +BFIN_BUS_DECLARE(bf533_stamp, "BF533 Stamp board"); diff --git a/urjtag/src/bus/bf537_stamp.c b/urjtag/src/bus/bf537_stamp.c index 763b68df..39bb87b9 100644 --- a/urjtag/src/bus/bf537_stamp.c +++ b/urjtag/src/bus/bf537_stamp.c @@ -20,62 +20,22 @@ * 02111-1307, USA. * * Written by Jie Zhang , 2008. - * */ -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "buses.h" -#include "generic_bus.h" +#include "blackfin.h" typedef struct { - urj_part_signal_t *ams[4]; - urj_part_signal_t *addr[19]; - urj_part_signal_t *data[16]; - urj_part_signal_t *abe[2]; - urj_part_signal_t *awe; - urj_part_signal_t *are; - urj_part_signal_t *aoe; - urj_part_signal_t *sras; - urj_part_signal_t *scas; - urj_part_signal_t *sms; - urj_part_signal_t *swe; + bfin_bus_params_t params; /* needs to be first */ } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data -#define AWE ((bus_params_t *) bus->params)->awe -#define ARE ((bus_params_t *) bus->params)->are -#define AOE ((bus_params_t *) bus->params)->aoe -#define ABE ((bus_params_t *) bus->params)->abe -#define SRAS ((bus_params_t *) bus->params)->sras -#define SCAS ((bus_params_t *) bus->params)->scas -#define SMS ((bus_params_t *) bus->params)->sms -#define SWE ((bus_params_t *) bus->params)->swe - -/* - * bus->driver->(*new_bus) - * - */ static urj_bus_t * bf537_stamp_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, const urj_param_t *cmd_params[]) { urj_bus_t *bus; urj_part_t *part; - char buff[15]; - int i; + bfin_bus_params_t *params; int failed = 0; bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t)); @@ -83,41 +43,14 @@ bf537_stamp_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return NULL; part = bus->part; - for (i = 0; i < 4; i++) - { - sprintf (buff, "AMS_B%d", i); - failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff); - } - - for (i = 0; i < 19; i++) - { - sprintf (buff, "ADDR%d", i + 1); - failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff); - } - - for (i = 0; i < 16; i++) - { - sprintf (buff, "DATA%d", i); - failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff); - } - - failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(ARE), "ARE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(AOE), "AOE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(ABE[0]), "ABE_B0"); - - failed |= urj_bus_generic_attach_sig (part, &(ABE[1]), "ABE_B1"); - - failed |= urj_bus_generic_attach_sig (part, &(SRAS), "SRAS_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SCAS), "SCAS_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SMS), "SMS_B"); + params = bus->params; + params->async_size = 4 * 1024 * 1024; + params->ams_cnt = 4; + params->abe_cnt = 2; + params->addr_cnt = 19; + params->data_cnt = 16; + params->sdram = 1; + failed |= bfin_bus_new (bus); if (failed) { @@ -128,314 +61,11 @@ bf537_stamp_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return bus; } -/** - * bus->driver->(*area) - * - */ - -#define ASYNC_MEM_BASE 0x20000000 -#define ASYNC_MEM_SIZE (4 * 1024 * 1024) -#define IS_ASYNC_ADDR(addr) ({ \ - unsigned long __addr = (unsigned long) addr; \ - __addr >= ASYNC_MEM_BASE && __addr < ASYNC_MEM_BASE + ASYNC_MEM_SIZE; \ - }) -#define ASYNC_BANK(addr) (((addr) & (ASYNC_MEM_SIZE - 1)) >> 20) - -static int -bf537_stamp_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area) -{ - if (adr < ASYNC_MEM_BASE) - { - /* we can only wiggle SDRAM pins directly, so cannot drive it */ - urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, - _("reading external memory not supported")); - return URJ_STATUS_FAIL; - } - else if (IS_ASYNC_ADDR(adr)) - { - area->description = "asynchronous memory"; - area->start = ASYNC_MEM_BASE; - area->length = ASYNC_MEM_SIZE; - area->width = 16; - } - else - { - /* L1 needs core to access it */ - urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, - _("reading on-chip memory not supported")); - return URJ_STATUS_FAIL; - } - return URJ_STATUS_OK; -} - -static void -select_flash (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, AMS[0], 1, !(ASYNC_BANK(adr) == 0)); - urj_part_set_signal (p, AMS[1], 1, !(ASYNC_BANK(adr) == 1)); - urj_part_set_signal (p, AMS[2], 1, !(ASYNC_BANK(adr) == 2)); - urj_part_set_signal (p, AMS[3], 1, !(ASYNC_BANK(adr) == 3)); - - urj_part_set_signal (p, ABE[0], 1, 0); - urj_part_set_signal (p, ABE[1], 1, 0); - - urj_part_set_signal (p, SRAS, 1, 1); - urj_part_set_signal (p, SCAS, 1, 1); - urj_part_set_signal (p, SWE, 1, 1); - urj_part_set_signal (p, SMS, 1, 1); -} - -static void -unselect_flash (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, AMS[0], 1, 1); - urj_part_set_signal (p, AMS[1], 1, 1); - urj_part_set_signal (p, AMS[2], 1, 1); - urj_part_set_signal (p, AMS[3], 1, 1); - - urj_part_set_signal (p, ABE[0], 1, 1); - urj_part_set_signal (p, ABE[1], 1, 1); - - urj_part_set_signal (p, SRAS, 1, 1); - urj_part_set_signal (p, SCAS, 1, 1); - urj_part_set_signal (p, SWE, 1, 1); - urj_part_set_signal (p, SMS, 1, 1); -} - -static void -setup_address (urj_bus_t *bus, uint32_t a) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 19; i++) - urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 1)) & 1); -} - -static void -set_data_in (urj_bus_t *bus) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 0, 0); -} - -static void -setup_data (urj_bus_t *bus, uint32_t d) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1); - -} - -/** - * bus->driver->(*read_start) - * - */ -static int -bf537_stamp_bus_read_start (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus, adr); - urj_part_set_signal (p, AOE, 1, 0); - urj_part_set_signal (p, ARE, 1, 0); - urj_part_set_signal (p, AWE, 1, 1); - - setup_address (bus, adr); - set_data_in (bus); - - urj_tap_chain_shift_data_registers (chain, 0); - - return URJ_STATUS_OK; -} - -/** - * bus->driver->(*read_next) - * - */ -static uint32_t -bf537_stamp_bus_read_next (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - setup_address (bus, adr); - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*read_end) - * - */ -static uint32_t -bf537_stamp_bus_read_end (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - unselect_flash (bus); - urj_part_set_signal (p, AOE, 1, 1); - urj_part_set_signal (p, ARE, 1, 1); - urj_part_set_signal (p, AWE, 1, 1); - - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*write) - * - */ -static void -bf537_stamp_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus, adr); - urj_part_set_signal (p, AOE, 1, 1); - urj_part_set_signal (p, ARE, 1, 1); - - setup_address (bus, adr); - setup_data (bus, data); - - urj_tap_chain_shift_data_registers (chain, 0); - - urj_part_set_signal (p, AWE, 1, 0); - urj_tap_chain_shift_data_registers (chain, 0); - urj_part_set_signal (p, AWE, 1, 1); - unselect_flash (bus); - urj_tap_chain_shift_data_registers (chain, 0); -} - -/** - * bus->driver->(*printinfo) - * - */ -static void -bf537_stamp_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus) -{ - int i; - - for (i = 0; i < bus->chain->parts->len; i++) - if (bus->part == bus->chain->parts->parts[i]) - break; - urj_log (ll, _("%s (JTAG part No. %d)\n"), bus->driver->description, i); -} - -#define BF537_STAMP_BUS_FUNCTIONS \ - bf537_stamp_bus_new, \ - urj_bus_generic_free, \ - bf537_stamp_bus_printinfo, \ - urj_bus_generic_prepare_extest, \ - bf537_stamp_bus_area, \ - bf537_stamp_bus_read_start, \ - bf537_stamp_bus_read_next, \ - bf537_stamp_bus_read_end, \ - urj_bus_generic_read, \ - bf537_stamp_bus_write, \ - urj_bus_generic_no_init - -#ifdef ENABLE_BUS_BF537_STAMP - -const urj_bus_driver_t urj_bus_bf537_stamp_bus = { - "bf537_stamp", - N_("Blackfin BF537 Stamp board bus driver via BSR"), - BF537_STAMP_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF537_STAMP */ - -#ifdef ENABLE_BUS_BF537_EZKIT - -const urj_bus_driver_t urj_bus_bf537_ezkit_bus = { - "bf537_ezkit", - N_("Blackfin BF537 EZ-KIT board bus driver via BSR"), - BF537_STAMP_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF537_EZKIT */ - -#ifdef ENABLE_BUS_BF527_EZKIT - -const urj_bus_driver_t urj_bus_bf527_ezkit_bus = { - "bf527_ezkit", - N_("Blackfin BF527 EZ-KIT board bus driver via BSR"), - BF537_STAMP_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF527_EZKIT */ - -#ifdef ENABLE_BUS_BF538F_EZKIT - -const urj_bus_driver_t urj_bus_bf538f_ezkit_bus = { - "bf538f_ezkit", - N_("Blackfin BF538F EZ-KIT board bus driver via BSR"), - BF537_STAMP_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF538F_EZKIT */ - -#ifdef ENABLE_BUS_BF526_EZKIT - -const urj_bus_driver_t urj_bus_bf526_ezkit_bus = { - "bf526_ezkit", - N_("Blackfin BF526 EZ-KIT board bus driver via BSR"), - BF537_STAMP_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF526_EZKIT */ - -#ifdef ENABLE_BUS_BF533_EZKIT - -const urj_bus_driver_t urj_bus_bf533_ezkit_bus = { - "bf533_ezkit", - N_("Blackfin BF533 EZ-KIT board bus driver via BSR"), - BF537_STAMP_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF533_EZKIT */ - -#ifdef ENABLE_BUS_BF52X - -const urj_bus_driver_t urj_bus_bf52x_bus = { - "bf52x", - N_("Generic Blackfin BF52x bus driver via BSR"), - BF537_STAMP_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF52X */ - -#ifdef ENABLE_BUS_BF53X - -const urj_bus_driver_t urj_bus_bf53x_bus = { - "bf53x", - N_("Generic Blackfin BF53x bus driver via BSR"), - BF537_STAMP_BUS_FUNCTIONS -}; - -#endif /* #ifdef ENABLE_BUS_BF53X */ +BFIN_BUS_DECLARE(bf537_stamp, "BF537 Stamp board"); +_BFIN_BUS_DECLARE(bf537_ezkit, bf537_stamp, "BF537 EZ-Kit board"); +_BFIN_BUS_DECLARE(bf527_ezkit, bf537_stamp, "BF527 EZ-Kit board"); +_BFIN_BUS_DECLARE(bf538f_ezkit, bf537_stamp, "BF538F EZ-Kit board"); +_BFIN_BUS_DECLARE(bf526_ezkit, bf537_stamp, "BF526 EZ-Kit board"); +_BFIN_BUS_DECLARE(bf533_ezkit, bf537_stamp, "BF533 EZ-Kit board"); +_BFIN_BUS_DECLARE(bf52x, bf537_stamp, "Generic BF52x"); +_BFIN_BUS_DECLARE(bf53x, bf537_stamp, "Generic BF53x"); diff --git a/urjtag/src/bus/bf548_ezkit.c b/urjtag/src/bus/bf548_ezkit.c index 044f0344..a7750d40 100644 --- a/urjtag/src/bus/bf548_ezkit.c +++ b/urjtag/src/bus/bf548_ezkit.c @@ -22,53 +22,40 @@ * Written by Jie Zhang , 2008. */ -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "buses.h" -#include "generic_bus.h" +#include "blackfin.h" typedef struct { - urj_part_signal_t *ams[4]; - urj_part_signal_t *addr[24]; - urj_part_signal_t *data[16]; - urj_part_signal_t *awe; - urj_part_signal_t *are; - urj_part_signal_t *aoe; - urj_part_signal_t *dcs0; - urj_part_signal_t *nce; + bfin_bus_params_t params; /* needs to be first */ + urj_part_signal_t *dcs0; /* DDR */ + urj_part_signal_t *nce; /* NAND */ } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define DATA ((bus_params_t *) bus->params)->data -#define AOE ((bus_params_t *) bus->params)->aoe -#define AWE ((bus_params_t *) bus->params)->awe -#define ARE ((bus_params_t *) bus->params)->are #define DCS0 ((bus_params_t *) bus->params)->dcs0 #define NCE ((bus_params_t *) bus->params)->nce -/** - * bus->driver->(*new_bus) - * - */ +static void +bf548_ezkit_unselect_flash (urj_bus_t *bus) +{ + urj_part_t *part = bus->part; + + urj_part_set_signal (part, DCS0, 1, 1); + urj_part_set_signal (part, NCE, 1, 1); +} + +static void +bf548_ezkit_select_flash (urj_bus_t *bus, uint32_t addr) +{ + bf548_ezkit_unselect_flash (bus); +} + static urj_bus_t * bf548_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, const urj_param_t *cmd_params[]) { urj_bus_t *bus; urj_part_t *part; - char buff[15]; - int i; + bfin_bus_params_t *params; int failed = 0; bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t)); @@ -76,45 +63,18 @@ bf548_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return NULL; part = bus->part; - for (i = 0; i < 4; i++) - { - sprintf (buff, "AMS_B%d", i); - failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff); - } - - for (i = 0; i < 3; i++) - { - sprintf (buff, "ADDR%d", i + 1); - failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff); - } - - for (i = 3; i < 9; i++) - { - sprintf (buff, "PH%d", i + 5); - failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff); - } - - for (i = 9; i < 24; i++) - { - sprintf (buff, "PI%d", i - 9); - failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff); - } - - for (i = 0; i < 16; i++) - { - sprintf (buff, "DATA%d", i); - failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff); - } - - failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWEB"); - - failed |= urj_bus_generic_attach_sig (part, &(ARE), "AREB"); - - failed |= urj_bus_generic_attach_sig (part, &(AOE), "AOEB"); + params = bus->params; + params->async_size = 64 * 1024 * 1024; + params->ams_cnt = 4; + params->abe_cnt = 2; + params->addr_cnt = 24; + params->data_cnt = 16; + params->select_flash = bf548_ezkit_select_flash; + params->unselect_flash = bf548_ezkit_unselect_flash; + failed |= bfin_bus_new (bus); - failed |= urj_bus_generic_attach_sig (part, &(DCS0), "CS0_B"); - - failed |= urj_bus_generic_attach_sig (part, &(NCE), "PJ1"); + failed |= urj_bus_generic_attach_sig (part, &DCS0, "CS0_B"); + failed |= urj_bus_generic_attach_sig (part, &NCE, "PJ1"); if (failed) { @@ -125,202 +85,4 @@ bf548_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return bus; } -/** - * bus->driver->(*printinfo) - * - */ -static void -bf548_ezkit_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus) -{ - int i; - - for (i = 0; i < bus->chain->parts->len; i++) - if (bus->part == bus->chain->parts->parts[i]) - break; - urj_log (ll, _("Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), - i); -} - -/** - * bus->driver->(*area) - * - */ -static int -bf548_ezkit_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area) -{ - area->description = NULL; - area->start = UINT32_C (0x00000000); - area->length = UINT64_C (0x100000000); - area->width = 16; - - return URJ_STATUS_OK; -} - -static void -select_flash (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, AMS[0], 1, 0); - urj_part_set_signal (p, AMS[1], 1, 1); - urj_part_set_signal (p, AMS[2], 1, 1); - urj_part_set_signal (p, AMS[3], 1, 1); - urj_part_set_signal (p, DCS0, 1, 1); - urj_part_set_signal (p, NCE, 1, 1); -} - -static void -unselect_flash (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, AMS[0], 1, 1); - urj_part_set_signal (p, AMS[1], 1, 1); - urj_part_set_signal (p, AMS[2], 1, 1); - urj_part_set_signal (p, AMS[3], 1, 1); - urj_part_set_signal (p, DCS0, 1, 1); - urj_part_set_signal (p, NCE, 1, 1); -} - -static void -setup_address (urj_bus_t *bus, uint32_t a) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 24; i++) - urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 1)) & 1); -} - -static void -set_data_in (urj_bus_t *bus) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 0, 0); -} - -static void -setup_data (urj_bus_t *bus, uint32_t d) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1); - -} - -/** - * bus->driver->(*read_start) - * - */ -static int -bf548_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus); - urj_part_set_signal (p, AOE, 1, 0); - urj_part_set_signal (p, ARE, 1, 0); - urj_part_set_signal (p, AWE, 1, 1); - - setup_address (bus, adr); - set_data_in (bus); - - urj_tap_chain_shift_data_registers (chain, 0); - - return URJ_STATUS_OK; -} - -/** - * bus->driver->(*read_next) - * - */ -static uint32_t -bf548_ezkit_bus_read_next (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - setup_address (bus, adr); - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*read_end) - * - */ -static uint32_t -bf548_ezkit_bus_read_end (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - urj_part_set_signal (p, AOE, 1, 1); - urj_part_set_signal (p, ARE, 1, 1); - urj_part_set_signal (p, AWE, 1, 1); - unselect_flash (bus); - - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*write) - * - */ -static void -bf548_ezkit_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus); - urj_part_set_signal (p, AOE, 1, 0); - urj_part_set_signal (p, ARE, 1, 1); - - setup_address (bus, adr); - setup_data (bus, data); - - urj_tap_chain_shift_data_registers (chain, 0); - - urj_part_set_signal (p, AWE, 1, 0); - urj_tap_chain_shift_data_registers (chain, 0); - urj_part_set_signal (p, AWE, 1, 1); - urj_part_set_signal (p, AOE, 1, 1); - unselect_flash (bus); - urj_tap_chain_shift_data_registers (chain, 0); -} - -const urj_bus_driver_t urj_bus_bf548_ezkit_bus = { - "bf548_ezkit", - N_("Blackfin BF548 EZ-KIT board bus driver"), - bf548_ezkit_bus_new, - urj_bus_generic_free, - bf548_ezkit_bus_printinfo, - urj_bus_generic_prepare_extest, - bf548_ezkit_bus_area, - bf548_ezkit_bus_read_start, - bf548_ezkit_bus_read_next, - bf548_ezkit_bus_read_end, - urj_bus_generic_read, - bf548_ezkit_bus_write, - urj_bus_generic_no_init -}; +BFIN_BUS_DECLARE(bf548_ezkit, "BF548 EZ-KIT board"); diff --git a/urjtag/src/bus/bf561_ezkit.c b/urjtag/src/bus/bf561_ezkit.c index d468595f..5e0a850a 100644 --- a/urjtag/src/bus/bf561_ezkit.c +++ b/urjtag/src/bus/bf561_ezkit.c @@ -20,60 +20,22 @@ * 02111-1307, USA. * * Written by Jie Zhang , 2008. - * */ -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "buses.h" -#include "generic_bus.h" +#include "blackfin.h" typedef struct { - urj_part_signal_t *ams[4]; - urj_part_signal_t *addr[24]; - urj_part_signal_t *abe[4]; - urj_part_signal_t *data[32]; - urj_part_signal_t *awe; - urj_part_signal_t *aoe; - urj_part_signal_t *sras; - urj_part_signal_t *scas; - urj_part_signal_t *sms[4]; - urj_part_signal_t *swe; + bfin_bus_params_t params; /* needs to be first */ } bus_params_t; -#define AMS ((bus_params_t *) bus->params)->ams -#define ADDR ((bus_params_t *) bus->params)->addr -#define ABE ((bus_params_t *) bus->params)->abe -#define DATA ((bus_params_t *) bus->params)->data -#define AWE ((bus_params_t *) bus->params)->awe -#define AOE ((bus_params_t *) bus->params)->aoe -#define SRAS ((bus_params_t *) bus->params)->sras -#define SCAS ((bus_params_t *) bus->params)->scas -#define SMS ((bus_params_t *) bus->params)->sms -#define SWE ((bus_params_t *) bus->params)->swe - -/** - * bus->driver->(*new_bus) - * - */ static urj_bus_t * bf561_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, const urj_param_t *cmd_params[]) { urj_bus_t *bus; urj_part_t *part; - char buff[15]; - int i; + bfin_bus_params_t *params; int failed = 0; bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t)); @@ -81,45 +43,15 @@ bf561_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return NULL; part = bus->part; - for (i = 0; i < 4; i++) - { - sprintf (buff, "AMS_B%d", i); - failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff); - } - - for (i = 0; i < 24; i++) - { - sprintf (buff, "ADDR%d", i + 2); - failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff); - } - - for (i = 0; i < 4; i++) - { - sprintf (buff, "ABE_B%d", i); - failed |= urj_bus_generic_attach_sig (part, &(ABE[i]), buff); - } - - for (i = 0; i < 32; i++) - { - sprintf (buff, "DATA%d", i); - failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff); - } - - failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(AOE), "AOE_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SRAS), "SRAS_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SCAS), "SCAS_B"); - - failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE_B"); - - for (i = 0; i < 4; i++) - { - sprintf (buff, "SMS_B%d", i); - failed |= urj_bus_generic_attach_sig (part, &(SMS[i]), buff); - } + params = bus->params; + params->async_size = 64 * 1024 * 1024; + params->ams_cnt = 4; + params->abe_cnt = 4; + params->addr_cnt = 24; + params->data_cnt = 32; + params->sdram = 1; + params->sms_cnt = 4; + failed |= bfin_bus_new (bus); if (failed) { @@ -130,220 +62,4 @@ bf561_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver, return bus; } -/** - * bus->driver->(*printinfo) - * - */ -static void -bf561_ezkit_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus) -{ - int i; - - for (i = 0; i < bus->chain->parts->len; i++) - if (bus->part == bus->chain->parts->parts[i]) - break; - urj_log (ll, _("Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), - i); -} - -/** - * bus->driver->(*area) - * - */ -static int -bf561_ezkit_bus_area (urj_bus_t *bus, uint32_t addr, urj_bus_area_t *area) -{ - area->description = NULL; - area->start = UINT32_C (0x00000000); - area->length = UINT64_C (0x100000000); - area->width = 16; - return URJ_STATUS_OK; -} - -static void -select_flash (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, AMS[0], 1, 0); - urj_part_set_signal (p, AMS[1], 1, 1); - urj_part_set_signal (p, AMS[2], 1, 1); - urj_part_set_signal (p, AMS[3], 1, 1); - - urj_part_set_signal (p, ABE[0], 1, 0); - urj_part_set_signal (p, ABE[1], 1, 0); - urj_part_set_signal (p, ABE[2], 1, 0); - urj_part_set_signal (p, ABE[3], 1, 0); - - urj_part_set_signal (p, SRAS, 1, 1); - urj_part_set_signal (p, SCAS, 1, 1); - urj_part_set_signal (p, SWE, 1, 1); - urj_part_set_signal (p, SMS[0], 1, 1); - urj_part_set_signal (p, SMS[1], 1, 1); - urj_part_set_signal (p, SMS[2], 1, 1); - urj_part_set_signal (p, SMS[3], 1, 1); -} - -static void -unselect_flash (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - - urj_part_set_signal (p, AMS[0], 1, 1); - urj_part_set_signal (p, AMS[1], 1, 1); - urj_part_set_signal (p, AMS[2], 1, 1); - urj_part_set_signal (p, AMS[3], 1, 1); - - urj_part_set_signal (p, ABE[0], 1, 1); - urj_part_set_signal (p, ABE[1], 1, 1); - urj_part_set_signal (p, ABE[2], 1, 1); - urj_part_set_signal (p, ABE[3], 1, 1); - - urj_part_set_signal (p, SRAS, 1, 1); - urj_part_set_signal (p, SCAS, 1, 1); - urj_part_set_signal (p, SWE, 1, 1); - urj_part_set_signal (p, SMS[0], 1, 1); - urj_part_set_signal (p, SMS[1], 1, 1); - urj_part_set_signal (p, SMS[2], 1, 1); - urj_part_set_signal (p, SMS[3], 1, 1); -} - -static void -setup_address (urj_bus_t *bus, uint32_t a) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 24; i++) - urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 2)) & 1); - urj_part_set_signal (p, ABE[3], 1, (a >> 1) & 1); -} - -static void -set_data_in (urj_bus_t *bus) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 0, 0); -} - -static void -setup_data (urj_bus_t *bus, uint32_t d) -{ - int i; - urj_part_t *p = bus->part; - - for (i = 0; i < 16; i++) - urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1); - -} - -/** - * bus->driver->(*read_start) - * - */ -static int -bf561_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus); - urj_part_set_signal (p, AOE, 1, 0); - urj_part_set_signal (p, AWE, 1, 1); - - setup_address (bus, adr); - set_data_in (bus); - - urj_tap_chain_shift_data_registers (chain, 0); - - return URJ_STATUS_OK; -} - -/** - * bus->driver->(*read_next) - * - */ -static uint32_t -bf561_ezkit_bus_read_next (urj_bus_t *bus, uint32_t adr) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - setup_address (bus, adr); - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*read_end) - * - */ -static uint32_t -bf561_ezkit_bus_read_end (urj_bus_t *bus) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - int i; - uint32_t d = 0; - - unselect_flash (bus); - urj_part_set_signal (p, AOE, 1, 1); - urj_part_set_signal (p, AWE, 1, 1); - - urj_tap_chain_shift_data_registers (chain, 1); - - for (i = 0; i < 16; i++) - d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i); - - return d; -} - -/** - * bus->driver->(*write) - * - */ -static void -bf561_ezkit_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data) -{ - urj_part_t *p = bus->part; - urj_chain_t *chain = bus->chain; - - select_flash (bus); - urj_part_set_signal (p, AOE, 1, 1); - - setup_address (bus, adr); - setup_data (bus, data); - - urj_tap_chain_shift_data_registers (chain, 0); - - urj_part_set_signal (p, AWE, 1, 0); - urj_tap_chain_shift_data_registers (chain, 0); - urj_part_set_signal (p, AWE, 1, 1); - unselect_flash (bus); - urj_tap_chain_shift_data_registers (chain, 0); -} - -const urj_bus_driver_t urj_bus_bf561_ezkit_bus = { - "bf561_ezkit", - N_("Blackfin BF561 EZ-KIT board bus driver"), - bf561_ezkit_bus_new, - urj_bus_generic_free, - bf561_ezkit_bus_printinfo, - urj_bus_generic_prepare_extest, - bf561_ezkit_bus_area, - bf561_ezkit_bus_read_start, - bf561_ezkit_bus_read_next, - bf561_ezkit_bus_read_end, - urj_bus_generic_read, - bf561_ezkit_bus_write, - urj_bus_generic_no_init -}; +BFIN_BUS_DECLARE(bf561_ezkit, "BF561 EZ-KIT board"); diff --git a/urjtag/src/bus/blackfin.c b/urjtag/src/bus/blackfin.c new file mode 100644 index 00000000..4dd5b529 --- /dev/null +++ b/urjtag/src/bus/blackfin.c @@ -0,0 +1,304 @@ +/* + * $Id$ + * + * Analog Devices unified Blackfin bus functions + * + * Copyright (C) 2008-2010 Analog Devices, Inc. + * Licensed under the GPL-2 or later. + * + * Written by Mike Frysinger heavily leveraging + * the work of Jie Zhang . + */ + +#include "blackfin.h" + +#define IS_ASYNC_ADDR(params, adr) \ +({ \ + unsigned long __addr = (unsigned long) (adr); \ + bfin_bus_params_t *__params = (void *) (params); \ + __addr >= __params->async_base && \ + __addr < __params->async_base + __params->async_size; \ +}) +#define ASYNC_BANK(params, adr) (((adr) & (((bfin_bus_params_t *)(params))->async_size - 1)) >> 20) + +static int +bfin_bus_attach_sigs (urj_part_t *part, urj_part_signal_t **pins, int pin_cnt, + const char *spin, int off) +{ + int i; + char buf[16]; + int ret = 0; + + for (i = 0; i < pin_cnt; ++i) + { + sprintf (buf, "%s%i", spin, i + off); + ret |= urj_bus_generic_attach_sig (part, &pins[i], buf); + } + + return ret; +} + +int +bfin_bus_new (urj_bus_t *bus) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + int ret = 0; + + if (!params->async_base) + params->async_base = 0x20000000; + + /* Most signals start at 0, but ADDR starts at 1 (because it's 16bit) */ + ret |= bfin_bus_attach_sigs (part, params->ams, params->ams_cnt, "AMS_B", 0); + ret |= bfin_bus_attach_sigs (part, params->abe, params->abe_cnt, "ABE_B", 0); + ret |= bfin_bus_attach_sigs (part, params->data, params->data_cnt, "DATA", 0); + ret |= bfin_bus_attach_sigs (part, params->addr, params->addr_cnt, "ADDR", 1); + + ret |= urj_bus_generic_attach_sig (part, ¶ms->aoe, "AOE_B"); + ret |= urj_bus_generic_attach_sig (part, ¶ms->are, "ARE_B"); + ret |= urj_bus_generic_attach_sig (part, ¶ms->awe, "AWE_B"); + + if (params->sdram) + { + ret |= urj_bus_generic_attach_sig (part, ¶ms->scas, "SCAS_B"); + ret |= urj_bus_generic_attach_sig (part, ¶ms->sras, "SRAS_B"); + ret |= urj_bus_generic_attach_sig (part, ¶ms->swe, "SWE_B"); + if (!params->sms_cnt) + { + ret |= urj_bus_generic_attach_sig (part, ¶ms->sms[0], "SMS_B"); + params->sms_cnt = 1; + } + else + ret |= bfin_bus_attach_sigs (part, params->sms, params->sms_cnt, "SMS_B", 0); + } + + return ret; +} + +int +bfin_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area) +{ + bfin_bus_params_t *params = bus->params; + + if (adr < params->async_base) + { + /* we can only wiggle SDRAM pins directly, so cannot drive it */ + urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, + _("reading external memory not supported")); + return URJ_STATUS_FAIL; + } + else if (IS_ASYNC_ADDR(params, adr)) + { + area->description = "asynchronous memory"; + area->start = params->async_base; + area->length = params->async_size; + area->width = 16; + } + else + { + /* L1 needs core to access it */ + urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, + _("reading on-chip memory not supported")); + return URJ_STATUS_FAIL; + } + + return URJ_STATUS_OK; +} + +static void +bfin_select_flash_sdram (urj_bus_t *bus) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + int i; + + if (params->sdram) + { + urj_part_set_signal (part, params->sras, 1, 1); + urj_part_set_signal (part, params->scas, 1, 1); + urj_part_set_signal (part, params->swe, 1, 1); + for (i = 0; i < params->sms_cnt; ++i) + urj_part_set_signal (part, params->sms[0], 1, 1); + } +} + +void +bfin_select_flash (urj_bus_t *bus, uint32_t adr) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + int i; + + for (i = 0; i < params->ams_cnt; ++i) + urj_part_set_signal (part, params->ams[i], 1, + !(ASYNC_BANK(params, adr) == i)); + + for (i = 0; i < params->abe_cnt; ++i) + urj_part_set_signal (part, params->abe[i], 1, 0); + + bfin_select_flash_sdram (bus); + + if (params->select_flash) + params->select_flash (bus, adr); +} + +void +bfin_unselect_flash (urj_bus_t *bus) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + int i; + + for (i = 0; i < params->ams_cnt; ++i) + urj_part_set_signal (part, params->ams[i], 1, 1); + + for (i = 0; i < params->abe_cnt; ++i) + urj_part_set_signal (part, params->abe[i], 1, 1); + + bfin_select_flash_sdram (bus); + + if (params->unselect_flash) + params->unselect_flash (bus); +} + +void +bfin_setup_address (urj_bus_t *bus, uint32_t adr) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + int i; + + for (i = 0; i < params->addr_cnt; ++i) + urj_part_set_signal (part, params->addr[i], 1, (adr >> (i + 1)) & 1); +} + +void +bfin_set_data_in (urj_bus_t *bus) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + int i; + + for (i = 0; i < params->data_cnt; ++i) + urj_part_set_signal (part, params->data[i], 0, 0); +} + +void +bfin_setup_data (urj_bus_t *bus, uint32_t data) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + int i; + + for (i = 0; i < params->data_cnt; ++i) + urj_part_set_signal (part, params->data[i], 1, (data >> i) & 1); + +} + +static int +bfin_part_maybe_set_signal (urj_part_t *part, urj_part_signal_t *signal, + int out, int val) +{ + if (signal) + return urj_part_set_signal (part, signal, out, val); + return URJ_STATUS_OK; +} + +int +bfin_bus_read_start (urj_bus_t *bus, uint32_t adr) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + urj_chain_t *chain = bus->chain; + + bfin_select_flash (bus, adr); + + bfin_part_maybe_set_signal (part, params->are, 1, 0); + bfin_part_maybe_set_signal (part, params->awe, 1, 1); + bfin_part_maybe_set_signal (part, params->aoe, 1, 0); + + bfin_setup_address (bus, adr); + bfin_set_data_in (bus); + + urj_tap_chain_shift_data_registers (chain, 0); + + return URJ_STATUS_OK; +} + +uint32_t +bfin_bus_read_end (urj_bus_t *bus) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + urj_chain_t *chain = bus->chain; + int i; + uint32_t d = 0; + + bfin_unselect_flash (bus); + + bfin_part_maybe_set_signal (part, params->are, 1, 1); + bfin_part_maybe_set_signal (part, params->awe, 1, 1); + bfin_part_maybe_set_signal (part, params->aoe, 1, 1); + + urj_tap_chain_shift_data_registers (chain, 1); + + for (i = 0; i < params->data_cnt; ++i) + d |= (uint32_t) (urj_part_get_signal (part, params->data[i]) << i); + + return d; +} + +uint32_t +bfin_bus_read_next (urj_bus_t *bus, uint32_t adr) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + urj_chain_t *chain = bus->chain; + int i; + uint32_t d = 0; + + bfin_setup_address (bus, adr); + urj_tap_chain_shift_data_registers (chain, 1); + + for (i = 0; i < params->data_cnt; ++i) + d |= (uint32_t) (urj_part_get_signal (part, params->data[i]) << i); + + return d; +} + +void +bfin_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data) +{ + bfin_bus_params_t *params = bus->params; + urj_part_t *part = bus->part; + urj_chain_t *chain = bus->chain; + + bfin_select_flash (bus, adr); + urj_part_set_signal (part, params->aoe, 1, 1); + urj_part_set_signal (part, params->are, 1, 1); + urj_part_set_signal (part, params->awe, 1, 1); + + bfin_setup_address (bus, adr); + bfin_setup_data (bus, data); + + urj_tap_chain_shift_data_registers (chain, 0); + + urj_part_set_signal (part, params->awe, 1, 0); + urj_tap_chain_shift_data_registers (chain, 0); + urj_part_set_signal (part, params->awe, 1, 1); + urj_part_set_signal (part, params->aoe, 1, 1); + bfin_unselect_flash (bus); + urj_tap_chain_shift_data_registers (chain, 0); +} + +void +bfin_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus) +{ + int i; + + for (i = 0; i < bus->chain->parts->len; i++) + if (bus->part == bus->chain->parts->parts[i]) + break; + + urj_log (ll, _("%s (JTAG part No. %d)\n"), bus->driver->description, i); +} diff --git a/urjtag/src/bus/blackfin.h b/urjtag/src/bus/blackfin.h new file mode 100644 index 00000000..97fdb5c4 --- /dev/null +++ b/urjtag/src/bus/blackfin.h @@ -0,0 +1,84 @@ +/* + * $Id$ + * + * Analog Devices unified Blackfin bus functions + * + * Copyright (C) 2008-2010 Analog Devices, Inc. + * Licensed under the GPL-2 or later. + */ + +#ifndef __BLACKFIN_BUS_H__ +#define __BLACKFIN_BUS_H__ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "buses.h" +#include "generic_bus.h" + +typedef struct { + uint32_t async_base, async_size; + + int ams_cnt, data_cnt, addr_cnt, abe_cnt; + urj_part_signal_t *ams[4], *data[32], *addr[32], *abe[4]; + urj_part_signal_t *aoe, *are, *awe; + + int sdram, sms_cnt; + urj_part_signal_t *scas, *sras, *swe, *sms[4]; + + void (*select_flash) (urj_bus_t *bus, uint32_t adr); + void (*unselect_flash) (urj_bus_t *bus); +} bfin_bus_params_t; + +int bfin_bus_new (urj_bus_t *bus); + +int bfin_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area); + +void bfin_select_flash (urj_bus_t *bus, uint32_t adr); + +void bfin_unselect_flash (urj_bus_t *bus); + +void bfin_setup_address (urj_bus_t *bus, uint32_t adr); + +void bfin_set_data_in (urj_bus_t *bus); + +void bfin_setup_data (urj_bus_t *bus, uint32_t data); + +int bfin_bus_read_start (urj_bus_t *bus, uint32_t adr); + +uint32_t bfin_bus_read_end (urj_bus_t *bus); + +uint32_t bfin_bus_read_next (urj_bus_t *bus, uint32_t adr); + +void bfin_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data); + +void bfin_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus); + +#define _BFIN_BUS_DECLARE(board, funcs, desc) \ +const urj_bus_driver_t urj_bus_##board##_bus = \ +{ \ + #board, \ + N_("Blackfin " desc " bus driver via BSR"), \ + funcs##_bus_new, \ + urj_bus_generic_free, \ + bfin_bus_printinfo, \ + urj_bus_generic_prepare_extest, \ + bfin_bus_area, \ + bfin_bus_read_start, \ + bfin_bus_read_next, \ + bfin_bus_read_end, \ + urj_bus_generic_read, \ + /*funcs##_bus_write,*/ bfin_bus_write, \ + urj_bus_generic_no_init \ +} +#define BFIN_BUS_DECLARE(board, desc) _BFIN_BUS_DECLARE(board, board, desc) + +#endif diff --git a/urjtag/src/bus/buses_list.h b/urjtag/src/bus/buses_list.h index 813136cb..3f1de892 100644 --- a/urjtag/src/bus/buses_list.h +++ b/urjtag/src/bus/buses_list.h @@ -39,43 +39,19 @@ _URJ_BUS(avr32) #ifdef ENABLE_BUS_BCM1250 _URJ_BUS(bcm1250) #endif -#ifdef ENABLE_BUS_BF518F_EZBRD +#ifdef ENABLE_BUS_BLACKFIN _URJ_BUS(bf518f_ezbrd) -#endif -#ifdef ENABLE_BUS_BF51X _URJ_BUS(bf51x) -#endif -#ifdef ENABLE_BUS_BF526_EZKIT _URJ_BUS(bf526_ezkit) -#endif -#ifdef ENABLE_BUS_BF527_EZKIT _URJ_BUS(bf527_ezkit) -#endif -#ifdef ENABLE_BUS_BF52X _URJ_BUS(bf52x) -#endif -#ifdef ENABLE_BUS_BF533_EZKIT _URJ_BUS(bf533_ezkit) -#endif -#ifdef ENABLE_BUS_BF533_STAMP _URJ_BUS(bf533_stamp) -#endif -#ifdef ENABLE_BUS_BF537_EZKIT _URJ_BUS(bf537_ezkit) -#endif -#ifdef ENABLE_BUS_BF537_STAMP _URJ_BUS(bf537_stamp) -#endif -#ifdef ENABLE_BUS_BF538F_EZKIT _URJ_BUS(bf538f_ezkit) -#endif -#ifdef ENABLE_BUS_BF53X _URJ_BUS(bf53x) -#endif -#ifdef ENABLE_BUS_BF548_EZKIT _URJ_BUS(bf548_ezkit) -#endif -#ifdef ENABLE_BUS_BF561_EZKIT _URJ_BUS(bf561_ezkit) #endif #ifdef ENABLE_BUS_BSCOACH