]> Universal JTAG library, server and tools KoljaWaschk Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation. A copy of the license is included in the section entitled "GNU Free Documentation License". 2007 2008 Kolja Waschk and the respective authors General
About UrJTAG UrJTAG Tools is a software package which enables working with JTAG-aware (IEEE 1149.1) hardware devices (parts) and boards through JTAG adapter. This package has open and modular architecture with ability to write miscellaneous extensions (like board testers, flash memory programmers, and so on). JTAG Tools package is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for JTAG Tools. Please read COPYING file for more info. Warning: This software may damage your hardware! Feedback and contributions are welcome.
UrJTAG Website The most current version of this documentation and UrJTAG sourcecode is always available from the project page at Sourceforge, http://urjtag.sourceforge.net
The name "UrJTAG" I (Kolja) favour short names, so I thought about adding only a few letters to "JTAG". The prefix "Ur" in German means "ancestral", an "Ur-Vater" is a forefather. UrJTAG shall become the forefather, the basis for many other JTAG tools.
Authors, contributors, ... thanks At the moment, please see the files AUTHORS and THANKS in the source distribution.
UrJTAG/openwince history The JTAG Tools originally were developed by Marcel Telka as part of the openwince project. Still a large portion of the source code is his work. However, the last release of the JTAG tools was version 0.5.1 in 2003. After a few years the development completely stalled. Every few months or so on the project's mailing list someone asked about continuing, but a critical mass wasn't reached before late 2007. A fork of the JTAG tools was created under the wings of the UrJTAG project at Sourceforge.
System requirements
Supported host operating systems JTAG Tools should run on all Unix like operating systems including MS Windows with Cygwin installed.
Required software for running UrJTAG More software is needed if you want to compile UrJTAG (which you probably want because currently no pre-compiled binaries are avaible...). See "For developers..." below. Required only for MS Windows: current Cygwin net installation from http://cygwin.com ioperm package (a part of the standard Cygwin net installation) Required for all systems: readline (it is probably a standard part of your distribution)
Supported JTAG adapters/cables See 'help cable' command for up-to-date info. Arcom JTAG Cable Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable Xilinx DLC5 JTAG Parallel Cable III ETC EA253 JTAG Cable ETC EI012 JTAG Cable Keith & Koep JTAG Cable Lattice Parallel Port JTAG Cable Mpcbdm JTAG Cable Ka-Ro TRITON (PXA255/250) JTAG Cable Macraigor Wiggler JTAG Cable
JTAG-aware parts (chips) Altera EP1C20F400 Altera EPM7128AETC100 Analog Devices Sharc-21065L Atmel ATmega128 (partial support) Broadcom BCM1250 Broadcom BCM3310 (partial support) Broadcom BCM5421S Broadcom BCM4712 (partial support) DEC SA1100 Hitachi HD64465 Hitachi SH7727 Hitachi SH7729 IBM PowerPC 440GX Intel IXP425 Intel SA1110 Intel PXA250/PXA255/PXA260/PXA261/PXA262/PXA263 Lattice LC4032V Lattice M4A3-64/32 Lattice M4A3-256/192 Motorola MPC8245 Samsung S3C4510B Sharp LH7A400 Toshiba TX4925/TX4926 Xilinx XC2C256-TQ144 Xilinx XCR3032XL-VQ44 Xilinx XCR3128XL-CS144 Xilinx XCR3128XL-VQ100 Xilinx XCR3256XL-FT256
Flash chips - Intel 28FxxxJ3A (28F320J3A, 28F640J3A, 28F128J3A) - Intel 28FxxxK3 (28F640K3, 28F128K3, 28F256K3) - Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18) - AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D) - AMD Am29xx040B (Am29F040B, Am29LV040B)
Installation
Required software for compiling UrJTAG
Installing from source tar.gz tar xzvf urjtag.tar.gz cd urjtag/include ./configure make make install cd ../jtag ./configure make make install
Installing from Subversion repository svn co http://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk urjtag cd urjtag/include ./autogen.sh # ./configure is run by autogen.sh make make install cd ../jtag ./autogen.sh # ./configure is run by autogen.sh make make install
Cygwin/MinGW specifics
Getting updates
Further info / support
Usage
Quick start
Run the software Connect your JTAG adapter between your PC and target device and turn on your device. To run JTAG Tools type "jtag" and press Enter. jtag should start and display some initial informations. Output should end with line like this: jtag> This is "jtag command prompt". Type "help" and press Enter for initial help about available commands. To exit JTAG Tools type "quit" and press Enter.
Configure the cable Type "help cable" for list of supported JTAG cables. Type "cable" command with arguments. Example: jtag> cable parallel 0x378 EA253 Initializing ETC EA253 JTAG Cable on parallel port at 0x378
Detect parts on the JTAG chain Type "detect" at the jtag command prompt: jtag> detect Your output should look like this: IR length: 5 Chain length: 1 Device Id: 01011001001001100100000000010011 Manufacturer: Intel Part: PXA250 Stepping: C0 Filename: /usr/local/share/jtag/intel/pxa250/pxa250c0 If you get empty output or an error message your JTAG adapter is not connected properly, or your target board doesn't work, or it is turned off. "detect" command is required before all other commands.
Print current JTAG chain status Type "print" at the jtag command prompt. Here is an output example: jtag> print chain No. Manufacturer Part Stepping Instruction Register --------------------------------------------------------------------------------------------- 0 Intel PXA250 C0 BYPASS BR jtag>
Sample device pin status jtag> instruction SAMPLE/PRELOAD jtag> shift ir jtag> shift dr jtag> dr 10001100100000100001100101111111111111111110011011100000111011111111111111111111 11111111111111111111111111111111111111111111101111111101100000100010101000000000 00011111000000111010111111100000100001100100000000000000000111000011100000000000 00000000000000000000000000000001000000000000000000000000000000000000000000000000 11110000000000000000000000000000000000000000001000000000000000000000000000000000 0000000000 jtag> print chain No. Manufacturer Part Stepping Instruction Register --------------------------------------------------------------------------------------------- 0 Intel PXA250 C0 SAMPLE/PRELOAD BSR jtag> get signal BOOT_SEL[0] BOOT_SEL[0] = 0 jtag> Note: BSR is "Boundary Scan Register"
Burn flash connected to the part jtag> flashmem 0 brux.b 0x00000000 Note: Supported configuration is 2 x 16 bit only BOOT_SEL: Asynchronous 32-bit ROM 2 x 16 bit CFI devices detected (QRY ok)! program: block 0 unlocked erasing block 0: 0 addr: 0x00002854 verify: addr: 0x00002854 Done. jtag> or: jtag> flashmem msbin xboot.bin Note: Supported configuration is 2 x 16 bit only BOOT_SEL: Asynchronous 32-bit ROM 2 x 16 bit CFI devices detected (QRY ok)! block 0 unlocked erasing block 0: 0 program: record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0 record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9 record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000 verify: record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0 record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9 record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000 Done. jtag>
Memory I/O
FPGA configuration
SVF Player
bsdl2jtag, data files
target specific documentation
EJTAG support
Blackfin support (when available)
For developers
Source code directory layout data/ ./include/ ../include/ libbrux/ cmd/ flash/ src/ bus/ cmd/ lib/ tap/ svf/
Internal structure
Parport drivers
Cable drivers
TAP drivers
Chain drivers
Bus drivers
Flash drivers
Commands
How to contribute
Use Subversion, stay up to date
Create and submit a patch
Use the SourceForge trackers
Frequently asked questions Q. When I type "cable parallel 0x378 DLC5" on Windows XP I get "Error: Cable initialization failed!". Where is the problem? A. Please install ioperm.sys driver using `ioperm -i` command. To run autogen.sh, you need autoconf and automake. Furthermore, libtool should be available. And if you plan to use any USB adapter with Linux, libusb-dev and probably libftdi-dev are a good choice (that are Debian package names; other distributions certainly have similar packages). Can't exec "autopoint": No such file or directory You need gettext-devel. svf_bison.y: No such file or directory You need "bison". flex: can't open ... src/svf/svf_flex.l You need "flex" "src/svf/svf_flex.l", line 27: unrecognized %option: bison-locations You need a newer version of flex. It should be 2.5.31 or newer, Unfortunately, Cygwin comes with only 2.5.4a. You may try to compile and install a newer version of flex from source to solve this. Future plans
API and library package
Bindings for Python, Perl, ...
TCP/IP access
New cable drivers
...
&datafilespecs; UrJTAG shell quick reference sheet man pages
jtag(1)
bsdl2jtag(1)
Exkurs: JTAG UrJTAG Revision information
UrJTAG 0.6
openwince JTAG Tools 0.5.1
&FDL; &GPL; &LGPL;