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254 lines
7.8 KiB
C
254 lines
7.8 KiB
C
/*
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* $Id$
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*
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* Copyright (C) 2002, 2003 ETC s.r.o.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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* 02111-1307, USA.
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*
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* Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
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*
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* Documentation:
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* [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
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* September 1999, Order Number: JESD68
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* [2] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
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* Application Note 646", April 2000, Order Number: 292204-004
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*
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <flash/cfi.h>
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#include <brux/cfi.h>
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#include <brux/bus.h>
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void
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cfi_array_free( cfi_array_t *cfi_array )
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{
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if (!cfi_array)
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return;
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if (cfi_array->cfi_chips) {
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int i;
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for (i = 0; i < cfi_array->bus_width; i++) {
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if (!cfi_array->cfi_chips[i])
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continue;
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free( cfi_array->cfi_chips[i]->cfi.device_geometry.erase_block_regions );
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free( cfi_array->cfi_chips[i] );
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}
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free( cfi_array->cfi_chips );
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}
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free( cfi_array );
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}
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int
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cfi_detect( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array )
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{
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unsigned int bw; /* bus width */
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unsigned int d; /* data offset */
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int ba; /* bus width address multiplier */
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int ma; /* flash mode address multiplier */
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if (!cfi_array || !bus)
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return -1; /* invalid parameters */
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*cfi_array = calloc( 1, sizeof (cfi_array_t) );
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if (!*cfi_array)
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return -2; /* out of memory */
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(*cfi_array)->bus = bus;
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(*cfi_array)->address = adr;
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bw = bus_width( bus, adr );
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if (bw != 8 && bw != 16 && bw != 32)
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return -3; /* invalid bus width */
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(*cfi_array)->bus_width = ba = bw / 8;
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(*cfi_array)->cfi_chips = calloc( ba, sizeof (cfi_chip_t *) );
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if (!(*cfi_array)->cfi_chips)
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return -2; /* out of memory */
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for (d = 0; d < bw; d += 8) {
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#define A(off) (adr + (off) * ba * ma)
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#define D(data) ((data) << d)
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#define gD(data) (((data) >> d) & 0xFF)
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#define read1(off) gD(bus_read( bus, A(off) ))
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#define read2(off) (bus_read_start( bus, A(off) ), gD(bus_read_next( bus, A(off + 1) )) | gD(bus_read_end( bus )) << 8)
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#define write1(off,data) bus_write( bus, A(off), D(data) )
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cfi_query_structure_t *cfi;
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uint32_t tmp;
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ma = 1;
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/* detect CFI capable devices - see Table 1 in [1] */
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write1( CFI_CMD_QUERY_OFFSET, CFI_CMD_QUERY );
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if (read1(CFI_QUERY_ID_OFFSET) != 'Q') {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -4; /* CFI not detected (Q) */
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}
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for (; ma <= 4; ma *= 2)
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if (read1(CFI_QUERY_ID_OFFSET + 1) == 'R')
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break;
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if (ma > 4) {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -5; /* CFI not detected (R) */
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}
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if (read1(CFI_QUERY_ID_OFFSET + 2) != 'Y') {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -6; /* CFI not detected (Y) */
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}
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(*cfi_array)->cfi_chips[d / 8] = calloc( 1, sizeof (cfi_chip_t) );
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if (!(*cfi_array)->cfi_chips[d / 8]) {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -2; /* out of memory */
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}
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cfi = &(*cfi_array)->cfi_chips[d / 8]->cfi;
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/* Identification string - see Table 6 in [1] */
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cfi->identification_string.pri_id_code = read2(PRI_VENDOR_ID_OFFSET);
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cfi->identification_string.pri_vendor_tbl = NULL;
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cfi->identification_string.alt_id_code = read2(ALT_VENDOR_ID_OFFSET);
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cfi->identification_string.alt_vendor_tbl = NULL;
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/* System interface information - see Table 7 in [1] */
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tmp = read1(VCC_MIN_WEV_OFFSET);
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cfi->system_interface_info.vcc_min_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
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tmp = read1(VCC_MAX_WEV_OFFSET);
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cfi->system_interface_info.vcc_max_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
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tmp = read1(VPP_MIN_WEV_OFFSET);
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cfi->system_interface_info.vpp_min_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
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tmp = read1(VPP_MAX_WEV_OFFSET);
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cfi->system_interface_info.vpp_max_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
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/* TODO: Add out of range checks for timeouts */
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tmp = read1(TYP_SINGLE_WRITE_TIMEOUT_OFFSET);
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cfi->system_interface_info.typ_single_write_timeout = tmp ? (1 << tmp) : 0;
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tmp = read1(TYP_BUFFER_WRITE_TIMEOUT_OFFSET);
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cfi->system_interface_info.typ_buffer_write_timeout = tmp ? (1 << tmp) : 0;
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tmp = read1(TYP_BLOCK_ERASE_TIMEOUT_OFFSET);
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cfi->system_interface_info.typ_block_erase_timeout = tmp ? (1 << tmp) : 0;
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tmp = read1(TYP_CHIP_ERASE_TIMEOUT_OFFSET);
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cfi->system_interface_info.typ_chip_erase_timeout = tmp ? (1 << tmp) : 0;
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tmp = read1(MAX_SINGLE_WRITE_TIMEOUT_OFFSET);
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cfi->system_interface_info.max_single_write_timeout =
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(tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_single_write_timeout;
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tmp = read1(MAX_BUFFER_WRITE_TIMEOUT_OFFSET);
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cfi->system_interface_info.max_buffer_write_timeout =
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(tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_buffer_write_timeout;
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tmp = read1(MAX_BLOCK_ERASE_TIMEOUT_OFFSET);
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cfi->system_interface_info.max_block_erase_timeout =
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(tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_block_erase_timeout;
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tmp = read1(MAX_CHIP_ERASE_TIMEOUT_OFFSET);
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cfi->system_interface_info.max_chip_erase_timeout =
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(tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_chip_erase_timeout;
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/* Device geometry - see Table 8 in [1] */
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/* TODO: Add out of range check */
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cfi->device_geometry.device_size = 1 << read1(DEVICE_SIZE_OFFSET);
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cfi->device_geometry.device_interface = read2(FLASH_DEVICE_INTERFACE_OFFSET);
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/* TODO: Add out of range check */
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cfi->device_geometry.max_bytes_write = 1 << read2(MAX_BYTES_WRITE_OFFSET);
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tmp = cfi->device_geometry.number_of_erase_regions = read1(NUMBER_OF_ERASE_REGIONS_OFFSET);
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cfi->device_geometry.erase_block_regions = malloc( tmp * sizeof (cfi_erase_block_region_t) );
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if (!cfi->device_geometry.erase_block_regions) {
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write1( 0, CFI_CMD_READ_ARRAY1 );
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return -2; /* out of memory */
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}
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{
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int a;
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int i;
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for (i = 0, a = ERASE_BLOCK_REGION_OFFSET; i < tmp; i++, a += 4) {
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uint32_t y = read2(a);
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uint32_t z = read2(a + 2) << 8;
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if (z == 0)
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z = 128;
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cfi->device_geometry.erase_block_regions[i].erase_block_size = z;
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cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks = y + 1;
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}
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}
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/* TODO: Intel Primary Algorithm Extended Query Table - see Table 5. in [2] */
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/* Read Array */
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write1( 0, CFI_CMD_READ_ARRAY1 );
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#undef A
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#undef D
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#undef gD
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#undef read1
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#undef read2
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#undef write1
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switch (cfi->device_geometry.device_interface) {
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case CFI_INTERFACE_X8:
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if (ma != 1)
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return -7; /* error in device detection */
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(*cfi_array)->cfi_chips[d / 8]->width = 1;
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break;
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case CFI_INTERFACE_X16:
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if (ma != 1)
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return -7; /* error in device detection */
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(*cfi_array)->cfi_chips[d / 8]->width = 2;
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d += 8;
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break;
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case CFI_INTERFACE_X8_X16:
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if (ma != 1 && ma != 2)
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return -7; /* error in device detection */
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(*cfi_array)->cfi_chips[d / 8]->width = 2 / ma;
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if (ma == 1)
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d += 8;
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break;
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case CFI_INTERFACE_X32:
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if (ma != 1)
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return -7; /* error in device detection */
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(*cfi_array)->cfi_chips[d / 8]->width = 4;
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d += 24;
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break;
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case CFI_INTERFACE_X16_X32:
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if (ma != 1 && ma != 2)
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return -7; /* error in device detection */
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(*cfi_array)->cfi_chips[d / 8]->width = 4 / ma;
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if (ma == 1)
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d += 24;
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else
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d += 8;
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break;
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default:
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return -7; /* error in device detection */
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}
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}
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return 0;
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}
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