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389 lines
10 KiB
C
389 lines
10 KiB
C
/*
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* $Id$
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*
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* Copyright (C) 2002 ETC s.r.o.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
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* 02111-1307, USA.
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*
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* Written by Marcel Telka <marcel@telka.sk>, 2002.
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*
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* Documentation:
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* [1] Advanced Micro Devices, "Common Flash Memory Interface Specification Release 2.0",
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* December 1, 2001
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* [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
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* Developer's Manual", February 2002, Order Number: 278522-001
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* [3] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
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* Application Note 646", April 2000, Order Number: 292204-004
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* [4] Advanced Micro Devices, "Common Flash Memory Interface Publication 100 Vendor & Device
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* ID Code Assignments", December 1, 2001, Volume Number: 96.1
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*
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <flash/cfi.h>
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#include <flash/intel.h>
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#include "part.h"
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#include "bus.h"
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int flash_erase_block( parts *ps, uint32_t adr );
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int flash_unlock_block( parts *ps, uint32_t adr );
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int flash_program( parts *ps, uint32_t adr, uint32_t data );
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int flash_erase_block32( parts *ps, uint32_t adr );
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int flash_unlock_block32( parts *ps, uint32_t adr );
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int flash_program32( parts *ps, uint32_t adr, uint32_t data );
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cfi_query_structure_t *detect_cfi( parts *ps );
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void
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flashmsbin( parts *ps, FILE *f )
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{
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part *p = ps->parts[0];
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int o = 0;
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uint32_t adr;
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cfi_query_structure_t *cfi;
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printf( "Note: Supported configuration is 2 x 16 bit only\n" );
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switch (bus_width( ps )) {
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case 16:
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o = 1;
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break;
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case 32:
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o = 2;
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break;
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default:
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printf( "Error: Unknown bus width!\n" );
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return;
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}
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/* EXTEST */
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part_set_instruction( p, "EXTEST" );
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parts_shift_instructions( ps );
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cfi = detect_cfi( ps );
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/* test sync bytes */
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{
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char sync[8];
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fread( &sync, sizeof (char), 7, f );
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sync[7] = '\0';
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if (strcmp( "B000FF\n", sync ) != 0) {
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printf( "Invalid sync sequence!\n" );
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return;
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}
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}
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/* erase memory blocks */
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{
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uint32_t start;
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uint32_t len;
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int first, last;
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fread( &start, sizeof start, 1, f );
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fread( &len, sizeof len, 1, f );
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first = start / (cfi->device_geometry.erase_block_regions[0].erase_block_size * 2);
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last = (start + len - 1) / (cfi->device_geometry.erase_block_regions[0].erase_block_size * 2);
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for (; first <= last; first++) {
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adr = first * cfi->device_geometry.erase_block_regions[0].erase_block_size * 2;
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flash_unlock_block32( ps, adr );
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printf( "block %d unlocked\n", first );
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printf( "erasing block %d: %d\n", first, flash_erase_block32( ps, adr ) );
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}
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}
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printf( "program:\n" );
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for (;;) {
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uint32_t a, l, c;
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fread( &a, sizeof a, 1, f );
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fread( &l, sizeof l, 1, f );
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fread( &c, sizeof c, 1, f );
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if (feof( f )) {
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printf( "Error: premature end of file\n" );
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return;
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}
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printf( "record: start = 0x%08X, len = 0x%08X, checksum = 0x%08X\n", a, l, c );
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if ((a == 0) && (c == 0))
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break;
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if (l & 3) {
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printf( "Error: Invalid record length!\n" );
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return;
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}
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while (l) {
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uint32_t data;
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printf( "addr: 0x%08X\r", a );
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fread( &data, sizeof data, 1, f );
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if (flash_program32( ps, a, data )) {
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printf( "\nflash error\n" );
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return;
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}
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a += 4;
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l -= 4;
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}
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}
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printf( "\n" );
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/* Read Array */
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bus_write( ps, 0 << o, 0x00FF00FF );
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fseek( f, 15, SEEK_SET );
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printf( "verify:\n" );
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for (;;) {
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uint32_t a, l, c;
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fread( &a, sizeof a, 1, f );
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fread( &l, sizeof l, 1, f );
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fread( &c, sizeof c, 1, f );
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if (feof( f )) {
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printf( "Error: premature end of file\n" );
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return;
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}
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printf( "record: start = 0x%08X, len = 0x%08X, checksum = 0x%08X\n", a, l, c );
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if ((a == 0) && (c == 0))
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break;
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if (l & 3) {
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printf( "Error: Invalid record length!\n" );
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return;
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}
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while (l) {
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uint32_t data, readed;
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printf( "addr: 0x%08X\r", a );
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fread( &data, sizeof data, 1, f );
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readed = bus_read( ps, a );
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if (data != readed) {
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printf( "\nverify error: 0x%08X vs. 0x%08X\n", readed, data );
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return;
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}
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a += 4;
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l -= 4;
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}
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}
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printf( "\n" );
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printf( "Done.\n" );
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}
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void
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flashmem( parts *ps, FILE *f, uint32_t addr )
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{
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part *p = ps->parts[0];
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int o = 0;
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uint32_t adr;
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cfi_query_structure_t *cfi;
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int *erased;
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int i;
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printf( "Note: Supported configuration is 2 x 16 bit only\n" );
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switch (bus_width( ps )) {
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case 16:
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o = 1;
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break;
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case 32:
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o = 2;
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break;
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default:
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printf( "Error: Unknown bus width!\n" );
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return;
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}
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/* EXTEST */
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part_set_instruction( p, "EXTEST" );
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parts_shift_instructions( ps );
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cfi = detect_cfi( ps );
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erased = malloc( cfi->device_geometry.erase_block_regions[0].number_of_erase_blocks * sizeof *erased );
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if (!erased) {
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printf( "Out of memory!\n" );
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return;
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}
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for (i = 0; i < cfi->device_geometry.erase_block_regions[0].number_of_erase_blocks; i++)
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erased[i] = 0;
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printf( "program:\n" );
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adr = addr;
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while (!feof( f )) {
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uint32_t data;
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int block_no = adr / (cfi->device_geometry.erase_block_regions[0].erase_block_size * 2);
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printf( "addr: 0x%08X\r", adr );
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if (!erased[block_no]) {
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flash_unlock_block32( ps, adr );
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printf( "block %d unlocked\n", block_no );
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printf( "erasing block %d: %d\n", block_no, flash_erase_block32( ps, adr ) );
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erased[block_no] = 1;
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}
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fread( &data, sizeof data, 1, f );
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if (flash_program32( ps, adr, data )) {
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printf( "\nflash error\n" );
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return;
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}
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adr += 4;
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}
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printf( "\n" );
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/* Read Array */
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bus_write( ps, 0 << o, 0x00FF00FF );
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fseek( f, 0, SEEK_SET );
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printf( "verify:\n" );
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adr = addr;
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while (!feof( f )) {
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uint32_t data;
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uint32_t readed;
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printf( "addr: 0x%08X\r", adr );
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fread( &data, sizeof data, 1, f );
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readed = bus_read( ps, adr );
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if (data != readed) {
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printf( "\nverify error: 0x%08X vs. 0x%08X\n", readed, data );
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return;
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}
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adr += 4;
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}
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printf( "\nDone.\n" );
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free( erased );
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}
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#define CFI_INTEL_ERROR_UNKNOWN 1
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#define CFI_INTEL_ERROR_UNSUPPORTED 2
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#define CFI_INTEL_ERROR_LOW_VPEN 3
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#define CFI_INTEL_ERROR_BLOCK_LOCKED 4
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#define CFI_INTEL_ERROR_INVALID_COMMAND_SEQUENCE 5
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int
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flash_erase_block( parts *ps, uint32_t adr )
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{
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uint16_t sr;
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bus_write( ps, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
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bus_write( ps, adr, CFI_INTEL_CMD_BLOCK_ERASE );
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bus_write( ps, adr, CFI_INTEL_CMD_CONFIRM );
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while (!((sr = bus_read( ps, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
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switch (sr & ~CFI_INTEL_SR_READY) {
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case 0:
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return 0;
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case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_PROGRAM_ERROR:
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return CFI_INTEL_ERROR_INVALID_COMMAND_SEQUENCE;
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case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_VPEN_ERROR:
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return CFI_INTEL_ERROR_LOW_VPEN;
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case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_BLOCK_LOCKED:
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return CFI_INTEL_ERROR_BLOCK_LOCKED;
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default:
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break;
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}
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return CFI_INTEL_ERROR_UNKNOWN;
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}
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int
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flash_unlock_block( parts *ps, uint32_t adr )
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{
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uint16_t sr;
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bus_write( ps, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
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bus_write( ps, adr, CFI_INTEL_CMD_LOCK_SETUP );
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bus_write( ps, adr, CFI_INTEL_CMD_UNLOCK_BLOCK );
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while (!((sr = bus_read( ps, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
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if (sr != CFI_INTEL_SR_READY)
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return CFI_INTEL_ERROR_UNKNOWN;
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else
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return 0;
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}
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int
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flash_program( parts *ps, uint32_t adr, uint32_t data )
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{
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uint16_t sr;
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bus_write( ps, 0, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
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bus_write( ps, adr, CFI_INTEL_CMD_PROGRAM1 );
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bus_write( ps, adr, data );
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while (!((sr = bus_read( ps, 0 ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
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if (sr != CFI_INTEL_SR_READY)
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return CFI_INTEL_ERROR_UNKNOWN;
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else
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return 0;
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}
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int
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flash_erase_block32( parts *ps, uint32_t adr )
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{
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uint32_t sr;
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bus_write( ps, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
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bus_write( ps, adr, (CFI_INTEL_CMD_BLOCK_ERASE << 16) | CFI_INTEL_CMD_BLOCK_ERASE );
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bus_write( ps, adr, (CFI_INTEL_CMD_CONFIRM << 16) | CFI_INTEL_CMD_CONFIRM );
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while (((sr = bus_read( ps, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
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if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
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printf( "\nsr = 0x%08X\n", sr );
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return CFI_INTEL_ERROR_UNKNOWN;
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} else
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return 0;
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}
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int
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flash_unlock_block32( parts *ps, uint32_t adr )
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{
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uint32_t sr;
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bus_write( ps, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
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bus_write( ps, adr, (CFI_INTEL_CMD_LOCK_SETUP << 16) | CFI_INTEL_CMD_LOCK_SETUP );
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bus_write( ps, adr, (CFI_INTEL_CMD_UNLOCK_BLOCK << 16) | CFI_INTEL_CMD_UNLOCK_BLOCK );
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while (((sr = bus_read( ps, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
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if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
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printf( "\nsr = 0x%08X\n", sr );
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return CFI_INTEL_ERROR_UNKNOWN;
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} else
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return 0;
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}
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int
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flash_program32( parts *ps, uint32_t adr, uint32_t data )
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{
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uint32_t sr;
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bus_write( ps, 0, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
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bus_write( ps, adr, (CFI_INTEL_CMD_PROGRAM1 << 16) | CFI_INTEL_CMD_PROGRAM1 );
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bus_write( ps, adr, data );
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while (((sr = bus_read( ps, 0 ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
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if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
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printf( "\nsr = 0x%08X\n", sr );
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return CFI_INTEL_ERROR_UNKNOWN;
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} else
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return 0;
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}
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