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14 MiB
C 73.7%
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Yacc 4.1%
VHDL 2.6%
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Marcel Telka f22a0ee97f Added missing register offsets and bits for MISR and MODR. 
git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@145 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
 		23 years ago
include Added missing register offsets and bits for MISR and MODR. 23 years ago
jtag Added parts initialization after `detect'. Added commands `instruction' and `shift'. 23 years ago