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Add more Blackfin data and bus drivers (urjtag-add-bf537-bf548-bf561.diff from Jie Zhang, [1830901] Merge Blackfin support)

Browse Source 
git-svn-id: https://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk@1010 b68d4a1b-bc3d-0410-92ed-d4ac073336b7
master
Kolja Waschk 17 years ago
parent bdeb6e66ea
commit 1ab5f44f68
16 changed files with 3389 additions and 1 deletions
Show Stats Download Patch File Download Diff File

24
jtag/ChangeLog
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@ -1,3 +1,27 @@
008-02-14 Jie Zhang <jie.zhang@analog.com>
* src/bus/bf537_stamp.c: New.
* src/bus/bf548_ezkit.c: New.
* src/bus/bf561_ezkit.c: New.
* src/bus/buses.c (bus_drivers): Add bf537_stamp_bus,
bf537_ezkit_bus, and bf561_ezkit_bus.
* src/bus/buses.h: Declare bf537_stamp_bus, bf537_ezkit_bus,
and bf561_ezkit_bus.
* src/bus/Makefile.am (libbus_a_SOURCES): Add bf537_stamp.c,
bf548_ezkit.c, and bf561_ezkit.c.
* data/analog/bf533/STEPPINGS: Add stepping 4.
* data/analog/bf537/bf537: New.
* data/analog/bf537/STEPPINGS: New.
* data/analog/bf549/bf549: New.
* data/analog/bf549/STEPPINGS: New.
* data/analog/bf561/bf561: New.
* data/analog/bf561/STEPPINGS: New.
* data/analog/PARTS: Add bf537, bf549, and bf561.
* data/Makefile.am (nobase_dist_pkgdata_DATA): Add
analog/bf537/STEPPINGS, analog/bf537/bf537,
analog/bf549/STEPPINGS, analog/bf549/bf549,
and analog/bf561/STEPPINGS, analog/bf561/bf561.
2008-02-13 Arnim Laeuger <arniml@users.sourceforge.net>
* src/tap/cable/ft2232.c: implemented control of TRST

6
jtag/data/Makefile.am
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@ -57,6 +57,12 @@ nobase_dist_pkgdata_DATA = \
analog/PARTS \
analog/bf533/STEPPINGS \
analog/bf533/bf533 \
analog/bf537/STEPPINGS \
analog/bf537/bf537 \
analog/bf549/STEPPINGS \
analog/bf549/bf549 \
analog/bf561/STEPPINGS \
analog/bf561/bf561 \
analog/PARTS \
analog/sharc21065l/STEPPINGS \
analog/sharc21065l/sharc21065l \

5
jtag/data/analog/PARTS
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@ -20,5 +20,8 @@
#
# bits 27-12 of the Device Identification Register
0010011110100111 sharc21065l SHARC
0010011110100111 sharc21065l SHARC
0010011110100101 bf533 BF533
0010011111001000 bf537 BF537
0010011111011110 bf549 BF549
0010011110111011 bf561 BF561

1
jtag/data/analog/bf533/STEPPINGS
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@ -24,3 +24,4 @@
0001 bf533 1
0010 bf533 2
0011 bf533 3
0100 bf533 4

25
jtag/data/analog/bf537/STEPPINGS
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#
# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 31-28 of the Device Identification Register
0000 bf537 0
0001 bf537 1
0010 bf537 2

454
jtag/data/analog/bf537/bf537
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signal ADDR1
signal ADDR2
signal ADDR3
signal ADDR4
signal ADDR5
signal ADDR6
signal ADDR7
signal ADDR8
signal ADDR9
signal ADDR10
signal ADDR11
signal ADDR12
signal ADDR13
signal ADDR14
signal ADDR15
signal ADDR16
signal ADDR17
signal ADDR18
signal ADDR19
signal AMS_B0
signal AMS_B1
signal AMS_B2
signal AMS_B3
signal AOE_B
signal ARDY
signal ARE_B
signal AWE_B
signal ABE_B0
signal ABE_B1
signal BG_B
signal BGH_B
signal BMODE0
signal BMODE1
signal BMODE2
signal BR_B
signal DATA0
signal DATA1
signal DATA2
signal DATA3
signal DATA4
signal DATA5
signal DATA6
signal DATA7
signal DATA8
signal DATA9
signal DATA10
signal DATA11
signal DATA12
signal DATA13
signal DATA14
signal DATA15
signal NMI
signal PF0
signal PF1
signal PF2
signal PF3
signal PF4
signal PF5
signal PF6
signal PF7
signal PF8
signal PF9
signal PF10
signal PF11
signal PF12
signal PF13
signal PF14
signal PF15
signal PG0
signal PG1
signal PG2
signal PG3
signal PG4
signal PG5
signal PG6
signal PG7
signal PG8
signal PG9
signal PG10
signal PG11
signal PG12
signal PG13
signal PG14
signal PG15
signal PH0
signal PH1
signal PH2
signal PH3
signal PH4
signal PH5
signal PH6
signal PH7
signal PH8
signal PH9
signal PH10
signal PH11
signal PH12
signal PH13
signal PH14
signal PH15
signal PJ0
signal PJ1
signal PJ2
signal PJ3
signal PJ4
signal PJ5
signal PJ6
signal PJ7
signal PJ8
signal PJ9
signal PJ10
signal PJ11
signal RESET_B
signal CLKOUT
signal SA10
signal SCAS_B
signal SCKE
signal SMS_B
signal SRAS_B
signal SWE_B
signal TDI
signal TDO
signal TCK
signal TMS
signal TRST_B
signal TEST
signal EMU_B
signal RTXI
signal RTXO
signal VDD_INT0
signal VDD_INT1
signal VDD_INT2
signal VDD_INT3
signal VDD_INT4
signal VDD_INT5
signal VDD_INT6
signal VDD_EXT0
signal VDD_EXT1
signal VDD_EXT2
signal VDD_EXT3
signal VDD_EXT4
signal VDD_EXT5
signal VDD_EXT6
signal VDD_EXT7
signal VDD_EXT8
signal VDD_EXT9
signal VDD_EXT10
signal VDD_EXT11
signal VDD_EXT12
signal VDD_EXT13
signal VDD_EXT14
signal VDD_EXT15
signal GND0
signal GND1
signal GND2
signal GND3
signal GND4
signal GND5
signal GND6
signal GND7
signal GND8
signal GND9
signal GND10
signal GND11
signal GND12
signal GND13
signal GND14
signal GND15
signal GND16
signal GND17
signal GND18
signal GND19
signal GND20
signal GND21
signal GND22
signal GND23
signal VDD_RTC
signal CLKIN
signal XTAL
signal CLKBUF
signal VROUT0
register BSR 261
register BR 1
register DIR 32
instruction length 5
instruction BYPASS 11111 BR
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
instruction IDCODE 00010 DIR
bit 260 C 0 *
bit 259 O 1 DATA0 260 0 Z
bit 258 I 1 DATA0
bit 257 O 1 DATA1 260 0 Z
bit 256 I 1 DATA1
bit 255 O 1 DATA2 260 0 Z
bit 254 I 1 DATA2
bit 253 O 1 DATA3 260 0 Z
bit 252 I 1 DATA3
bit 251 O 1 DATA4 260 0 Z
bit 250 I 1 DATA4
bit 249 O 1 DATA5 260 0 Z
bit 248 I 1 DATA5
bit 247 O 1 DATA6 260 0 Z
bit 246 I 1 DATA6
bit 245 O 1 DATA7 260 0 Z
bit 244 I 1 DATA7
bit 243 O 1 DATA8 260 0 Z
bit 242 I 1 DATA8
bit 241 O 1 DATA9 260 0 Z
bit 240 I 1 DATA9
bit 239 O 1 DATA10 260 0 Z
bit 238 I 1 DATA10
bit 237 O 1 DATA11 260 0 Z
bit 236 I 1 DATA11
bit 235 O 1 DATA12 260 0 Z
bit 234 I 1 DATA12
bit 233 O 1 DATA13 260 0 Z
bit 232 I 1 DATA13
bit 231 O 1 DATA14 260 0 Z
bit 230 I 1 DATA14
bit 229 O 1 DATA15 260 0 Z
bit 228 I 1 DATA15
bit 227 I 1 TEST
bit 226 I 1 BMODE0
bit 225 I 1 BMODE1
bit 224 I 1 BMODE2
bit 223 C 0 *
bit 222 O 1 PF0 223 0 Z
bit 221 I 1 PF0
bit 220 C 0 *
bit 219 O 1 PF1 220 0 Z
bit 218 I 1 PF1
bit 217 C 0 *
bit 216 O 1 PF2 217 0 Z
bit 215 I 1 PF2
bit 214 C 0 *
bit 213 O 1 PF3 214 0 Z
bit 212 I 1 PF3
bit 211 C 0 *
bit 210 O 1 PF4 211 0 Z
bit 209 I 1 PF4
bit 208 C 0 *
bit 207 O 1 PF5 208 0 Z
bit 206 I 1 PF5
bit 205 C 0 *
bit 204 O 1 PF6 205 0 Z
bit 203 I 1 PF6
bit 202 C 0 *
bit 201 O 1 PF7 202 0 Z
bit 200 I 1 PF7
bit 199 C 0 *
bit 198 O 1 PF8 199 0 Z
bit 197 I 1 PF8
bit 196 C 0 *
bit 195 O 1 PF9 196 0 Z
bit 194 I 1 PF9
bit 193 C 0 *
bit 192 O 1 PF10 193 0 Z
bit 191 I 1 PF10
bit 190 C 0 *
bit 189 O 1 PF11 190 0 Z
bit 188 I 1 PF11
bit 187 C 0 *
bit 186 O 1 PF12 187 0 Z
bit 185 I 1 PF12
bit 184 C 0 *
bit 183 O 1 PF13 184 0 Z
bit 182 I 1 PF13
bit 181 C 0 *
bit 180 O 1 PF14 181 0 Z
bit 179 I 1 PF14
bit 178 C 0 *
bit 177 O 1 PF15 178 0 Z
bit 176 I 1 PF15
bit 175 C 0 *
bit 174 O 1 PG0 175 0 Z
bit 173 I 1 PG0
bit 172 C 0 *
bit 171 O 1 PG1 172 0 Z
bit 170 I 1 PG1
bit 169 C 0 *
bit 168 O 1 PG2 169 0 Z
bit 167 I 1 PG2
bit 166 C 0 *
bit 165 O 1 PG3 166 0 Z
bit 164 I 1 PG3
bit 163 C 0 *
bit 162 O 1 PG4 163 0 Z
bit 161 I 1 PG4
bit 160 C 0 *
bit 159 O 1 PG5 160 0 Z
bit 158 I 1 PG5
bit 157 C 0 *
bit 156 O 1 PG6 157 0 Z
bit 155 I 1 PG6
bit 154 C 0 *
bit 153 O 1 PG7 154 0 Z
bit 152 I 1 PG7
bit 151 C 0 *
bit 150 O 1 PG10 151 0 Z
bit 149 I 1 PG10
bit 148 C 0 *
bit 147 O 1 PG11 148 0 Z
bit 146 I 1 PG11
bit 145 C 0 *
bit 144 O 1 PG12 145 0 Z
bit 143 I 1 PG12
bit 142 C 0 *
bit 141 O 1 PG8 142 0 Z
bit 140 I 1 PG8
bit 139 C 0 *
bit 138 O 1 PG9 139 0 Z
bit 137 I 1 PG9
bit 136 C 0 *
bit 135 O 1 PG13 136 0 Z
bit 134 I 1 PG13
bit 133 C 0 *
bit 132 O 1 PG14 133 0 Z
bit 131 I 1 PG14
bit 130 C 0 *
bit 129 O 1 PG15 130 0 Z
bit 128 I 1 PG15
bit 127 C 0 *
bit 126 O 1 PH0 127 0 Z
bit 125 I 1 PH0
bit 124 C 0 *
bit 123 O 1 PH1 124 0 Z
bit 122 I 1 PH1
bit 121 C 0 *
bit 120 O 1 PH2 121 0 Z
bit 119 I 1 PH2
bit 118 C 0 *
bit 117 O 1 PH3 118 0 Z
bit 116 I 1 PH3
bit 115 C 0 *
bit 114 O 1 PH4 115 0 Z
bit 113 I 1 PH4
bit 112 C 0 *
bit 111 O 1 PH5 112 0 Z
bit 110 I 1 PH5
bit 109 C 0 *
bit 108 O 1 PH6 109 0 Z
bit 107 I 1 PH6
bit 106 C 0 *
bit 105 O 1 PH7 106 0 Z
bit 104 I 1 PH7
bit 103 C 0 *
bit 102 O 1 PH8 103 0 Z
bit 101 I 1 PH8
bit 100 C 0 *
bit 99 O 1 PH9 100 0 Z
bit 98 I 1 PH9
bit 97 C 0 *
bit 96 O 1 PH10 97 0 Z
bit 95 I 1 PH10
bit 94 C 0 *
bit 93 O 1 PH11 94 0 Z
bit 92 I 1 PH11
bit 91 C 0 *
bit 90 O 1 PH12 91 0 Z
bit 89 I 1 PH12
bit 88 C 0 *
bit 87 O 1 PH13 88 0 Z
bit 86 I 1 PH13
bit 85 C 0 *
bit 84 O 1 PH14 85 0 Z
bit 83 I 1 PH14
bit 82 C 0 *
bit 81 O 1 PH15 82 0 Z
bit 80 I 1 PH15
bit 79 C 0 *
bit 78 O 1 PJ0 79 0 Z
bit 77 I 1 PJ0
bit 76 C 0 *
bit 75 O 1 PJ1 76 0 Z
bit 74 I 1 PJ1
bit 73 C 0 *
bit 72 O 1 PJ6 73 0 Z
bit 71 I 1 PJ6
bit 70 C 0 *
bit 69 O 1 PJ7 70 0 Z
bit 68 I 1 PJ7
bit 67 C 0 *
bit 66 O 1 PJ8 67 0 Z
bit 65 I 1 PJ8
bit 64 C 0 *
bit 63 O 1 PJ4 64 0 Z
bit 62 I 1 PJ4
bit 61 C 0 *
bit 60 O 1 PJ5 61 0 Z
bit 59 I 1 PJ5
bit 58 C 0 *
bit 57 O 1 PJ9 58 0 Z
bit 56 I 1 PJ9
bit 55 C 0 *
bit 54 O 1 PJ10 55 0 Z
bit 53 I 1 PJ10
bit 52 C 0 *
bit 51 O 1 PJ11 52 0 Z
bit 50 I 1 PJ11
bit 49 C 0 *
bit 48 O 1 PJ2 49 0 Z
bit 47 I 1 PJ2
bit 46 C 0 *
bit 45 O 1 PJ3 46 0 Z
bit 44 I 1 PJ3
bit 43 I 1 NMI
bit 42 I 1 RESET_B
bit 41 O 1 SCKE 39 0 Z
bit 40 O 1 SMS_B 39 0 Z
bit 39 C 0 *
bit 38 O 1 CLKOUT 39 0 Z
bit 37 O 1 SRAS_B 39 0 Z
bit 36 O 1 SCAS_B 39 0 Z
bit 35 O 1 SWE_B 39 0 Z
bit 34 O 1 SA10 39 0 Z
bit 33 I 1 BR_B
bit 32 I 1 ARDY
bit 31 O 1 AMS_B0 27 0 Z
bit 30 O 1 AMS_B1 27 0 Z
bit 29 O 1 AMS_B2 27 0 Z
bit 28 O 1 AMS_B3 27 0 Z
bit 27 C 0 *
bit 26 O 1 AOE_B 27 0 Z
bit 25 O 1 ARE_B 27 0 Z
bit 24 O 1 AWE_B 27 0 Z
bit 23 O 1 ABE_B0 17 0 Z
bit 22 O 1 ABE_B1 17 0 Z
bit 21 O 1 ADDR1 17 0 Z
bit 20 O 1 ADDR2 17 0 Z
bit 19 O 1 ADDR3 17 0 Z
bit 18 O 1 ADDR4 17 0 Z
bit 17 C 0 *
bit 16 O 1 ADDR5 17 0 Z
bit 15 O 1 ADDR6 17 0 Z
bit 14 O 1 ADDR7 17 0 Z
bit 13 O 1 ADDR8 17 0 Z
bit 12 O 1 ADDR9 17 0 Z
bit 11 O 1 ADDR10 17 0 Z
bit 10 O 1 ADDR11 17 0 Z
bit 9 O 1 ADDR12 17 0 Z
bit 8 O 1 ADDR13 17 0 Z
bit 7 O 1 ADDR14 17 0 Z
bit 6 O 1 ADDR15 17 0 Z
bit 5 O 1 ADDR16 17 0 Z
bit 4 O 1 ADDR17 17 0 Z
bit 3 O 1 ADDR18 17 0 Z
bit 2 O 1 ADDR19 17 0 Z
bit 1 O 1 BGH_B
bit 0 O 1 BG_B

24
jtag/data/analog/bf549/STEPPINGS
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#
# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 31-28 of the Device Identification Register
0000 bf549 0
0001 bf549 1

1047
jtag/data/analog/bf549/bf549
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25
jtag/data/analog/bf561/STEPPINGS
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#
# $Id: STEPPINGS 82 2006-11-06 04:22:52Z jiez $
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
# 02111-1307, USA.
#
# Written by Richard Klingler <richard@klingler.net>
#
# bits 31-28 of the Device Identification Register
0010 bf561 2
0011 bf561 3
0101 bf561 5

600
jtag/data/analog/bf561/bf561
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signal ADDR2
signal ADDR3
signal ADDR4
signal ADDR5
signal ADDR6
signal ADDR7
signal ADDR8
signal ADDR9
signal ADDR10
signal ADDR11
signal ADDR12
signal ADDR13
signal ADDR14
signal ADDR15
signal ADDR16
signal ADDR17
signal ADDR18
signal ADDR19
signal ADDR20
signal ADDR21
signal ADDR22
signal ADDR23
signal ADDR24
signal ADDR25
signal DATA0
signal DATA1
signal DATA2
signal DATA3
signal DATA4
signal DATA5
signal DATA6
signal DATA7
signal DATA8
signal DATA9
signal DATA10
signal DATA11
signal DATA12
signal DATA13
signal DATA14
signal DATA15
signal DATA16
signal DATA17
signal DATA18
signal DATA19
signal DATA20
signal DATA21
signal DATA22
signal DATA23
signal DATA24
signal DATA25
signal DATA26
signal DATA27
signal DATA28
signal DATA29
signal DATA30
signal DATA31
signal AMS_B0
signal AMS_B1
signal AMS_B2
signal AMS_B3
signal AOE_B
signal ARDY
signal ARE_B
signal AWE_B
signal ABE_B0
signal ABE_B1
signal ABE_B2
signal ABE_B3
signal BG_B
signal BGH_B
signal BMODE0
signal BMODE1
signal BR_B
signal BY_PASS
signal PPI1_DATA0
signal PPI1_DATA1
signal PPI1_DATA2
signal PPI1_DATA3
signal PPI1_DATA4
signal PPI1_DATA5
signal PPI1_DATA6
signal PPI1_DATA7
signal PPI1_DATA8
signal PPI1_DATA9
signal PPI1_DATA10
signal PPI1_DATA11
signal PPI1_DATA12
signal PPI1_DATA13
signal PPI1_DATA14
signal PPI1_DATA15
signal PPI2_DATA0
signal PPI2_DATA1
signal PPI2_DATA2
signal PPI2_DATA3
signal PPI2_DATA4
signal PPI2_DATA5
signal PPI2_DATA6
signal PPI2_DATA7
signal PPI2_DATA8
signal PPI2_DATA9
signal PPI2_DATA10
signal PPI2_DATA11
signal PPI2_DATA12
signal PPI2_DATA13
signal PPI2_DATA14
signal PPI2_DATA15
signal DR0PRI
signal DR0SEC
signal DR1PRI
signal DR1SEC
signal DT0PRI
signal DT0SEC
signal DT1PRI
signal DT1SEC
signal MISO
signal MOSI
signal NMI_0
signal NMI_1
signal PF0
signal PF1
signal PF2
signal PF3
signal PF4
signal PF5
signal PF6
signal PF7
signal PF8
signal PF9
signal PF10
signal PF11
signal PF12
signal PF13
signal PF14
signal PF15
signal RESET_B
signal RFS0
signal RFS1
signal RSCLK0
signal RSCLK1
signal TSCLK0
signal TSCLK1
signal RX
signal TX
signal SA10
signal SCAS_B
signal SCK
signal SCKE
signal SLEEP
signal SMS_B0
signal SMS_B1
signal SMS_B2
signal SMS_B3
signal SRAS_B
signal SWE_B
signal SCLK0
signal SCLK1
signal TCK
signal TDI
signal TDO
signal TMS
signal TRST_B
signal EMU_B
signal TEST
signal TFS0
signal TFS1
signal PPI1_CLK
signal PPI2_CLK
signal PPI1_SYNC1
signal PPI1_SYNC2
signal PPI1_SYNC3
signal PPI2_SYNC1
signal PPI2_SYNC2
signal PPI2_SYNC3
signal VDD_INT0
signal VDD_INT1
signal VDD_INT2
signal VDD_INT3
signal VDD_INT4
signal VDD_INT5
signal VDD_INT6
signal VDD_INT7
signal VDD_INT8
signal GND_INT0
signal GND_INT1
signal GND_INT2
signal GND_INT3
signal GND_INT4
signal GND_INT5
signal GND_INT6
signal VDD_EXT0
signal VDD_EXT1
signal VDD_EXT2
signal VDD_EXT3
signal VDD_EXT4
signal VDD_EXT5
signal VDD_EXT6
signal VDD_EXT7
signal VDD_EXT8
signal VDD_EXT9
signal VDD_EXT10
signal VDD_EXT11
signal VDD_EXT12
signal VDD_EXT13
signal VDD_EXT14
signal VDD_EXT15
signal VDD_EXT16
signal VDD_EXT17
signal VDD_EXT18
signal CLKIN
signal XTAL
signal VREF_FLT
signal VREG
signal PSMON_VDD
signal PSMON_GND
signal GND_EXT0
signal GND_EXT1
signal GND_EXT2
signal GND_EXT3
signal GND_EXT4
signal GND_EXT5
signal GND_EXT6
signal GND_EXT7
signal GND_EXT8
signal GND_EXT9
signal GND_EXT10
signal GND_EXT11
signal GND_EXT12
signal GND_EXT13
signal GND_EXT14
signal GND_EXT15
signal GND_EXT16
signal GND_EXT17
signal GND_EXT18
register BSR 355
register BR 1
register DIR 32
instruction length 5
instruction BYPASS 11111 BR
instruction EXTEST 00000 BSR
instruction SAMPLE/PRELOAD 10000 BSR
instruction IDCODE 00010 DIR
bit 354 I 1 TEST
bit 353 I 1 BMODE1
bit 352 I 1 BMODE0
bit 351 O 1 SLEEP
bit 350 I 1 NMI_0
bit 349 C 0 *
bit 348 O 1 MISO 349 0 Z
bit 347 I 1 MISO
bit 346 C 0 *
bit 345 O 1 MOSI 346 0 Z
bit 344 I 1 MOSI
bit 343 C 0 *
bit 342 O 1 SCK 343 0 Z
bit 341 I 1 SCK
bit 340 C 0 *
bit 339 O 1 RX 340 0 Z
bit 338 I 1 RX
bit 337 C 0 *
bit 336 O 1 TX 337 0 Z
bit 335 I 1 TX
bit 334 C 0 *
bit 333 O 1 RSCLK1 334 0 Z
bit 332 I 1 RSCLK1
bit 331 C 0 *
bit 330 O 1 RFS1 331 0 Z
bit 329 I 1 RFS1
bit 328 C 0 *
bit 327 O 1 DR1SEC 328 0 Z
bit 326 I 1 DR1SEC
bit 325 C 0 *
bit 324 O 1 DR1PRI 325 0 Z
bit 323 I 1 DR1PRI
bit 322 C 0 *
bit 321 O 1 TSCLK1 322 0 Z
bit 320 I 1 TSCLK1
bit 319 C 0 *
bit 318 O 1 TFS1 319 0 Z
bit 317 I 1 TFS1
bit 316 C 0 *
bit 315 O 1 DT1SEC 316 0 Z
bit 314 I 1 DT1SEC
bit 313 C 0 *
bit 312 O 1 DT1PRI 313 0 Z
bit 311 I 1 DT1PRI
bit 310 C 0 *
bit 309 O 1 RSCLK0 310 0 Z
bit 308 I 1 RSCLK0
bit 307 C 0 *
bit 306 O 1 RFS0 307 0 Z
bit 305 I 1 RFS0
bit 304 C 0 *
bit 303 O 1 DR0SEC 304 0 Z
bit 302 I 1 DR0SEC
bit 301 C 0 *
bit 300 O 1 DR0PRI 301 0 Z
bit 299 I 1 DR0PRI
bit 298 C 0 *
bit 297 O 1 TSCLK0 298 0 Z
bit 296 I 1 TSCLK0
bit 295 C 0 *
bit 294 O 1 TFS0 295 0 Z
bit 293 I 1 TFS0
bit 292 C 0 *
bit 291 O 1 DT0SEC 292 0 Z
bit 290 I 1 DT0SEC
bit 289 C 0 *
bit 288 O 1 DT0PRI 289 0 Z
bit 287 I 1 DT0PRI
bit 286 O 1 DATA31 254 0 Z
bit 285 I 1 DATA31
bit 284 O 1 DATA30 254 0 Z
bit 283 I 1 DATA30
bit 282 O 1 DATA29 254 0 Z
bit 281 I 1 DATA29
bit 280 O 1 DATA28 254 0 Z
bit 279 I 1 DATA28
bit 278 O 1 DATA27 254 0 Z
bit 277 I 1 DATA27
bit 276 O 1 DATA26 254 0 Z
bit 275 I 1 DATA26
bit 274 O 1 DATA25 254 0 Z
bit 273 I 1 DATA25
bit 272 O 1 DATA24 254 0 Z
bit 271 I 1 DATA24
bit 270 O 1 DATA23 254 0 Z
bit 269 I 1 DATA23
bit 268 O 1 DATA22 254 0 Z
bit 267 I 1 DATA22
bit 266 O 1 DATA21 254 0 Z
bit 265 I 1 DATA21
bit 264 O 1 DATA20 254 0 Z
bit 263 I 1 DATA20
bit 262 O 1 DATA19 254 0 Z
bit 261 I 1 DATA19
bit 260 O 1 DATA18 254 0 Z
bit 259 I 1 DATA18
bit 258 O 1 DATA17 254 0 Z
bit 257 I 1 DATA17
bit 256 O 1 DATA16 254 0 Z
bit 255 I 1 DATA16
bit 254 C 0 *
bit 253 O 1 DATA15 221 0 Z
bit 252 I 1 DATA15
bit 251 O 1 DATA14 221 0 Z
bit 250 I 1 DATA14
bit 249 O 1 DATA13 221 0 Z
bit 248 I 1 DATA13
bit 247 O 1 DATA12 221 0 Z
bit 246 I 1 DATA12
bit 245 O 1 DATA11 221 0 Z
bit 244 I 1 DATA11
bit 243 O 1 DATA10 221 0 Z
bit 242 I 1 DATA10
bit 241 O 1 DATA9 221 0 Z
bit 240 I 1 DATA9
bit 239 O 1 DATA8 221 0 Z
bit 238 I 1 DATA8
bit 237 O 1 DATA7 221 0 Z
bit 236 I 1 DATA7
bit 235 O 1 DATA6 221 0 Z
bit 234 I 1 DATA6
bit 233 O 1 DATA5 221 0 Z
bit 232 I 1 DATA5
bit 231 O 1 DATA4 221 0 Z
bit 230 I 1 DATA4
bit 229 O 1 DATA3 221 0 Z
bit 228 I 1 DATA3
bit 227 O 1 DATA2 221 0 Z
bit 226 I 1 DATA2
bit 225 O 1 DATA1 221 0 Z
bit 224 I 1 DATA1
bit 223 O 1 DATA0 221 0 Z
bit 222 I 1 DATA0
bit 221 C 0 *
bit 220 O 1 ADDR2 219 0 Z
bit 219 C 0 *
bit 218 O 1 ADDR3 219 0 Z
bit 217 O 1 ADDR4 219 0 Z
bit 216 O 1 ADDR5 219 0 Z
bit 215 O 1 ADDR6 219 0 Z
bit 214 O 1 ADDR7 219 0 Z
bit 213 O 1 ADDR8 219 0 Z
bit 212 O 1 ABE_B3 219 0 Z
bit 211 O 1 ABE_B2 219 0 Z
bit 210 O 1 ABE_B1 219 0 Z
bit 209 O 1 ABE_B0 219 0 Z
bit 208 O 1 BGH_B
bit 207 O 1 BG_B
bit 206 I 1 BR_B
bit 205 O 1 SA10 194 0 Z
bit 204 O 1 SCLK1 194 0 Z
bit 203 O 1 SCLK0 194 0 Z
bit 202 O 1 SWE_B 194 0 Z
bit 201 O 1 SCAS_B 194 0 Z
bit 200 O 1 SCKE 194 0 Z
bit 199 O 1 SRAS_B 194 0 Z
bit 198 O 1 SMS_B3 194 0 Z
bit 197 O 1 SMS_B2 194 0 Z
bit 196 O 1 SMS_B1 194 0 Z
bit 195 O 1 SMS_B0 194 0 Z
bit 194 C 0 *
bit 193 I 1 ARDY
bit 192 O 1 ARE_B 189 0 Z
bit 191 O 1 AOE_B 189 0 Z
bit 190 O 1 AWE_B 189 0 Z
bit 189 C 0 *
bit 188 O 1 AMS_B0 189 0 Z
bit 187 O 1 AMS_B1 189 0 Z
bit 186 O 1 AMS_B2 189 0 Z
bit 185 O 1 AMS_B3 189 0 Z
bit 184 O 1 ADDR9 175 0 Z
bit 183 O 1 ADDR10 175 0 Z
bit 182 O 1 ADDR11 175 0 Z
bit 181 O 1 ADDR12 175 0 Z
bit 180 O 1 ADDR13 175 0 Z
bit 179 O 1 ADDR14 175 0 Z
bit 178 O 1 ADDR15 175 0 Z
bit 177 O 1 ADDR16 175 0 Z
bit 176 O 1 ADDR17 175 0 Z
bit 175 C 0 *
bit 174 O 1 ADDR18 175 0 Z
bit 173 O 1 ADDR19 175 0 Z
bit 172 O 1 ADDR20 175 0 Z
bit 171 O 1 ADDR21 175 0 Z
bit 170 O 1 ADDR22 175 0 Z
bit 169 O 1 ADDR23 175 0 Z
bit 168 O 1 ADDR24 175 0 Z
bit 167 O 1 ADDR25 175 0 Z
bit 166 I 1 PPI2_CLK
bit 165 I 1 PPI1_CLK
bit 164 C 0 *
bit 163 O 1 PPI1_SYNC3 164 0 Z
bit 162 I 1 PPI1_SYNC3
bit 161 C 0 *
bit 160 O 1 PPI1_SYNC2 161 0 Z
bit 159 I 1 PPI1_SYNC2
bit 158 C 0 *
bit 157 O 1 PPI1_SYNC1 158 0 Z
bit 156 I 1 PPI1_SYNC1
bit 155 C 0 *
bit 154 O 1 PPI1_DATA15 155 0 Z
bit 153 I 1 PPI1_DATA15
bit 152 C 0 *
bit 151 O 1 PPI1_DATA14 152 0 Z
bit 150 I 1 PPI1_DATA14
bit 149 C 0 *
bit 148 O 1 PPI1_DATA13 149 0 Z
bit 147 I 1 PPI1_DATA13
bit 146 C 0 *
bit 145 O 1 PPI1_DATA12 146 0 Z
bit 144 I 1 PPI1_DATA12
bit 143 C 0 *
bit 142 O 1 PPI1_DATA11 143 0 Z
bit 141 I 1 PPI1_DATA11
bit 140 C 0 *
bit 139 O 1 PPI1_DATA10 140 0 Z
bit 138 I 1 PPI1_DATA10
bit 137 I 1 RESET_B
bit 136 I 1 BY_PASS
bit 135 C 0 *
bit 134 O 1 PPI1_DATA9 135 0 Z
bit 133 I 1 PPI1_DATA9
bit 132 C 0 *
bit 131 O 1 PPI1_DATA8 132 0 Z
bit 130 I 1 PPI1_DATA8
bit 129 C 0 *
bit 128 O 1 PPI1_DATA7 129 0 Z
bit 127 I 1 PPI1_DATA7
bit 126 C 0 *
bit 125 O 1 PPI1_DATA6 126 0 Z
bit 124 I 1 PPI1_DATA6
bit 123 C 0 *
bit 122 O 1 PPI1_DATA5 123 0 Z
bit 121 I 1 PPI1_DATA5
bit 120 C 0 *
bit 119 O 1 PPI1_DATA4 120 0 Z
bit 118 I 1 PPI1_DATA4
bit 117 C 0 *
bit 116 O 1 PPI1_DATA3 117 0 Z
bit 115 I 1 PPI1_DATA3
bit 114 C 0 *
bit 113 O 1 PPI1_DATA2 114 0 Z
bit 112 I 1 PPI1_DATA2
bit 111 C 0 *
bit 110 O 1 PPI1_DATA1 111 0 Z
bit 109 I 1 PPI1_DATA1
bit 108 C 0 *
bit 107 O 1 PPI1_DATA0 108 0 Z
bit 106 I 1 PPI1_DATA0
bit 105 C 0 *
bit 104 O 1 PPI2_SYNC3 105 0 Z
bit 103 I 1 PPI2_SYNC3
bit 102 C 0 *
bit 101 O 1 PPI2_SYNC2 102 0 Z
bit 100 I 1 PPI2_SYNC2
bit 99 C 0 *
bit 98 O 1 PPI2_SYNC1 99 0 Z
bit 97 I 1 PPI2_SYNC1
bit 96 C 0 *
bit 95 O 1 PPI2_DATA15 96 0 Z
bit 94 I 1 PPI2_DATA15
bit 93 C 0 *
bit 92 O 1 PPI2_DATA14 93 0 Z
bit 91 I 1 PPI2_DATA14
bit 90 C 0 *
bit 89 O 1 PPI2_DATA13 90 0 Z
bit 88 I 1 PPI2_DATA13
bit 87 C 0 *
bit 86 O 1 PPI2_DATA12 87 0 Z
bit 85 I 1 PPI2_DATA12
bit 84 C 0 *
bit 83 O 1 PPI2_DATA11 84 0 Z
bit 82 I 1 PPI2_DATA11
bit 81 C 0 *
bit 80 O 1 PPI2_DATA10 81 0 Z
bit 79 I 1 PPI2_DATA10
bit 78 C 0 *
bit 77 O 1 PPI2_DATA9 78 0 Z
bit 76 I 1 PPI2_DATA9
bit 75 C 0 *
bit 74 O 1 PPI2_DATA8 75 0 Z
bit 73 I 1 PPI2_DATA8
bit 72 C 0 *
bit 71 O 1 PPI2_DATA7 72 0 Z
bit 70 I 1 PPI2_DATA7
bit 69 C 0 *
bit 68 O 1 PPI2_DATA6 69 0 Z
bit 67 I 1 PPI2_DATA6
bit 66 C 0 *
bit 65 O 1 PPI2_DATA5 66 0 Z
bit 64 I 1 PPI2_DATA5
bit 63 C 0 *
bit 62 O 1 PPI2_DATA4 63 0 Z
bit 61 I 1 PPI2_DATA4
bit 60 C 0 *
bit 59 O 1 PPI2_DATA3 60 0 Z
bit 58 I 1 PPI2_DATA3
bit 57 C 0 *
bit 56 O 1 PPI2_DATA2 57 0 Z
bit 55 I 1 PPI2_DATA2
bit 54 C 0 *
bit 53 O 1 PPI2_DATA1 54 0 Z
bit 52 I 1 PPI2_DATA1
bit 51 C 0 *
bit 50 O 1 PPI2_DATA0 51 0 Z
bit 49 I 1 PPI2_DATA0
bit 48 C 0 *
bit 47 O 1 PF0 48 0 Z
bit 46 I 1 PF0
bit 45 C 0 *
bit 44 O 1 PF1 45 0 Z
bit 43 I 1 PF1
bit 42 C 0 *
bit 41 O 1 PF2 42 0 Z
bit 40 I 1 PF2
bit 39 C 0 *
bit 38 O 1 PF3 39 0 Z
bit 37 I 1 PF3
bit 36 C 0 *
bit 35 O 1 PF4 36 0 Z
bit 34 I 1 PF4
bit 33 C 0 *
bit 32 O 1 PF5 33 0 Z
bit 31 I 1 PF5
bit 30 C 0 *
bit 29 O 1 PF6 30 0 Z
bit 28 I 1 PF6
bit 27 C 0 *
bit 26 O 1 PF7 27 0 Z
bit 25 I 1 PF7
bit 24 C 0 *
bit 23 O 1 PF8 24 0 Z
bit 22 I 1 PF8
bit 21 C 0 *
bit 20 O 1 PF9 21 0 Z
bit 19 I 1 PF9
bit 18 C 0 *
bit 17 O 1 PF10 18 0 Z
bit 16 I 1 PF10
bit 15 C 0 *
bit 14 O 1 PF11 15 0 Z
bit 13 I 1 PF11
bit 12 C 0 *
bit 11 O 1 PF12 12 0 Z
bit 10 I 1 PF12
bit 9 C 0 *
bit 8 O 1 PF13 9 0 Z
bit 7 I 1 PF13
bit 6 C 0 *
bit 5 O 1 PF14 6 0 Z
bit 4 I 1 PF14
bit 3 C 0 *
bit 2 O 1 PF15 3 0 Z
bit 1 I 1 PF15
bit 0 I 1 NMI_1

3
jtag/src/bus/Makefile.am
Unescape Escape View File

@ -33,6 +33,9 @@ libbus_a_SOURCES = \
ejtag.c \
bf533_stamp.c \
bf533_ezkit.c \
bf537_stamp.c \
bf548_ezkit.c \
bf561_ezkit.c \
ixp425.c \
lh7a400.c \
mpc824x.c \

408
jtag/src/bus/bf537_stamp.c
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@ -0,0 +1,408 @@
/*
* bf537_stamp.c
*
* Analog Devices ADSP-BF537 STAMP/EZ-KIT Lite bus driver
* Copyright (C) 2008 Analog Devices, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
* 02111-1307, USA.
*
* Written by Jie Zhang <jie.zhang@analog.com>, 2008.
*
*/
#include "sysdep.h"
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include "part.h"
#include "bus.h"
#include "chain.h"
#include "bssignal.h"
#include "jtag.h"
#include "buses.h"
typedef struct {
chain_t *chain;
part_t *part;
signal_t *ams[4];
signal_t *addr[19];
signal_t *data[16];
signal_t *abe[2];
signal_t *awe;
signal_t *are;
signal_t *sras;
signal_t *scas;
signal_t *sms;
signal_t *swe;
} bus_params_t;
#define CHAIN ((bus_params_t *) bus->params)->chain
#define PART ((bus_params_t *) bus->params)->part
#define AMS ((bus_params_t *) bus->params)->ams
#define ADDR ((bus_params_t *) bus->params)->addr
#define DATA ((bus_params_t *) bus->params)->data
#define AWE ((bus_params_t *) bus->params)->awe
#define ARE ((bus_params_t *) bus->params)->are
#define ABE ((bus_params_t *) bus->params)->abe
#define SRAS ((bus_params_t *) bus->params)->sras
#define SCAS ((bus_params_t *) bus->params)->scas
#define SMS ((bus_params_t *) bus->params)->sms
#define SWE ((bus_params_t *) bus->params)->swe
static void
select_flash( bus_t *bus )
{
part_t *p = PART;
part_set_signal( p, AMS[0], 1, 0 );
part_set_signal( p, AMS[1], 1, 1 );
part_set_signal( p, AMS[2], 1, 1 );
part_set_signal( p, AMS[3], 1, 1 );
part_set_signal( p, ABE[0], 1, 0 );
part_set_signal( p, ABE[1], 1, 0 );
part_set_signal( p, SRAS, 1, 1 );
part_set_signal( p, SCAS, 1, 1 );
part_set_signal( p, SWE, 1, 1 );
part_set_signal( p, SMS, 1, 1 );
}
static void
unselect_flash( bus_t *bus )
{
part_t *p = PART;
part_set_signal( p, AMS[0], 1, 1 );
part_set_signal( p, AMS[1], 1, 1 );
part_set_signal( p, AMS[2], 1, 1 );
part_set_signal( p, AMS[3], 1, 1 );
part_set_signal( p, ABE[0], 1, 1 );
part_set_signal( p, ABE[1], 1, 1 );
part_set_signal( p, SRAS, 1, 1 );
part_set_signal( p, SCAS, 1, 1 );
part_set_signal( p, SWE, 1, 1 );
part_set_signal( p, SMS, 1, 1 );
}
static void
setup_address( bus_t *bus, uint32_t a )
{
int i;
part_t *p = PART;
for (i = 0; i < 19; i++)
part_set_signal( p, ADDR[i], 1, (a >> (i + 1)) & 1 );
}
static void
set_data_in( bus_t *bus )
{
int i;
part_t *p = PART;
for (i = 0; i < 16; i++)
part_set_signal( p, DATA[i], 0, 0 );
}
static void
setup_data( bus_t *bus, uint32_t d )
{
int i;
part_t *p = PART;
for (i = 0; i < 16; i++)
part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
}
static void
bf537_stamp_bus_printinfo( bus_t *bus )
{
int i;
for (i = 0; i < CHAIN->parts->len; i++)
if (PART == CHAIN->parts->parts[i])
break;
printf( _("Blackfin BF537 Stamp compatible bus driver via BSR (JTAG part No. %d)\n"), i );
}
static void
bf537_ezkit_bus_printinfo( bus_t *bus )
{
int i;
for (i = 0; i < CHAIN->parts->len; i++)
if (PART == CHAIN->parts->parts[i])
break;
printf( _("Blackfin BF537 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), i );
}
static void
bf537_stamp_bus_prepare( bus_t *bus )
{
part_set_instruction( PART, "EXTEST" );
chain_shift_instructions( CHAIN );
}
static void
bf537_stamp_bus_read_start( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
select_flash( bus );
part_set_signal( p, ARE, 1, 0 );
part_set_signal( p, AWE, 1, 1 );
setup_address( bus, adr );
set_data_in( bus );
chain_shift_data_registers( chain, 0 );
}
static uint32_t
bf537_stamp_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
setup_address( bus, adr );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < 16; i++)
d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
return d;
}
static uint32_t
bf537_stamp_bus_read_end( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
unselect_flash( bus );
part_set_signal( p, ARE, 1, 1 );
part_set_signal( p, AWE, 1, 1 );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < 16; i++)
d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
return d;
}
static uint32_t
bf537_stamp_bus_read( bus_t *bus, uint32_t adr )
{
bf537_stamp_bus_read_start( bus, adr );
return bf537_stamp_bus_read_end( bus );
}
static void
bf537_stamp_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
part_t *p = PART;
chain_t *chain = CHAIN;
// printf("Writing %04X to %08X...\n", data, adr);
select_flash( bus );
part_set_signal( p, ARE, 1, 1 );
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, AWE, 1, 0 );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, AWE, 1, 1 );
unselect_flash( bus );
chain_shift_data_registers( chain, 0 );
}
static int
bf537_stamp_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
{
area->description = NULL;
area->start = UINT32_C(0x00000000);
area->length = UINT64_C(0x100000000);
area->width = 16;
return 0;
}
static void
bf537_stamp_bus_free( bus_t *bus )
{
free( bus->params );
free( bus );
}
static bus_t *bf537_stamp_bus_new( char *cmd_params[] );
const bus_driver_t bf537_stamp_bus = {
"bf537_stamp",
N_("Blackfin BF537 Stamp board bus driver"),
bf537_stamp_bus_new,
bf537_stamp_bus_free,
bf537_stamp_bus_printinfo,
bf537_stamp_bus_prepare,
bf537_stamp_bus_area,
bf537_stamp_bus_read_start,
bf537_stamp_bus_read_next,
bf537_stamp_bus_read_end,
bf537_stamp_bus_read,
bf537_stamp_bus_write
};
const bus_driver_t bf537_ezkit_bus = {
"bf537_ezkit",
N_("Blackfin BF537 EZ-KIT board bus driver"),
bf537_stamp_bus_new,
bf537_stamp_bus_free,
bf537_ezkit_bus_printinfo,
bf537_stamp_bus_prepare,
bf537_stamp_bus_area,
bf537_stamp_bus_read_start,
bf537_stamp_bus_read_next,
bf537_stamp_bus_read_end,
bf537_stamp_bus_read,
bf537_stamp_bus_write
};
static bus_t *
bf537_stamp_bus_new( char *cmd_params[] )
{
bus_t *bus;
char buff[15];
int i;
int failed = 0;
if (!chain || !chain->parts || chain->parts->len <= chain->active_part || chain->active_part < 0)
return NULL;
bus = malloc( sizeof (bus_t) );
if (!bus)
return NULL;
bus->driver = &bf537_stamp_bus;
bus->params = malloc( sizeof (bus_params_t) );
if (!bus->params) {
free( bus );
return NULL;
}
CHAIN = chain;
PART = chain->parts->parts[chain->active_part];
for (i = 0; i < 4; i++) {
sprintf( buff, "AMS_B%d", i );
AMS[i] = part_find_signal( PART, buff );
if (!AMS[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 0; i < 19; i++) {
sprintf( buff, "ADDR%d", i + 1);
ADDR[i] = part_find_signal( PART, buff );
if (!ADDR[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 0; i < 16; i++) {
sprintf( buff, "DATA%d", i);
DATA[i] = part_find_signal( PART, buff );
if (!DATA[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
AWE = part_find_signal( PART, "AWE_B" );
if (!AWE) {
printf( _("signal '%s' not found\n"), "AWE_B" );
failed = 1;
}
ARE = part_find_signal( PART, "ARE_B" );
if (!ARE) {
printf( _("signal '%s' not found\n"), "ARE_B" );
failed = 1;
}
ABE[0] = part_find_signal( PART, "ABE_B0" );
if (!ABE[0]) {
printf( _("signal '%s' not found\n"), "ABE_B0" );
failed = 1;
}
ABE[1] = part_find_signal( PART, "ABE_B1" );
if (!ABE[1]) {
printf( _("signal '%s' not found\n"), "ABE_B1" );
failed = 1;
}
SRAS = part_find_signal( PART, "SRAS_B" );
if (!SRAS) {
printf( _("signal '%s' not found\n"), "SRAS_B" );
failed = 1;
}
SCAS = part_find_signal( PART, "SCAS_B" );
if (!SCAS) {
printf( _("signal '%s' not found\n"), "SCAS_B" );
failed = 1;
}
SWE = part_find_signal( PART, "SWE_B" );
if (!SWE) {
printf( _("signal '%s' not found\n"), "SWE_B" );
failed = 1;
}
SMS = part_find_signal( PART, "SMS_B" );
if (!SMS) {
printf( _("signal '%s' not found\n"), "SMS_B" );
failed = 1;
}
if (failed) {
free( bus->params );
free( bus );
return NULL;
}
return bus;
}

370
jtag/src/bus/bf548_ezkit.c
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@ -0,0 +1,370 @@
/*
* bf548_ezkit.c
*
* Analog Devices ADSP-BF548 EZ-KIT Lite bus driver
* Copyright (C) 2008 Analog Devices, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
* 02111-1307, USA.
*
* Written by Jie Zhang <jie.zhang@analog.com>, 2008.
*/
#include "sysdep.h"
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include "part.h"
#include "bus.h"
#include "chain.h"
#include "bssignal.h"
#include "jtag.h"
#include "buses.h"
typedef struct {
chain_t *chain;
part_t *part;
signal_t *ams[4];
signal_t *addr[24];
signal_t *data[16];
signal_t *awe;
signal_t *are;
signal_t *aoe;
signal_t *dcs0;
signal_t *nce;
} bus_params_t;
#define CHAIN ((bus_params_t *) bus->params)->chain
#define PART ((bus_params_t *) bus->params)->part
#define AMS ((bus_params_t *) bus->params)->ams
#define ADDR ((bus_params_t *) bus->params)->addr
#define DATA ((bus_params_t *) bus->params)->data
#define AOE ((bus_params_t *) bus->params)->aoe
#define AWE ((bus_params_t *) bus->params)->awe
#define ARE ((bus_params_t *) bus->params)->are
#define DCS0 ((bus_params_t *) bus->params)->dcs0
#define NCE ((bus_params_t *) bus->params)->nce
static void
select_flash( bus_t *bus )
{
part_t *p = PART;
part_set_signal( p, AMS[0], 1, 0 );
part_set_signal( p, AMS[1], 1, 1 );
part_set_signal( p, AMS[2], 1, 1 );
part_set_signal( p, AMS[3], 1, 1 );
part_set_signal( p, DCS0, 1, 1 );
part_set_signal( p, NCE, 1, 1 );
}
static void
unselect_flash( bus_t *bus )
{
part_t *p = PART;
part_set_signal( p, AMS[0], 1, 1 );
part_set_signal( p, AMS[1], 1, 1 );
part_set_signal( p, AMS[2], 1, 1 );
part_set_signal( p, AMS[3], 1, 1 );
part_set_signal( p, DCS0, 1, 1 );
part_set_signal( p, NCE, 1, 1 );
}
static void
setup_address( bus_t *bus, uint32_t a )
{
int i;
part_t *p = PART;
for (i = 0; i < 24; i++)
part_set_signal( p, ADDR[i], 1, (a >> (i + 1)) & 1 );
}
static void
set_data_in( bus_t *bus )
{
int i;
part_t *p = PART;
for (i = 0; i < 16; i++)
part_set_signal( p, DATA[i], 0, 0 );
}
static void
setup_data( bus_t *bus, uint32_t d )
{
int i;
part_t *p = PART;
for (i = 0; i < 16; i++)
part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
}
static void
bf548_ezkit_bus_printinfo( bus_t *bus )
{
int i;
for (i = 0; i < CHAIN->parts->len; i++)
if (PART == CHAIN->parts->parts[i])
break;
printf( _("Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), i );
}
static void
bf548_ezkit_bus_prepare( bus_t *bus )
{
part_set_instruction( PART, "EXTEST" );
chain_shift_instructions( CHAIN );
}
static void
bf548_ezkit_bus_read_start( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
select_flash( bus );
part_set_signal( p, AOE, 1, 0 );
part_set_signal( p, ARE, 1, 0 );
part_set_signal( p, AWE, 1, 1 );
setup_address( bus, adr );
set_data_in( bus );
chain_shift_data_registers( chain, 0 );
}
static uint32_t
bf548_ezkit_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
setup_address( bus, adr );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < 16; i++)
d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
return d;
}
static uint32_t
bf548_ezkit_bus_read_end( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
part_set_signal( p, AOE, 1, 1 );
part_set_signal( p, ARE, 1, 1 );
part_set_signal( p, AWE, 1, 1 );
unselect_flash( bus );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < 16; i++)
d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
return d;
}
static uint32_t
bf548_ezkit_bus_read( bus_t *bus, uint32_t adr )
{
bf548_ezkit_bus_read_start( bus, adr );
return bf548_ezkit_bus_read_end( bus );
}
static void
bf548_ezkit_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
part_t *p = PART;
chain_t *chain = CHAIN;
select_flash( bus );
part_set_signal( p, AOE, 1, 0 );
part_set_signal( p, ARE, 1, 1 );
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, AWE, 1, 0 );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, AWE, 1, 1 );
part_set_signal( p, AOE, 1, 1 );
unselect_flash( bus );
chain_shift_data_registers( chain, 0 );
}
static int
bf548_ezkit_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
{
area->description = NULL;
area->start = UINT32_C(0x00000000);
area->length = UINT64_C(0x100000000);
area->width = 16;
return 0;
}
static void
bf548_ezkit_bus_free( bus_t *bus )
{
free( bus->params );
free( bus );
}
static bus_t *bf548_ezkit_bus_new( char *cmd_params[] );
const bus_driver_t bf548_ezkit_bus = {
"bf548_ezkit",
N_("Blackfin BF548 EZ-KIT board bus driver"),
bf548_ezkit_bus_new,
bf548_ezkit_bus_free,
bf548_ezkit_bus_printinfo,
bf548_ezkit_bus_prepare,
bf548_ezkit_bus_area,
bf548_ezkit_bus_read_start,
bf548_ezkit_bus_read_next,
bf548_ezkit_bus_read_end,
bf548_ezkit_bus_read,
bf548_ezkit_bus_write
};
static bus_t *
bf548_ezkit_bus_new( char *cmd_params[] )
{
bus_t *bus;
char buff[15];
int i;
int failed = 0;
if (!chain || !chain->parts || chain->parts->len <= chain->active_part || chain->active_part < 0)
return NULL;
bus = malloc( sizeof (bus_t) );
if (!bus)
return NULL;
bus->driver = &bf548_ezkit_bus;
bus->params = malloc( sizeof (bus_params_t) );
if (!bus->params) {
free( bus );
return NULL;
}
CHAIN = chain;
PART = chain->parts->parts[chain->active_part];
for (i = 0; i < 4; i++) {
sprintf( buff, "AMS%dB", i );
AMS[i] = part_find_signal( PART, buff );
if (!AMS[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 0; i < 3; i++) {
sprintf( buff, "ADDR%d", i + 1);
ADDR[i] = part_find_signal( PART, buff );
if (!ADDR[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 3; i < 9; i++) {
sprintf( buff, "PORTH_%d", i + 5);
ADDR[i] = part_find_signal( PART, buff );
if (!ADDR[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 9; i < 24; i++) {
sprintf( buff, "PORTI_%d", i - 9);
ADDR[i] = part_find_signal( PART, buff );
if (!ADDR[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 0; i < 16; i++) {
sprintf( buff, "DATA%d", i);
DATA[i] = part_find_signal( PART, buff );
if (!DATA[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
AWE = part_find_signal( PART, "AWEB" );
if (!AWE) {
printf( _("signal '%s' not found\n"), "AWEB" );
failed = 1;
}
ARE = part_find_signal( PART, "AREB" );
if (!ARE) {
printf( _("signal '%s' not found\n"), "AREB" );
failed = 1;
}
AOE = part_find_signal( PART, "AOEB" );
if (!AOE) {
printf( _("signal '%s' not found\n"), "AOEB" );
failed = 1;
}
DCS0 = part_find_signal( PART, "CS0_B" );
if (!DCS0) {
printf( _("signal '%s' not found\n"), "CS0_B" );
failed = 1;
}
NCE = part_find_signal( PART, "PORTJ_1" );
if (!NCE) {
printf( _("signal '%s' not found\n"), "PORTJ_1" );
failed = 1;
}
if (failed) {
free( bus->params );
free( bus );
return NULL;
}
return bus;
}

392
jtag/src/bus/bf561_ezkit.c
Unescape Escape View File

@ -0,0 +1,392 @@
/*
* bf561_ezkit.c
*
* Analog Devices ADSP-BF561 EZ-KIT Lite bus driver
* Copyright (C) 2008 Analog Devices, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
* 02111-1307, USA.
*
* Written by Jie Zhang <jie.zhang@analog.com>, 2008.
*
*/
#include "sysdep.h"
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include "part.h"
#include "bus.h"
#include "chain.h"
#include "bssignal.h"
#include "jtag.h"
#include "buses.h"
typedef struct {
chain_t *chain;
part_t *part;
signal_t *ams[4];
signal_t *addr[24];
signal_t *abe[4];
signal_t *data[32];
signal_t *awe;
signal_t *aoe;
signal_t *sras;
signal_t *scas;
signal_t *sms[4];
signal_t *swe;
} bus_params_t;
#define CHAIN ((bus_params_t *) bus->params)->chain
#define PART ((bus_params_t *) bus->params)->part
#define AMS ((bus_params_t *) bus->params)->ams
#define ADDR ((bus_params_t *) bus->params)->addr
#define ABE ((bus_params_t *) bus->params)->abe
#define DATA ((bus_params_t *) bus->params)->data
#define AWE ((bus_params_t *) bus->params)->awe
#define AOE ((bus_params_t *) bus->params)->aoe
#define SRAS ((bus_params_t *) bus->params)->sras
#define SCAS ((bus_params_t *) bus->params)->scas
#define SMS ((bus_params_t *) bus->params)->sms
#define SWE ((bus_params_t *) bus->params)->swe
static void
select_flash( bus_t *bus )
{
part_t *p = PART;
part_set_signal( p, AMS[0], 1, 0 );
part_set_signal( p, AMS[1], 1, 1 );
part_set_signal( p, AMS[2], 1, 1 );
part_set_signal( p, AMS[3], 1, 1 );
part_set_signal( p, ABE[0], 1, 0 );
part_set_signal( p, ABE[1], 1, 0 );
part_set_signal( p, ABE[2], 1, 0 );
part_set_signal( p, ABE[3], 1, 0 );
part_set_signal( p, SRAS, 1, 1 );
part_set_signal( p, SCAS, 1, 1 );
part_set_signal( p, SWE, 1, 1 );
part_set_signal( p, SMS[0], 1, 1 );
part_set_signal( p, SMS[1], 1, 1 );
part_set_signal( p, SMS[2], 1, 1 );
part_set_signal( p, SMS[3], 1, 1 );
}
static void
unselect_flash( bus_t *bus )
{
part_t *p = PART;
part_set_signal( p, AMS[0], 1, 1 );
part_set_signal( p, AMS[1], 1, 1 );
part_set_signal( p, AMS[2], 1, 1 );
part_set_signal( p, AMS[3], 1, 1 );
part_set_signal( p, ABE[0], 1, 1 );
part_set_signal( p, ABE[1], 1, 1 );
part_set_signal( p, ABE[2], 1, 1 );
part_set_signal( p, ABE[3], 1, 1 );
part_set_signal( p, SRAS, 1, 1 );
part_set_signal( p, SCAS, 1, 1 );
part_set_signal( p, SWE, 1, 1 );
part_set_signal( p, SMS[0], 1, 1 );
part_set_signal( p, SMS[1], 1, 1 );
part_set_signal( p, SMS[2], 1, 1 );
part_set_signal( p, SMS[3], 1, 1 );
}
static void
setup_address( bus_t *bus, uint32_t a )
{
int i;
part_t *p = PART;
for (i = 0; i < 24; i++)
part_set_signal( p, ADDR[i], 1, (a >> (i + 2)) & 1 );
part_set_signal( p, ABE[3], 1, (a >> 1) & 1 );
}
static void
set_data_in( bus_t *bus )
{
int i;
part_t *p = PART;
for (i = 0; i < 16; i++)
part_set_signal( p, DATA[i], 0, 0 );
}
static void
setup_data( bus_t *bus, uint32_t d )
{
int i;
part_t *p = PART;
for (i = 0; i < 16; i++)
part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
}
static void
bf561_ezkit_bus_printinfo( bus_t *bus )
{
int i;
for (i = 0; i < CHAIN->parts->len; i++)
if (PART == CHAIN->parts->parts[i])
break;
printf( _("Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), i );
}
static void
bf561_ezkit_bus_prepare( bus_t *bus )
{
part_set_instruction( PART, "EXTEST" );
chain_shift_instructions( CHAIN );
}
static void
bf561_ezkit_bus_read_start( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
select_flash( bus );
part_set_signal( p, AOE, 1, 0 );
part_set_signal( p, AWE, 1, 1 );
setup_address( bus, adr );
set_data_in( bus );
chain_shift_data_registers( chain, 0 );
}
static uint32_t
bf561_ezkit_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
setup_address( bus, adr );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < 16; i++)
d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
return d;
}
static uint32_t
bf561_ezkit_bus_read_end( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
unselect_flash( bus );
part_set_signal( p, AOE, 1, 1 );
part_set_signal( p, AWE, 1, 1 );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < 16; i++)
d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
return d;
}
static uint32_t
bf561_ezkit_bus_read( bus_t *bus, uint32_t adr )
{
bf561_ezkit_bus_read_start( bus, adr );
return bf561_ezkit_bus_read_end( bus );
}
static void
bf561_ezkit_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
part_t *p = PART;
chain_t *chain = CHAIN;
select_flash( bus );
part_set_signal( p, AOE, 1, 1 );
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, AWE, 1, 0 );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, AWE, 1, 1 );
unselect_flash( bus );
chain_shift_data_registers( chain, 0 );
}
static int
bf561_ezkit_bus_area( bus_t *bus, uint32_t addr, bus_area_t *area )
{
area->description = NULL;
area->start = UINT32_C(0x00000000);
area->length = UINT64_C(0x100000000);
area->width = 16;
return 0;
}
static void
bf561_ezkit_bus_free( bus_t *bus )
{
free( bus->params );
free( bus );
}
static bus_t *bf561_ezkit_bus_new( char *cmd_params[] );
const bus_driver_t bf561_ezkit_bus = {
"bf561_ezkit",
N_("Blackfin BF561 EZ-KIT board bus driver"),
bf561_ezkit_bus_new,
bf561_ezkit_bus_free,
bf561_ezkit_bus_printinfo,
bf561_ezkit_bus_prepare,
bf561_ezkit_bus_area,
bf561_ezkit_bus_read_start,
bf561_ezkit_bus_read_next,
bf561_ezkit_bus_read_end,
bf561_ezkit_bus_read,
bf561_ezkit_bus_write
};
static bus_t *
bf561_ezkit_bus_new( char *cmd_params[] )
{
bus_t *bus;
char buff[15];
int i;
int failed = 0;
if (!chain || !chain->parts || chain->parts->len <= chain->active_part || chain->active_part < 0)
return NULL;
bus = malloc( sizeof (bus_t) );
if (!bus)
return NULL;
bus->driver = &bf561_ezkit_bus;
bus->params = malloc( sizeof (bus_params_t) );
if (!bus->params) {
free( bus );
return NULL;
}
CHAIN = chain;
PART = chain->parts->parts[chain->active_part];
for (i = 0; i < 4; i++) {
sprintf( buff, "AMS_B%d", i );
AMS[i] = part_find_signal( PART, buff );
if (!AMS[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 0; i < 24; i++) {
sprintf( buff, "ADDR%d", i + 2);
ADDR[i] = part_find_signal( PART, buff );
if (!ADDR[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 0; i < 4; i++) {
sprintf( buff, "ABE_B%d", i);
ABE[i] = part_find_signal( PART, buff );
if (!ABE[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
for (i = 0; i < 32; i++) {
sprintf( buff, "DATA%d", i);
DATA[i] = part_find_signal( PART, buff );
if (!DATA[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
AWE = part_find_signal( PART, "AWE_B" );
if (!AWE) {
printf( _("signal '%s' not found\n"), "AWE_B" );
failed = 1;
}
AOE = part_find_signal( PART, "AOE_B" );
if (!AOE) {
printf( _("signal '%s' not found\n"), "AOE_B" );
failed = 1;
}
SRAS = part_find_signal( PART, "SRAS_B" );
if (!SRAS) {
printf( _("signal '%s' not found\n"), "SRAS_B" );
failed = 1;
}
SCAS = part_find_signal( PART, "SCAS_B" );
if (!SCAS) {
printf( _("signal '%s' not found\n"), "SCAS_B" );
failed = 1;
}
SWE = part_find_signal( PART, "SWE_B" );
if (!SWE) {
printf( _("signal '%s' not found\n"), "SWE_B" );
failed = 1;
}
for (i = 0; i < 4; i++) {
sprintf( buff, "SMS_B%d", i );
SMS[i] = part_find_signal( PART, buff );
if (!SMS[i]) {
printf( _("signal '%s' not found\n"), buff );
failed = 1;
break;
}
}
if (failed) {
free( bus->params );
free( bus );
return NULL;
}
return bus;
}

3
jtag/src/bus/buses.c
Unescape Escape View File

@ -35,6 +35,9 @@ const bus_driver_t *bus_drivers[] = {
&ejtag_bus,
&bf533_stamp_bus,
&bf533_ezkit_bus,
&bf537_stamp_bus,
&bf537_ezkit_bus,
&bf561_ezkit_bus,
&ixp425_bus,
&lh7a400_bus,
&mpc824x_bus,

3
jtag/src/bus/buses.h
Unescape Escape View File

@ -30,6 +30,9 @@ extern const bus_driver_t bcm1250_bus;
extern const bus_driver_t ejtag_bus;
extern const bus_driver_t bf533_stamp_bus;
extern const bus_driver_t bf533_ezkit_bus;
extern const bus_driver_t bf537_stamp_bus;
extern const bus_driver_t bf537_ezkit_bus;
extern const bus_driver_t bf561_ezkit_bus;
extern const bus_driver_t ixp425_bus;
extern const bus_driver_t lh7a400_bus;
extern const bus_driver_t mpc824x_bus;

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